52 0 131MB
~TCIC VOLUME B
Engineering design
begi~s
with the
Ie MASTER
Publisher. Jerry Eimbinder Associate Publisher. James W. Graham Editorial Director. Frank Egan Editor. Dave Howell Assistant Editor. Gall LoBue Assistant Editor, Kathy Schmidt Technical Editor. Paul Seamon Production Director. Dan Chillak Typographical Consultant. Joe Finazzo Circulation Manager. Garry Mayes Coordinator. Joanne HlII Manager. Catalog Production. Lanny Levin Catalog Design Director. Michelle Arnold Catalog Design Assistant. Bill Hennessey Art/Production SupeNisor. Charlotte Newman Art Staff. Edith Cyran, Carol Hansen, Mary Koczanowski Production Manager. Martha Gaska Production Assistant. Brenda Buff Marketing SeNices Manager. Georgeann Johnson Sales Administration SupeNisor. Addie Bisignano Sales Billing SupeNisor. Aline Lewin HEARST BUSINESS COMMUNICATIONS, INC.! UTP DIVISION
President. Manley P. Ludwig Vice President. Theodore Breuer Vice President. Robert J. Males Chairman. Executive Committee. Arthur I. Rabb HEARST BUSINESS COMMUNICATIONS, INC. President. Robert J. Males THE HEARST CORPORATION President. Frank A. Bennack, Jr. Chairman. Randolph A. Hearst Group Vice President. Books and Business Publishing. Gordon L. Jones Publishing Consultant. Richard E. Deems HEARST BUSINESS COMMUNICATIONS, INC.! UTP DIVISION East Coast: 645 Stewart Avenue Garden City, NY 11530 Tel: (516) 222-2500 TWX: 510-222-1673 (UTP GRCY) West Coast: 1333 Lawrence Expressway. Suite 101 Santa Clara. CA 95051 Tel: (408) 248-8044 TWX: 910-338-0272 IMPORTANT NOTICE Considerable effort has been expended to make IC MASTER accurate and complete. but IC MASTER cannot assume responsibility for inaccuracies. ommisions. manufacturers' claims. or their representations. No portion of this book may be reproduced without express written permission of the publisher. © IC MASTER. solely owned by Hearst Business Communications Inc./UTP Division. 1983. CMOS Static RAM (Integrated DeVice Tecllnology Photo)
2
©
Ie MASTER 1983
iM~@~VA~u~~~uM~~~@~~@MOO
~~BC: MA5T~~
/fu'Jffiillui] [JJ Sl][1rn~U@L'J
@lliJU@[]
eN IE COMPlI.rsVr:.: $CO)r!lJ fRlCCI]
rJiUI1.UVAImV lPAllil'lTS rrDUrmaigital Modulator
Disk Memory Drivers Fault Detector
See Mixer
Microprocessor-System Components; 6800 .
Digital to Analog Converters Diode Arrays
Interface-Digital to Analog Converters Linear-Arrays
Diode Matrix, Programmable
Digital-Special
Interface-Memory and Peripheral Drivers Interface-Memory and Peripheral Drivers
Head Read/Write Circuit Interface-Memory and Peripheral Drivers Head Selector
Interface-Memory and Peripheral Drivers
Video Amplifier
Interface-Memory and Peripheral Drivers
Winchester Read/Write Circuit
Interface-Memory and Peripheral Drivers
Display Controller
Digital-TTL, Miscellaneous; Other Digital Devices Microprocessor-System Components; Macrologic Bipolar, 6800, 8080 Data Link Controller Microprocessor-System Components; 6800 Digital-CMOS, Arithmetic Functions Data Path Switch Linear-Analog Switches ' Microprocessor-System Components; Macrologic Bipolar, Macrologic CMOS Data Security Digital-Special Device Microprocessor-System Components; 6800 Data Selector/ Multiplexer See Multiplexers Decade Sequencer Digital-TTL, Miscellaneous Decoder Digital-CMOS, Decoders Digital-CMOS, Drivers Digital-ECl 10000, Decoders Digital-ECl 100K, Decoders . Digital-TTL, Decoders Digital-CMOS, Drivers Digital-Special Interface-Display Drivers Microprocessor-System Components FM Stereo Linear-Consumer Circuits Keyboard Interface~Keyboard Encoders, Decoders Tone Linear-Phase locked loop Circuits
14
Function
Display Drivers
Microprocessor-System Components; Macrologic Bipolar, PPS-4, 8080, Peripheral Controllers Interface-Display Drivers Also See Drivers
Dividers
DMA Address Generator DMA Controller
Double Balanced Mixer
Digital-CMOS, Oscillators/Dividers Digital-TTL, Miscellaneous Digital-Special Linear-Phase locked loop Circuits Linear-Other Devices Microprocessor-System Components Microprocessor-System Components; F8, PPS-4, Z80, 1600, 1610, 6800, 8000, 8080, 8085A, 9900, General Purpose Linear-Phase locked loop Circuits
DPDT Switches
Interface-Analog Switches
DPST Switches
Interface-Analog Switches
Drivers
Digital-CMOS, Drivers Digital-CMOS, Miscellaneous Digital-ECl 10000, Drivers . Digital-ECl 100K, Drivers Digital-HNIL/HTl, Drivers Digital-TTL, Decoders Digital-TTL, Drivers Digital-TTL, Miscellaneous Interface-Analog Switches, Drivers Interface-Display Drivers Interface-Line Circuits Interface-Memory and Peripheral Drivers
Audio
Linear-Consumer Circuits
Counter Display
Digital-Special
DVMs
Dynamic Memory Interface Dynamic Memory Refresh Controller
Digital-Special Interface-Analog to Digital Converters, Decimal Output Interface-Memory and Peripheral Drivers Microprocessor-System Components; F8 Digital-TTL, Miscellaneous Interface-Memory and Peripheral Drivers Microprocessor-System Components; 6800, 8080
E Encoders
Keyboard
Digital-CMOS, Miscellaneous Digital-ECl 10000, Miscellaneous Digital-ECl 100K, Miscellaneous Digital-TTL, Miscellaneous Digital-Special Interface-Keyboard Encoder-Decoders
© Ie MASTER 1983
MASTER SELECTION GUIDE-INDE)( "'"-~1
§ Function Keyboard to Binary Tone Error Checking Circuits
Error Pattern Register Expander
Expander (Compander) Extender
Section
Function
Four Channel Sound Linear-Consumer Circuits Digital-CMOS, Miscellaneous Digital-CMOS, Miscellaneous Linear-Telecommunications Circuits
Fourier Transform Circuit Frequency Divider
Digital-ECl10000, Miscellaneous Interface-Error Checking Circuits Microprocessor-System Components 2900
Frequency Sensitive Switch Linear-Telecommunication Circuits Linear-Other Devices Frequency to Voltage Converter Linear-Other Devices
Interface-Error Checking Circuits Digital-TTL-Gates, AND-OR/ AND-OR Invert Digital-TTL, Miscellaneous
. FSK Modulator/ Demodulator
Games, Video
F
Gates Linear-Consumer Circuits
Fast Carry Extender Digital-TTL, Arithmetic Functions
Floating Point Arithmetic
Digital-TTL, Miscellaneous Linear-Other Devices . Microprocessor-9900
Linear-Other Devices Digital-CMOS, Flip-Flops Digital-ECl 10000, Flip-Flops Digital-ECl 95000, Flip-Flops Digital-ECl 100K, Flip-Flops Digital-ECl III, Flip-Flops Digital-HNILlHTl, Flip-Flops Digital-TTL, Flip-Flops Digital-Special
Ie MASTER 1983
Linear-Phase locked loop Circuits
Linear-Consumer Circuits Interface-Display Drivers Digital-CMOS, Gates, Miscellaneous Digital-HNILlHTl, Gates, Miscellaneous Digital-TTL, Gates, Miscellaneous Digital-CMOS, Gates, AND/NAND Digital-ECl 10000, Gates, AND/NAND Digital-HNILlHTl, Gates, AND/NAND Digital-TTL, Gates, AND/NAND
AND-OR/ AND-OR Invert Digital-CMOS, Gates, AND-OR/ AND-OR Invert Digital-ECl 10000, Gates, AND-OR/ AND-OR Invert Digital-ECl 100K, Gates, AND-OR/ AND-OR Invert Digital-HNILlHTl, Gates, AND-OR/ AND-OR Invert Digital-TTL, Gates, AND-OR/ AND-OR Invert Complex Gate w/ Persistance Detector Digital-Special Exclusive OR/NOR
Microprocessor-System Components; 8080
Floppy Disc Amplifier System Linear-Amplifiers - Special Purpose Floppy Disc Controller Microprocessor-System Components; PPS-4, 1600, 6800, 8000, 8048, 8080, 8085A, 9900, Peripheral Controllers Linear-Other Devices Fluid Detector Fluorescent Display Drivers Interface-Display Drivers FM Muting/Tuning Point System Linear-Consumer Circuits FM Radio Circuits Linear-Consumer Circuits FM RF/IF Amplifier Linear-Consumer Circuits Linear-Followers Followers
©
AND/NAND
Linear-Telecommunication Circuits
Fiber Optics Data Link linear-Other Devices Field Programmable Array logic Digital-TTL, Miscellaneous Memory-PlAs Field Programmable logic Array Memory-PlAs Microprocessor-System Components First In First Out Memory-FIFO Memory Microprocessor-System Components Flasher (lED) Flip-Flops
Digital-Special Linear-Consumer Circuits
Linear-Telecommunication Circuits Digital---"TTl-Gates, AND-OR/ AND-OR Invert
Facsimile, Frequency Generator
Fiber Optics Transm itter / Receiver
Microprocessor-Peripheral Controllers
Function Generator Linear-Phase locked loop Circuits
Gas Discharge Display Drivers
Fast Fourier Transformer
Section
Digital-CMOS, Gates, Exclusive OR/NOR Digital-ECl 10000, Gates, Exclusive OR/NOR Digital-ECl 100K, Gates, Exclusive OR/NOR Digital-ECl III, Gates, Exclusive OR/NOR Digital-HNILlHTl, Gates, Exclusive OR/NOR Digital-TTL, Gates, Exclusive OR/NOR
Majority logic
Digital-CMOS, Gates, Miscellaneous Digital-TTL, Gates, Miscellaneous
OR/NOR
Digital-CMOS, Gates, OR/NOR Digital-ECl 10000, Gates, OR/NOR Digital-ECl 95000, Gates, OR/NOR Digital-ECl 100K, Gates, OR/NOR Digital-ECl III, Gates, OR/NOR Digital-TTL, Gates, OR/NOR Digital-Special
Gate Expander
Digital-HNILlHTl, Gates, Miscellaneous
General Purpose Data Transceiver Digital-TTL, Miscellaneous
Ie MASTER Function General Purpose Interface Circuit General Purpose Input/Output General Purpose. Interface Bus Controller General Purpose Keyboard and Display
Section Microprocessor-System Components; 6800, General Purpose Microprocessor-System Components; PPS-4, TlCS-12, 1600, 4004
Microprocessor-8080, 8085A, 9900
Interface-Memory and Peripheral Drivers
Digital-TTL, Miscellaneous Interface-Error Checking Circuits
Identity Comparator Digital-TTL, Arithmetic Functions Image Sensor Impedance
Linear-Other Devices
Converter Input/Output Control Unit Interface latch
Linear-Other Devices
Element Interrupt Control Unit Interrupt Controllers, Programmable
Microprocessor-System Components
I/O Transceiver
Microprocessor-System Components; MicroNOVA
I/O Transceiver Buffer I R Transmitter / Receiver
Microprocessor-System Components; MicroNOVA Linear-Telecommunicat!on Circuits
Keyboard/ Disp lay Controller
Microprocessor-System Components; 8008, 8048, 8080, 8085 Keyboard Encoders Interface-Keyboard Encoders, Decoders Keyboard Interface, Programmable Microprocessor.-:....8085A
lamp Driver last In First Out Memory latches
Interface-Display Drivers
lED Display Drivers level Detector level Meter level Shifter
Interface-Display Drivers Linear-Other Devices Linear-Other Devices Digital-CMOS, Translators Digital-ECl-10000, Translators Digital-HNILlHTl, Translators Digital-TTL, Translators Interface-Memory and Peripheral Drivers
Memory-UFOs Digital-CMOS, latches Digital-CMOS, Drivers Digital-ECl 10000, latches Digital-ECl 95000, latches Digital-ECl 100K, latches Digital-ECl III, latches Digital-HNILlHTl, latches Digital-TTL, latches Microprocessor-System Components LCD Display Drivers Interface-Display Drivers
Microprocessor-System Components; PACE Microprocessor-System Components; 3000 Microprocessor-System Components, Various Families
Interrupt Controller Microprocessor-General Purpose Interrupter, Ground Linear-Consumer Circuits Fault Interval Timer
Linear-Timers Microprocessor-System Components; PPS-4, 8008, 8048, 8080, 8085
Inverters
Digital-CMOS, Buffers/Inverters Digital-HNILlHTl, Buffers/ Inverters Digital-HNILlHTl, Gates, Miscellaneous Digital-TTL, Buffers/ Inverters Digital-Special
I/O Buffer
Microprocessor-System Components; 1600, 8000
I/O Expander
Microprocessor-System Components 1000, 8048, 8080, 8085
I/O Port
Digital-TTl,Miscellaneous Microprocessor-System Components; SC/MP, 1800, 6100, 8X300, 8008, 8048, 8080,8005
16
Digital-TTL, Miscellaneous
L
Hall Effect Devices Digital-Special Linear-Other Devices Hamming Code Detector and Generator
I/O Register Array
Linear-Telecommunications Circuits
H Hammer Driver
Section
K Microprocessor-System Components; PPS-4
GPIB Talker Listener Interface Microprocessor-System Components; 8080, 8085 Ground Fault Linear-Consumer Circuits Interrupter Gyrator
Function
Light Activated SwitchLight Dimmer Light Detector Light to Current Converter
Linear-Other Devices Linear-Consumer Circuits Linear-Other Devices Linear-Other Devices
Light to Frequency Linear-Other Devices Converter Interface-Line Circuits, Single Ended Line Drivers Interface-Line Circuits, Differential Digital-ECl 10000, Miscellaneous Line Receivers Digital-ECl 100K, Miscellaneous Digital-ECl III. Misce.llaneous Interface-Line Circuits, Single Ended Interface-Line Circuits, Differential Interface-Line Circuits, Transceivers Line Transceiver Interface-Serial Transmitter-Receivers Link Controller Microprocessor-System Components; logic Processor 8000 look Ahead Carry Digital-CMOS, Arithmetic Functions Generator Digital-ECl 10000, Arithmetic Functions Digital-TTL, Arithmetic Functions Microprocessor-System Components; 2900, 3000
©
Ie MASTER 1983
MASTER SELECTION GUIDE-INDE}( Function loop Disconnect Dialer low Battery Indicator
Section Linear-Telecommunication Circuits Linear-Other Devices
Function Memory Refresh logic Circuits Micro Address Generator Microcomputer
Macroprogram Sequencer Magnitude Comparator
Microprocessor-System Components; 2900 Digital-CMOS, Arithmetic Functions Digital-TTL, Arithmetic Functions
Manchester Code Identification System
See Code Identification System
Mask Merge
Digital-ECl100l'< e~5
* 54179
Dlsa lIur.:bBr
480-104 478-41 478-47 478-53 896 478-67 501-103 3488-64 54195 896 501-108 896 3488-87 501-110 3488-65 897 501-118 897 3488-88 508-153 54196 508-155 508-158 508-160 508-164 54197 897 509-2
TI TI SSS Fairchild Motorola National Signetics TI
81154187 SN54188A SCL5419 54190 MC54190 OM54190 54190 81154190
Fairchild Ferranti Motorola National Signetics TI
54191 ZN54191 MC54191 OM54191 54191 Srl54191
Fairchild Ferranti Motorola National TI
54192 ZN54192 MC54192 OM54192 81154192
Fairchild Ferranti Motorola National Signetics 11
54193 ZN54193 MC54193 OM54193 54193 Sll54193
Fairchild
54194
Ferranti Motorola
ZN54194 MC54194
tJational
OM54194
Signetics
54194
TI
81154194
*
*
*
*
*
* *
Fairchild
54195
Motorola
MC54195
National
OM54195
Signetics TI
54195 81154195
* *
Fairchild Motorola National TI
54196 MC54196 OM54196 SU54196
Fairchild Motorola
54197 MC54197
*
Blsa II ur.-.tBr
Scurea
Davlca
54197
National TI
01.154197 SII54197
54198
Fairchild
54198
54199
542
National
OM54198
TI
8U54198
Fairchild
54199
National
OM54199
Signetics TI
54199 Sfl54199
AD
AD542J
AD542K
AD542L
AD5428
Dal&1
M.I-542r.1C
Ar.I-5421.!:.1
Oatel
AM-542MR
Dattl
Al.1542
HybridSys
AOC542B-8 AOC542C-8 STK542 [lE542
Sanyo 81gncllcs
TI
5420 ZN5420 LSI-5420 MC5420 OM5420 5420 SII5420
Fairchild Signetics FairChild TI
5421 5421 5422 8115422
54221
Signetics TI
54221 81154221
5423
Fairchild Motorola National TI
5423 MC5423 OM5423 8!15423
54240 54246
National TI
MM54240 81154246
54247
TI
81154247
54248
TI
81154248
54249
TI
81154249
5425
FairChild Ferranti Motorola National
5425 ZN5425 MC5425 OM5425 MM5425 5425 SN5425 OM54251
5420
Fairchild Ferranti LSILogic Motorola National (";,.. .... ,,+: .......
.... ,~IIUU ... .,)
5421 5422
54251
Signetics TI National
Pi~8-Llr.a
478-54 * 904 478-68 502-47 3490-2 502-50 3490-8 * 904 502-52 * 904 3490-13 502-54 3490-3 502-57 3490-9 502-59 * 905 502-61 * 905 3490-14 *3153 2921-42 \I 266-7 *3153 2920-32 \I 266-7 *3153 2918-6 \I 266-7 *3153 2920-31 \I 266-7 *2623 2887-92 2915-9 *2620 2887-93 2915-4 2887-94 2915-5 *2613 *2614 2426-53 2426-54 2955-77 *3393 2898-10 490-82 490-84 4140-148 490-87 490-89
Blsa lIur.:bBr
Sourca
Davlca
54251
TI
SII54251
54259
5426
54265 5427
54273 54276 54278 54279
5428
54283
54284
54285 54290
54293
*
54298
~:;Q-92
* 839 543 490-94 488-165 488-167 490-~6
* 840 490-49 500-138 * 906 500-140 494-4 494-7 494-9 * 840 494-11 2486-14 * 913 2464-14 * 913 2463-171 * 914 2463-130 * 914 2463-96 493-172 493-174 493-177 493-179 2902-20 493-181 494-2 500-31
Pa.a-Llna
* 915 500-33 National OM54259 496-25 TI 81154259 * 917 496-31 Fairchild 5426 484-78 Motorola MC5426 484-81 National OM5426 484-83 Signetics 5426 484-89 TI 8U5426 * 841 484-91 SU54265 TI * 918 507-114 494-30 Fairchild 5427 Ferranti ZN5427 494-32 Motorola MC5427 494-35 National OM5427 494-37 494-39 Signetics 5427 TI SII5427 * 842 494-41 SII54273 TI * !ll!1 TI 8rJ54276 * 920 488-161 81154278 TI * 921 508-56 Fairchild 54279 495-161 Signetics 54279 495-164 81154279 TI * 921 495-166 494-84 Ferranti ZN5428 Signetics 5428 494-93 TI 8tl5423 * 842 494-97 54283 476-44 Fairchild 476-48 Ferranti ZN54283A 81:54283 TI * 922 476-60 01.154284 475-111 National TI 81J54284 * !l23 475-112 81:54235 TI * 923 475-109 Motorola MC54290 480-44 TI 81154290 * 924 480-52 Fairchild 54293 479-23 Motorola MC54293 479-33 TI SII54293 925 479-41 Fairchild 54298 499-68 Motorola MC54298 499-70 499-72 Signetics 54298 8U54298 TI * 926 499-74 Ar.1-543r.~C *2623 Dalel 2887-95 2914-45 AU-5431.m *2620 2887-96 2914-43 AM-543MR 2887-97 Oatel 2914-44 Dalel Ar.1543 *2614 Fairchild 5430 492-60 492-62 Ferranti ZN5430 492-65 Motorola MC5430 National OM5430 492-67 MM5430 2900-111 2904-74 Panasonic AN5430 492-69 Signetics 5430 8115430 TI * 842 492-71 SCL54301 2899-143 SSS MM5431 2900-112 National 2904-75 Panasonic AtJ5431 493-120 Fairchild 5432 Ferranti ZN5432 493-122 493-125 National 01.15432 493-127 Signetics 5432 8::5432 TI * 843 493-129 494-63 Signetics 5433 8rl5433 TI * 843 494-65 2904-76 Panasonic AN5435 476-157 National 01.154365
5430
54301 5431 5432
5433
5435 54365
\I Indicates page number in Application Note Oirectory. * Indicates additional data is provided on the page. noted. ©
Ie
r~~ASTER
1983
101
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r. ~
'---
Ie MASTER BISI
Sou rca
Davlea
54365
Signetics
54365A
TI
8N54365A
54366
54367
National
5437
54366A
TI
81154366A
National
DM54367
Signetics
54367A
8N54367A
National
DM54368
Signetics
54368A
TI
8"54368A
Fairchild Ferranti Motorola National Signetics TI
8H5437
TI
8N54376
5438
Fairchild Ferranti Motorola National TI
5438 ZN5438 MC5438 DM5438
54390
Signetics TI TI
165 485-18
* 935
*
*
*
5437 ZN5437 MC5437 DM5437 MM5437 5437
54376
5439
Plga-Lln.
DM54366
Signetics
TI
54368
Bua
BUI
Number
8N5438
8N54390
5443
TI
8N5443A
5444
Fairchild Motorola TI
5444 MC5444
5445
935 117 485-23 158 485-16 166 485-20
936 170 485-24 706 485-15 114 485-19
*
118 485-23 491-82 491-84 491-87 491-89 2896-42 491-93
54452 54453 54454 54455 54456 5446
491-46
943 481-40 943 479-8
8N54393
*
AD544J
*3153 2921-45 \I 266-7
482-137 481-66 479-6 482-20 480-35 474-5 2464-5 2464-10 2464-12 \I 259-15
National
MI.15446
MC54460 MC54468
5447
Fairchild Motorola National
5447 MC5447 DM5447A
IIltlonal
~m5447
* 735
TI
8N5448
* 847
8N5440
5449
545
Fairchild Motorola TI
8"5449
* 847
TI
8N54490
* 955
AD
8N5442A
* 845 * 946
54426
TI
8N54426
* 946
AD545J AD545K
*3153
AD545L
*3153
AD545M
*3153
5450
Fairchild Motorola
5443 MC5443
*3327
1.11.15457
*3327
5465 5466
5470
* 735 . 2464-92 492-153 5473 2899-144
8N5450
* 848
LS5451 5451
492-155 492-165 492-167 492-170 492-172 5474
* 735 2464-93 493-5 492-174
* 848
5452
tlatlonal
"""5452
* 735
5453
Fairchild Ferranti Motorola National
5453 ZN5453 MC5453 DM5453
492-176 2466-2 493-75 493-77 493-80 493-82
5475
Fairchild Ferranti Motorola National
5476 ZN5476 MC5476 DM5476 MM5476 5476
5476
Signetics TI 5477
National lIatlonal
1,u15458 • * 735 SCL5458
MI.15459
2899-24
* 735
MD545C239 uPD546 5460 MC5460 DM5460 5460
8N5460
454-54 1088-70 493-19 493-22 493-24 493-26 493-27 2899-10 2899-11 2899-71
5482
5483
*3327 2899-12 2899-13
MM5465
JAr,15466
5481
* 852
MM5462 MM5463 SCL5463
1.\1,15464
548 5480
2899-14
AD
AD547J
5475
Fairchild Motorola National TI National SSS NEC-Micro Fairchild Motorola TI SSS TI Fairchild Ferranti SSS TI Fairchild Ferranti Motorola National
* 735 Signetics SSS TI
*3151 *3153
8N5475
Plga-Llna
495-126
* 858 495-128 488-36 488-38 488-41 488-43 2464-89 488-45
8115476
* 858 488-47 495-149 495-150 2464-90
5477 MC5477 MM5477
8115477
* 859 495-152 2464-91 2899-145 1088-73 474-141 474-142
MM5478 SCL5478 uPD548 5480 MC5480
8115480 SCL5481
8115481 5482 ZN5482 SCL5482
8115482
* 860
*
AD547K
*3151 *3153
AD547L
*3151 *3153
5484
National SSS TI
5485
~airchild
NEC-Micro uPD547 uPD547L Fairchild 5470 Ferranti ZN5470 Motorola MC5470 National DM5470 SSS SCL5470 8115470 TI SSS Fairchild Ferranti Motorola National SSS TI Fairchild Ferranti Motorola National Signetics TI Fairchild Ferranti Motorola National
SCL5471 5472 ZN5472 MC5472 DM5472 SCL5472
8N5472 5473 ZN5473 MC5473 DM5473 5473
8115473 5474 ZN5474 MC5474 DM5474 MM5474 5474 SCL5474
Signetics SSS TI
8N5474
Fairchild Ferranti Motorola National
5475 ZN5475 MC5475 DM5475
*3151 *3153 2917-56 1088-71 1088-72 487-59 487-61 5486 487-63 487-65 2899-175
Ferranti Motorola National Signetics SSS TI Fairchild Ferranti Motorola National
* 855
*
*
487-68 2899-176 487-72 487-74 487-77 5488 487-79 5489 2899-177
856 487-81 5490 487-163 487-167 487-173 487-177 487-161
Signetics SSS TI TI AMD Ferranti Fairchild Ferranti Motorola National Signetics TI
* 857
MM5483 5483 SCL5483
8115483A
* 861
MM5484 SCL5484
8115484 5485 ZN5485 MC5485 DM5485 MM5485 5485 SCL5485
8N5485
*
8"5486 8115488 AM5489 AM5489-1 ZN5489 5490 ZN5490A MC5490 DM5490 5490
8115490A
485-65 495-117 495-119 495-122 495-124
5491
Ferranti
ZN5491A
Motorola
Signetics
MC5491 MC5491A DM5491A SN5491A 5491
TI
8N5491A
476-61 2465-144 2899-103
861 474-35 474-41 474-45 474-51 2465-134 474-57 2899-171
* 862 474-62 495-6 495-8 495-11 495-15 2463-54 495-20 2899-172
5486 ZN5486 MC5486 DM5486 MM5486 5486 SCL5486
Fairchild
National
860 474-157 474-159 2899-146
474-162 476-45 476-49 476-54 476-56 \I 228-7 2466-14 476-58 2899-147
5483 ZN5483A MC5483 DM5483
* 862
.*
*
856 487-185 5491 485-54 485-56 485-59 485-61 2464-88 485-63 2899-72
474-144 2899-170
* 860
2920-35
2917-21
r.1"'5450
8115451
Signetics TI
2899-9 503-108 5478
SN545740
AD5478
2917-13 5471 2896-55 5472 492-143 492-145 492-148 492-150
SGS Signetics TI
5475
2917-55
5450 SCL5450
1.11.15451
Davlee
2899-8
Signetics SSS TI
5451 ZN5451 MC5451 DM5451
493-72 2899-7 2899-70
1.11.15456
NE545B 5450 ZN5450 MC5450 DM5450
Fairchild Ferranti Motorola National National
Source
* 850
Natlonll
Signetics Fairchild Ferranti Motorola National Nallonal
476-140
5443
8N5454
493-84 493-63 493-65 493-68 493-70
5457
2917-47
483-23
476-114 482-100 482-103
*3153
Number
* 849
5456
2920-12
.490-7 508-101 5451 2464-66 507-22 482-153 483-3 483-6 483-10 483-18
8N54425
5449 MC5449
* 735
MM5455 SCL5455
2463-131 2463-79 2463-85
2920-13
* 845
TI
5454 ZN5454 MC5454 DM5454
Plge-Llna
National SSS Ilatlonil
5455
481-41
1765-6 2906-113 489-186 489-188 489-191 490-2 490-5
54425
Fairchild Ferranti Motorola National TI
2463-97 54490
*3153
MC54408 DM5441A SN544167 5442 ZN5442 MC5442 DM5442 5442
MM5453 8N5453
2464-97
*3153
Motorola National TI Fairchild Ferranti Motorola National Signetics TI
5454
2463-172 547 2463-104 2463-113 2463-121
M1.15448
2918-1
54408 5441 544167 5442
* 847
5448 MC5448 DM5448
\I 266-7
5440
* 735
Fairchild Motorola National Hatlonal
2920-27
2920-30
8115447A
Nillonil TI
545740 TI 5458 Nltlonal SSS 5459 lIallonll 545C239 Mitel 546 NEC-Micro * 735 5460 Fairchild 2464-95 Motorola * 847 National 2464-15 Signetics 506-3 TI 505-130 2485-50 National 2463-147 5462 National 2463-157 5463 SSS 2463-163 Natlonll 5464 \I 259-15 2464-96
TI
Davlea
* 735
MC54452 MC54453 MC54454 MC54455 MC54456 5446 MC5446 DM5446A
8115446A
Blae
Source
2466-3
482-97 482-129 482-132 482-134
Motorola Motorola Motorola Motorola Motorola Fairchild Motorola National
*3153
\I 266-7
* 846
* 846
\I 266-7
iSBC544 NE544 5440 ZN5440 MC5440 DM5440 5440
482-105 482-93 482-95
8N5445
Motorola Motorola
* 844
AD
Intel Signetics Fairchild Ferranti Motorola National Signetics TI
rm5445
Numblr
* 846
TI
TI
491-45 491-42
TI
AD5448
5445 MC5445 DM5445
54460 54468
491-95 939 488-159 491-32 491-35 5448 491-38 491-40
544
AD544L
8N5444A
Plga-Llna
2464-94
* 844
*
Fairchild Motorola National Nltlonal
Davlea
936
54393
AD544K
Sourea
* 844
5439
8115439
169 485-22 105 485-15 113 485-19
Number
*
495-22
863 3471-75 3471-39 497-36 480-37 480-40 480-45 480-48 480-50
864 480-53 502-121 3491-3 502-123 3491-5 502-126 3491-7 502-128 3491-9 502-130 3491-11 8~4 502-132
* 864 3491-13
Arranged alphanumerically from left to right.
102
©
Ie MASTER
1983
PART NUM8ER Basa Ilcmber
Sourca
5492
5493
5494
5492 ZN5492A MC5492 DM5492A SN5492A 5492 SII5492A
Fairchild Ferranti Motorola National Signetics TI
5493 ZN5493A MC5493 DM5493A 5493 SII5493A
Fairchild
5494
Ferranti Molorola
ZN5494 MC5494
Signetics TI
5494 SII5494
5495
Ferranti
ZN5495A
Molorola
MC5495A
National
5496
PIGe-Line
Fairchild Ferranti Motorola National RIFA Signetics 11
Fairchild
5495
Davlce
DM5495
Signetics
5495A
TI
SII5495A
Fairchild
5496
Ferranti
ZN5496
Molorola
MC5496
Nalional
DM5496
Signelics
5496
TI
SII5496
482-26 482-28 482-31 482-33 482-35 482-36 * 864 482-38 479-24 479-29 479-34 479-37 479-39 * 865 479-42 501-131 3489-77 3489-79 501-134 3489-81 3489-83 * 865 501-137 * 865 3489-85 501-77 3488-67 501-80 3488-72 501-83 3489-27 501-85 3488-79 501-87 3488-83 * 866 501-89 * 866 3488-90 501-178 3489-101 501-180 3489-103 501-183 3489-106 501-185 3489-108 501-187 3489-110 * 866 502-2 * 866
Dasa /lumbar
Davlce
Source
54ALS05 1,1010ro13
SII54ALS05 * 732 477-68 Sfl54ALS05 * 834 477-70
TI
Fairchild Molorola TI
5497 MC5497 SII5497
508-75 508-77 * 866 508-79
54ALSOO I.lolorola National TI 54ALSOl Uolcrola TI 54ALS02 I.!nlorola National TI 54ALS03 r,lclcrcla TI
SII54ALSOO * 732 492-11 492-13 DM54ALSOO SII54ALSOO * 833 492-15
1,1010ro13
National TI
54ALS1242 TI
S!l54ALS08 * 732 54ALS1243 489-135 TI DM54ALS08 489-139 SU54ALS08 * 835 54ALS1244 TI 489-143
National TI 54ALS09 1,1010rola
SII54ALS09 * 732 489-97 SII54ALS09 * 836 489-99
TI
54ALS1245 TI
I,lolorola TI 54ALS1000 TI 54ALS1002 TI
S1154ALS1002* 1013 54ALS137 494-107 TI
54ALS1003 TI
S1l54ALS100l* 1014 . 54ALS138 491-151 !.Iolorola
54ALS1004 TI
Srl54AlSl00h 1014 477-173
54ALS1005 TI
S!l54ALS1005* 1014 477-71
54ALS1008 TI
SI154ALS100h 1015 489-144
TI 54ALS139 I,\olorola TI
54ALS14 I.lolorola S1154ALS10l0* 1015 490-185 54ALS15 I.lolorola S1I54ALS1011 * 1015 11 489-45
54ALS1010 TI 54ALS1011 TI 54ALS1020 TI
Srl54ALS1020 * 1016 490-99
54ALS1032 TI
SII54ALS1032 * 1016 493-135
54ALS1034 TI
SIi54ALS103h 1017 174 485-25
54ALS1035 TI
54ALS151 1.1010rola TI 54ALS153 1.lolorola TI
S1I54ALS1035* 1017 54ALS157 476-155 1.1010rola
54ALS109 I.lolerola
SII54ALS109 * 732 TI 487-121 DM54ALS109 487-123 54ALS158 SU54ALS109 * 870 1,1010rela 487-125
IJational TI
54ALSl1 I.lolorola S:154ALSOI * 732 491-145 TI S!l54ALSOl * 033 491-149 54ALS112 TI SIl54ALS02 * 732 494-100 54ALS113 DM54ALS02 494-104 National S!l54ALS02 * 833 11 494-106 54ALSl14 Srl54ALS03 * 732 TI 491-146 SU54ALS03 * '834 54ALS12 1,:~lcral~ 491-150
SII54ALSll * 732 489-43 SU54ALSll * 836 489-46 SU54ALS112 * 871 488~ 104
DM54ALSl13 488-70 SII54ALS113 * 871 488-71 SU54ALS114 * 872 488-135
TI 54ALS160 1,1010ro13 National TI 54ALS161 r.lolerala National TI
54ALS1616 TI SU54ALS12 * 732 490-151 54ALS162 1,1 olcrc la SII54ALS12 * 837 490-153 National TI SU54ALS1240* 1018 503-120
SU54ALS04 * 732 TI 477-168 477-170 54ALS1240 DM54ALS04 TI SII54ALS04 834 477-172
*
'11
Page-Line
Davlce
Sl154ALS1241 * 1018 504-25 SII54ALS1242* 1018 503-39 SII54ALS1243* 1019 503-40 SI154ALS124h 1019 504-26 SI154ALS124h 1019 504-167
54ALS13
1,lolcrola SII54ALS10 * 732 54ALS131 490-182 TI SII54ALS10 * 836 490-184 54ALS132 1,lolorola Srl54ALS1000 * 1013 54ALS133 492-16 TI
54ALS10
54ALS04 1.lalcrola
Source
54ALS1241 TI
54ALS08
::J~:;3-11';
5497
PIGs-Lina
Basa Ilumbor
SII54ALS13 * 732
BISI lIumbor
Source
54ALS1620 TI 54ALS1621 11 54ALS1622 TI 54ALS1623 TI 54ALS163 r,lolorola National TI
SII54ALS131 * 876 484-18
54ALS1638 11
SII54ALS132 * 732
54ALS1639 TI
SII54ALS133 * 877 492-117 54ALS164 I.lolorola SII54ALS137 * 879 484-11 11 SII54ALS138 * 732 54ALS1640 483-148 TI SII54ALS138* 880 ~ 483-152 54ALS1641 TI 54ALS1642 SII54ALS139 * 732 TI 483-54 S!l54ALS139 * 880 483-56 54ALS1643 11 Sfl54ALS14 * 732 54ALS1644 TI SII54ALS15 * 732 489-11 54ALS1645 SII54ALS15 * 838 11 489-13 SII54ALS151 * 732 499-155 54ALS165 SII54ALS151 * 884 TI 499-157 SII54ALS153 * 732 498-27 SII54ALS153 * 884 498-29 SU54ALS157 * 732 499-24 SII54ALS157 * 887 499-26
54ALS166 TI 54ALS168 !.lolorola TI
Devlca
Pita-Lin a
S1I54ALS1620* 1021 505-103 SII54ALS1621 * 1021 505-83 Sl154ALS1622* 1021 505-84 SU54ALS162l* 1021 505-104 SII54ALS163 * 732 478-169 DM54ALS163 478-171 SII54ALS163 * 890 478-173
i~olorola
SII54ALS161 * 732 54ALS16R8 478-122 TI DM54ALS161 478-124 _SII54ALS161 * 889 54ALS174 478-126 Motorola TI S::54ALS 1616 1020 54ALS175 SU54ALS162 * 732 TI 480-187 DM54ALS162 481-2 54ALS190 I,laterola SU54ALSI62 * 890 481-8
Sfl54ALS 1639 * 1022 504-84 SII54ALS164 * 732 502-26 SII54ALS164 * 891 502-28 SN54ALS 1640 * 1023 504-117
Ie
[\~ASTER
1983
§ ~
r.::
S g ~
SN54ALSl641
504-149
S1I54ALS1642* 1023 504-97
ffi' ?':"";
~,
S1I54ALS1643 * 1023 504-118 ~
Srl54ALS 1644 * 1023 505-30 Sfl54ALS1645 * 1023 504-168 *1023 2478-43 SII54ALS165 * 891 502-77 SII54ALS166 * 891 502-97 SII54ALS168 * 732 481-94 SII54ALS168 * 892 481-96 Sii54ALS169 * 732 479-93 SII54ALS169 * 092 479-95 FP54AlS 16LB
506-91
506-93 3457-1 Srl54ALS16Rh 1025 FP54AlS16R4
FP54AlS 16R6
506-94 3457-2
FP54AlS16RB
506-95 3457-3
MC54ALS174 486-56 Srl54ALS174 * 095 486-58 SU54ALS175 * BllS 485-124 SII54ALS190 * 732 481-174
Indicates page number in Application Note Directory.
* Indicates additional data is provided on the page noted. ©
--
Srl54ALS1638* 1022 504-83
54ALS169 _
SII54ALS158 * 732 TI 498-118 SII54ALS158 * 807 54ALS16L8 498-120 TI 54ALS16R4 S!l54ALS160 * 732 TI 480-145 DM54ALS160 480-147 TI SU54ALS160 * 089 54ALS16R6 480-149 TI
*
I~JDE)(
103
Ie
MASTER
Ban Number
Source
54ALS190 TI 54ALS191 Motorola TI 54ALS192 Motorola TI 54ALS193 l.Iotorola TI
Davlce
SN54ALS190
Pagl-line
*
* . SII54ALS191 * SN54ALS191
* SII54ALS192 * SII54ALS192
901 481-176 732 479-135 901 479-144 732 481-138 902 481-140
* 732 480-3 SII54ALS193 * 902 SI154ALS193
Basa Number
l.Iotorola
SII54ALS20
TI
SII54ALS20
* *
TI
SII54ALS21
*
54ALS21
54ALS217 TI
54ALS218 TI
SII54ALS217
SII54ALS218
54ALS22 "'otorola TI 54ALS238 l.1otorola 54ALS239 I,totorola 54ALS240 Motorola National TI
SII54ALS22 SI154ALS22
Page-line
54ALS245 TI
SH54ALS245
504-169 54ALS37 Motorola 913 2478-44
54ALS251 Uotorola
SII54ALS251
TI 54ALS253 l.Iotorola TI
TI
54ALS242 Uotorola
SI154ALS242
National TI
DM54ALS242 SII54ALS242
54ALS245 Uotorola National TI
440 905 497-69 440 906 497-65 732 490-51 840 490-53 732
S1I54ALS243 DM54ALS243 SH54ALS243
SII54ALS244
*
54ALS258 I,totorola TI
* *
* * * * * * *
732 503-31 503-35 911 503-41 911 2476-35 732 503-32 503-36 912 503-42 912 2476-36
54ALS260 TI 54ALS27 I,totorola
* *
* 732 497-139 SII54ALS253 * .915 SII54ALS253
* 732 498-156 SI154ALS257 * 916 SII54ALS257
* 732 498-78 SI154ALS258 * 917 SI154ALS258
TI
SII54ALS259
SI154ALS27 SII54ALS27
SII54ALS273
National TI
DM54ALS273 SII54ALS273
54ALS28 r,totorola
SII54ALS28
TI
SII54ALS28
TI 54ALS318 TI
SII54ALS299
SII54ALS30
SII54ALS317
SII54ALS318
54ALS32 l.1oterela National
TI
SII54ALS32 DM54ALS32 SII54ALS32
54ALS323
TI
SH54ALS323
54ALS33 Uotorola
SII54ALS33
TI
SI154ALS33
54ALS352 l.1otorola
*
SN54ALS260
54ALS273 l.1otorola
732 TI 503-110 DM54ALS244 503-112 54ALS353 Uotorola S1I54ALS244 912 503-165 TI 912 2470-51 54ALS366 SII54ALS245 732 TI 504-163 54ALS367 DM54ALS245 504-165 TI SII54ALS245 913
* *
TI 732 500-35 915 500-37
54ALS373 Motorola
* * * * * *
* * * *
* * * * *
* *
917 496-33
SII54ALS37
SH54ALS373
*
DM54ALS373 SN54ALS373
National TI 54ALS377 ',totorola
DM54ALS374 SN54ALS374
National
DM54ALS377
I,totorola
SII54ALS38
TI
SII54ALS38
SII54ALS374
SII54ALS377
54ALS38
54ALS40 Motorola
SII54ALS40
494-13
TI
S1I54ALS40
732 494-43 842 494-45
54ALS465 TI 54ALS466
TI
54ALS467 732 TI 486-146 54ALS468 486-148 TI 54ALS474 919 TI 486-150 54ALS518 TI 732 494-101 54ALS519 842 TI 494-108
SN54ALS366 SN54ALS367
* *
* * * * *
* SII54ALS466 * SI154ALS467 * SII54ALS468 * SII54ALS465
SN54ALS474
SII54ALS519
*
54ALS520 927 TI 502-144
SII54ALS520
*
842 492-74
54ALS521 TI
SII54ALS521
*
440 928 497-67
54ALS522 TI
SII54ALS522
*
440 928 497-63
54ALS533 Uotcrel3
TI
54ALS534 732 l.1otorola 493-131 493-133 TI 843 493-136 54ALS537 J.1otorola 930 502-145 54ALS538 Uotorela 732 494-67 843 494-69
TI 54ALS539 ,",otorola
TI
497-117 54ALS540 l.1otorola TI 732 54ALS541 497-84 Motorola 933 TI 497-85 54ALS560 r,totorela 477-52 175 485-25
TI
732 491-97 844 491-99 732 496-48 496-52 496-56
* SII54ALS533 * SIl54ALS533
Base Number
Source
54ALS561 Motorola TI 54ALS563 Motorola
TI 54ALS564 Motorola
732 486-171 TI 486-175 486-179 54ALS568 !.!otorola 732 487-38 TI 487-40 54ALS569 Motorola 732 491-49 TI 844 491-51 54ALS573 Motorola 732 490-9 National 845 490-11 TI 952
952 952
956 474-94 956 474-95
S1I54ALS561
PIUI-lInl
*
SN54ALS561
* SN54ALS563 * SI154ALS563
* SN54ALS564 * SH54ALS564
* SII54ALS568 * SII54ALS568
* SI154ALS569 * SII54ALS569
*
DM54ALS573 SII54ALS573
*
54ALS574 Motorola
SN54ALS574
*
National TI
DM54ALS574 SII54ALS574
*
54ALS575 TI
SI154ALS575
*
54ALS576 Motorola
SII54ALS576
*
National TI
DM54ALS576 SI154ALS576
*
SII54ALS577
*
956 474-80
54ALS577
956 474-81
54ALS580 ,",otorola
956 474-82
National
TI
TI
54ALS620 732 l.1oterela 496-106 957 National 496-114
* 732 486-115 SII54ALS534 * 957
Davlee
SII54ALS573
952
1094-106
*
* 732 497-115 SII54ALS352 * 932
SII54ALS353
*
SII54ALS518
SII54ALS352
SII54ALS353
Plge-Llne
* *
SH54ALS37
National TI 54ALS374 I,'otorola
498-80 54ALS259 TI
732
732 504-21 504-23 911 504-27 911 2470-50
* SII54ALS251 *
Davlce
498-158
* *
DM54ALS241 SII54ALS241
National TI
839 488-169
*
Source
497-140 54ALS257 Motorola
732 503-116 54ALS299 TI DM54ALS240 503-118 SI154ALS240 910 503-121 54ALS30 TI 910 2471-20 54ALS317
National TI
54ALS244 Motorola
* *
* SI154ALS239 * SH54ALS240 *
SI154ALS241
National TI
* *
SI154ALS238
54ALS241 Motorola
54ALS243 Motorola
* *
732 490-97 839 490-100
Basa Number
Davlce
480-5 54ALS20
Source
TI
SI154ALS580
*
DM54ALS580 SH54ALS580
*
S1I54ALS620
*
DM54ALS620 SII54ALS620
*
SII54ALS534
54ALS621 Uoterela
486-119
* SII54ALS538 * SII54ALS538 * SII54ALS537
* SII54ALS539 * SII54ALS539
* * SII54ALS541 * SII54ALS541 * SII54ALS560 * SII54ALS560 * SII54ALS540 SII54ALS540
TI 732 732 483-149 958 483-153 732 483-50 959 483-52 732 960 732 960 732 481-68 961 481-70
* S1I54ALS621 *
SII54ALS621
54ALS622 Motorola
SII54ALS622
*
National TI
DM54ALS622 S1I54ALS622
*
54ALS623 l.1otorola
SH54ALS623
*
DM54ALS623 S1I54ALS623
*
National TI 54ALS632 TI 54ALS633 TI 54ALS634
732 482-78 482-80 732 496-107 962 496-115 732 486-116 962 486-120 732 481-90 963 481-92 732 479-86 963 479-87 732 496-49 496-53 964 496-57 732 486-172 486-176 964 486-180 964 486-181 732 489-136 489-140 965 486-121 965 486-182 732 496-108 496-112 966 496-116 732 505-93 505-97 976 505-105 732 505-81 976 505-85 732 505-79 505-98 976 505-86 732 505-94 505-99 976
SN54ALS632
509-49
SN54ALS633
509-50
TI
SN54ALS634
509-51
54ALS635 TI 54ALS636
SN54ALS635
509-52
TI
SN54ALS636
508-95
Arranged alphanumerlcally from left to right.
104
~:
~':""".
~
I
~•.~-:"~~.r,
I
%~~";/' ·::':;~t.
..
~
:' 'l,: ;
.
,.,':,'"
.
",~,
,
-.:...-
Device
Paga-L1na
3474-4 3474-7 3474-8 3474-59 3474-36 3473-111 65X61 Intel Intersil 3474-30 3473-112 3473-113 3474-5 3474-6 3474-57 3474-31 2930-11 66 MicroEng 1088-120 Rockwell Siliconix 2481-39 Molorola 660 729 472-76 Ilational Clr.1-660 *1955 4007-4 PC/M 660 2903-174 Signetics TCA660B 2906-141 Telefunken SAS660 ~ 274-5 Unllroda PIC660 *3446 2961-88 6600 " Harris H06600-2 *3745 507-116 H06600-5 *3745 507-117 2906-142 Telefunken SAS6600 66016 Synarlek SY66016 *1549 475-119 Motorola MC661 472-77 661 Plessey 2901-38 TAA661 2905-12 Unltroda PIC66! *3446 2961-89 Telefunken SAS6610 2906-143 6610 Harris HM6611 460-137 6611 HM6611-2 3460-12 HM6611-9 3460-13 HI,16616-2 * 669 6616 Harris *1333 *3786 3464-121 HM6616-9 * 669 *1333 *3786 3464-122 662 Motorola MC662 472-44 Unllroda PIC662 *3446 2961-90 472-64 663 Motorola MC663 6632 Motorola MCM6632-15 3469-51 MCM6632-20 3469-56 MCM6632-25 3469-62 MCM6632A-12 3469-46 MCM6632A-15 3469-52 MCM6632A-20 3469-57 MCM6633-15 3469-53 6633 Motorola MCM6633-20 3469-58 MCM6633-25 3469-63 472":65 664 Motorola MC664 6640 Plessey 2901-79 SL6640 ~ 271-12 6641 Harris HM6641 * 669 *1333 *3783 " 460-110 ~ 286-2 HM6641-2 * 669 * 1333 *3783 3461-91 If 286-2 H..,6641-9 * 669 *1333 *3783 3461-92 If 286-2 Motorola MCM6641-20 3482-31 MCM6641-25 3482-45 MCM6641-30 3482-74 MCM6641-45 3482-101 6646 Harris HM6646 3466-11 Motorola 473-33 665 MC665 65X51
~" ','t"!t'
Source Intersil
IM65X51-1M IM65X51A IM65X51AM IM65X51C IM65X51M IM65X61-1 IM65X61 IM65X61-1 IM65X61-1M IM65X61A IM65X61AM IM65X61C IM65X61M MCE66 A66XX VN66AF MC660 *
Basa Number
Source
Davlca
6650
Plessey
SL6650
6654
Inlersil
6657
Intersil
6658
Inlel
666 6661
Motorola Harris
6664
1.1010rola
Paga-L1na
2901-80 ~. 271-12 3461-96 IM6654 IM6654-1 3461-95 3461-93 IM6654A IM6654M 3461-97 3464-40 IM6657 3464-41 IM6657M 3463-75 IM6658 3463-76 IM6658M 473-34 MC666 3460-14 HM6661 3460-15 HM6661-5 r,ICM6664-15 * 3839 *3842 3469-92 ~ 287-17 ~ 287-18 UCI.l6664-20 * 3839 *3842 "3470-17 ~ 287-17 ~ 287-18 /.ICr,16664-25 * 3839 *3842 3470-29 ~ 287-17 ~ 287-18 1.ICI.I6664A-12 3839 *3842 3469-71 ~ 287-17 ~ 287-18 1.1W6664A-!5 3839 *3842 3469-93 ~ 287-17 ~ 287-18 1.lCI,16664A-ZO 3839 *3842 3470-18 ~ 287-17 ~ 287-18 1.1Cr.l6665-15 * 3839 *3843 3470-1 r.ICI.16665-20 * 3839 *3843 3470-19 /.lCr,16665A-12 3839 *3843 3469-78 I.lCr.16665A-15 3839 *3843 3470-2 r.ICI.16665A-20 3839 *3843 3470-20 473-12 MC667 1,ICU6670 *3840 3453-16 r,ICr.166700 *3840 3453-43 1.1Cr.166710 *3840 3453-44 MCI.166714 *3840 3453-45 I.1C1.166720 *3840 3453-46 MCI.!66730 *3840 3453-47 I.tCM66734 *3840 3453-48 rml6674 *3840 3453-17 r.tCr.166740 *3840 3453-49 ml.166750 *3840 3453-50 MCM66751 3453-51 1,1Cf.l66760 *3840 3453-52 r.tC 1.16677 0 *3840 3453-53 1.ICI.I66780 *3840 3453:S4
Basa Number
Source
Devlca
66790
Molorola
668 6688
Motorola AI,10
MCM66790 *3840 68 3453-55 472-97 MC668 AM6688 *3109 2965-147 A1.16688L-6 *3109 2965-148 Af,16688L-7 *3109 2965-149 AI.16688L-8 *3109 2965-150 AP.16688r.1-6 * 3109 2965-151 AI,166881,1-7 *3109 2965-152 Ar,16688U-8 *3109 2965-153 MC669 473-4 SL6690 2901-81 ~ 271-12 MCM66L41-20 3482-32 MCM66L41-25 3482-46 MCM66L41-30 3482-75 MCM66L41-45 3482-102 472-18 MC67B 680 472-88 MC670 2906-144 SAS670 PIC670 *3446 2961-91 2906-145 6800 SAS6700 1049-11 6701 472-89 MC671 TCA671 2889-24 PIC671 *3446 2961-92 2906-146 SAS6710 HM6716-2 3465-33 HM6716-9 3465-34 NMC6716 3465-81 3465-41 N~C6716-1 NMC6716-2 3465-50 MC672 472-98 PIC672 *3446 2961-93 A0673J *3174 2428-6 A0673S *3174 2428-7 MC673 472-116 ~ 276-9 2967-36 TBA673 2967-37 TBA673 MC674 472-117 3456-53 67401A C67401 * 722 3456-42 C67401A * 722 3456-43 C67401B * 722 3456-44 C67402 * 722 3456-50 C67402A * 722 3456-51 3456-54 C6'7402B * 722 3456-52 2929-20 CA6741 R675B-1 2966-140 R675B-3 2967-3 R675B-4 2966-141 R675B-5 2966-142 R675C-1 2966-143 R675C-3 2967-4 R675C-5 2966-144 MC675 473-41 475-152 67558 67558-1 475-153 HM6758-9 3463-69 MC676 472-35 2465-116 MC677 472-8 MC678 472·4 472-17 2951-5 AN6780 ACS/68 1759-16
669 6690
Motorola Plessey.
66L41
Motorola
67 670
Motorola Motorola Telefunken Unllroda
6700 6701 671
Telefunken MMI Motorola Siemens Unllroda
6710 6716
Telefunken Harris
* *
. 6665
r,lolorola
*
National
672
673
674 67401
*
667 6670
Motorola 1.lolorola
66700
1.1010rola
66710
I.lolorola
66714
Molorola
66720
l.Iolorola
66730
1,lolorola
66734
MOlorola
6674
I.lolorola
66740
',Iolorola
66750
I.lolorola
66751 66760
Motorola ',Iolorola
66770
1,lolerola
66780
1.1010rola
AD
Motorola
* *
Motorola Unitroda
Plessey Signetics Motorola MMI 1,11.11
67402
1.1P.11
6741 675
RCA HybridSys
67558
Motorola MMI
6758 676
Harris Motorola
677 678
Motorola Motorola
6780 68
Panasonic ApplSys
page-L1na
Basa Number
Sourca
Device
Fairchild
PEP68
Heurikon l.Iotorola
Page-Line
*1718 1622-3 MLZ-68 1769-4 P.168BSAC * 1729 M68BSAE *1729 r,168EOJTI.1 *1736 P.168KEXOR * 1733 I,!6BKOFORTRNH 1734 1,~6BKOPASCALH 1734 r.168KOUDOSH * 1734 r.168KOVDOS * 1936 U68r.1DOC *1736 1.l68XOOC *1736 MEX68KDM 1767-34 I.1EX68RR *1940 VMC68K/15 1767-31 1761-8 CMC68/04 CMC68/04A 1761-9 CMC68/15 1759-20 CMC68/15B 1759-30 CMC68/15C 1759-21 CMC68/15G 1759-22 ZAP-68 *4107 ZAP68 4009-3 SSC680 1100-51 MC680 472-12 SL680 2963-2 MS680 2899-133 S6800 1091-133 1059-20 DK-68DO 1759-15 F6800 *1253 * 1269 *1278 1091-136 * 1253 * 1269 1278 1061-12 MBL6800 1091-139 1061-24 H06800 *1345 1091-140 . * 1345 1063-35 MK6800 1100-16 1.16800 *1351 r.16800EXOR * 1735 1,16800UPDWHlD 1736 '.IC6800 *1351 1091-143 I ~ 286-13 ~ 238-15 ~ 239-5 ~ 243-5 ~ 244-15 ~ 245-3 ~ 248-2 *1351 1067-25 ~ 286-13 ~ 238-15 ~ 239-5 ~ 243-5 ~ 244-15 ~ 245-3 ~ 248-2 f,lC6800f.1 *1351 1091-144 If 286-13 ~ 238-15 If 239-5 ~ 243-5 ~ 244-15 ~ 245-3 If 248-2 r.1C68001lS *1351 1091-145 ~ 286-13 ~ 238-15 ~ 239-5 ~ 243-5 ~ 244-15
* *
Molorola 1.lolorola National RClData
Sunrlsa Sunrise AWl Motorola Plessey RTC AMI Digitek Fairchild
*
Fujitsu Hitachi
Mostek r.lolorola
*
Arranged alphanumerlcally from left to right.
126
©
Ie MASTER
1983
PART NUMBER IND!2}{ Basa Plumhor
Source
Device
6800
Motorola
68000
Siemens Hitachi Hitachi
MC6800NS ~I 24S-3 ~ 248-2 2906-139 SAS6800 H068000 1100-19 H068000·10 * 1345 1100·20 H068000·4 *1345 1100·21 11068000·6 *1345 1100-22 11068000·8 *1345 1100-23 H068000R-l0 1079-4 H068000R-4 1079-S H068000R·6 1079-6 H068000R·8 1079·7 MK68000 1079-20 MK68000-10 1100-24 MK68000-4 1100·2S MK68000-6 . 1100·26 MK68000-8 1100-27 MKB68000 1079·22 1.168000 *1354 *1731 1627-3 1,IC68000·10 * 1355 *1730 1100·28 ~ 287·18 ~ 239·4 ~ 241·3 ~ 241-4 ~ 241·11 ~ 241-.12 1.IC6BOOO·12 * 1355 *1730 1100-29 ~ 287·18 ~ 239·4 ~ 241·3 ~ 241-4 11 241·11 ~ 241-12 r.\C68000·4 *1355 *1730 1100-30 11 287·18 11 239-4 ~ 241-3 ~ 241·4 11 241·11 ~ 241-12 r,\C68000·6 *1355 *1730 1100-31 ~ 287·18 II 239-4 11 241-3 11 241·4 11 241-11 II 241·12 f!.C68000·8 *1355 *1730 1100-32 11 287·18 11 239·4 11 241-3 II 241-4 ~ 241·11 II 241·12 1.1C68000!.IPU * 1935 1100-33 R68000 S68000 *1975 SCII68000 *1524 1081-9
Hitachi
Mostek
1.lolorola
Rockwell Signalics
68000110 Motorola 68000112 Motorola 6800014 Motorola 6800016 Motorola 6800018 Motorola 68008 I.lolorola
P!.a-line
MC68000l10
1079-23
MC68000l12
1079·24
MC68000l4
1079-2S
MC68000l6
1079·26
MC68000l8 1079·27 1,IC6800S *1356
Basa /lumber
Sourca
Duvlce
68008
Motorola
MC68008
6801
AMI
S6801
Fairchild
F6801
F6801E Hitachi
H06801
fololorola
1.16801 1.IC6801
1.IC6801·1
1.IC6801C
68010
MRC r,lclcrcla
68010S3S1 r,lolorola 6&01S0 Hilachi 6801SS Hitachi 6801U4 Motorola
680lYO Hitachi 680lYS Hitachi 6802 AMI
Fairchild
Fujitsu Hitachi
r.lolorola
68020
1,lolerola
r,IEX6801 MBK6801 1.1C68010
Page-line
1100-17 * 1356 1067-26 1091-72 10S9·21 *1270 1091-74 *1270 1061·13 *1270 1091-61 1091·7S 106S-1 *1351 *1351 *1730 1091·77 ~ 238-S ~ 240-3 ~ 241-2 *1351 *1730 1067-27 ~ 238·S ~ 240-3 ~ 241·2 *1351 *1730 1091·78 ~ 238-S ~ 240-3 ~ 241-2 *1351 *1730 1067·28 ~ 238-S ~ 240·3 ~ 241·2 *1351 * 1730 1091-79 ~ 238-5 ~ 240-3, ~ 241-2 *1737 17S9·32 *1356 1100·18 *1356 1079·28
Basa Numbar
Source
Device
6803
AMI
1091-63 10S9-23 1091-64 * 1270 1091-6S * 1270 1061-1S H06803 *1345 1091·62 *1345 106S-3 H06803·1 *1345 1,IC6803 *1351 1091-66 ~ 241-2 *1351 1067-32 ~ 241-2 1.IC6003·1 *1351 1091-67 ~ 241-2 * 1351 1067·33 ~ 241-2 1.IC6803C *1351 1091-68 ~ 241·2 1,IC6803E * 1351 1067·34 ~ 241-2 1.IC6803E·l *1351 1067·3S ~ 241·2 1091-81 MC6803U4 1067-36 MC6803U4·1 1067·37 1.IC6804 *1351 S68045 *1250 1092-21 SY68045 *1535 1092-36 2906-44 S68047 ~ 238·1 1092-146 1101-106 11 238·1 1067-38 MC6804P2 S6805 *1248 1091·73 * 1248 10S9-24 H0680S 1091·76 106S-4 IIIUUU .... *1:;:;1 1.!6805FIF.! *1737 1,IC6805 *1351 r,IEX6805 *1737 COP6805 *1487 CPU-680S 1757·18 S68051 *1249 2486-2 COP6805E2 1073-9 COP680SF2 1073·10 COP680SG2 1073·11 MC6805P2 1091-82 1069·1 MC680SP4 1091·83 1069·2 MC680SP6 1069-3 MC680SR2 1091·71 1069·4 r,IEX6805R2 * 1737 MC680SR3 1069-5 H06805S1 *1345 MC680ST2 1091·51 1069·6 1I06805Ul *1345 1091-84 MC6805U2 1069·7 MC6805U3 1069·8 il06805Vl *1345
Fairchild
Hitachi
1.lolorola
6803U4 Motorola 6804 6804S
Molorola AUI Synsrlak
68047
AMI
6804P2 Motorola 680S AUI
Hitachi M6S01 OS35111 * 1735 iiuuiiillSiI *1345 11D6801S5 *1345 MC6801U4 1091-80 1067·29 MC6801U4-1 1067-30 H06801VO *1345 11D6801V5 *1345 1091-98 S6802 11 240-17 " 244·9 10S9-22 II 240-17 II 244·9 F6S02 *1278 1091·101 *1278 1061·14 MBl6802 ' 1091-104 1061·25 H06802 *1345 1091·106 *1345 1065-2 H06802\'1 *1345 r,IC6802 *1351 1091-107 II 243·6 *1351 1067·31 II 243·6 /.IC68020 *1356 1083-7
r.~u1ur{,:a
680S1
RCA Synapse AUI
680SE2 680SF2 680SG2 6805P2
RCA RCA RCA Motorola
680SP4 Motorola 680SP6 Motorola 680SR2 Motorola r.lolorola 680SR3 Motorola 680SS1 Ililachl 680ST2 Motorola 680SUl Hitachi 6805U2 Motorola 6805U3 Motorola 6805V 1 Hitachi 6805WO Ilitachl 680SXO Ilitachi 6808 AMI Fairchild
Page-line
S6803
Basa Humber
Source
Davie.
6808
Fairchild
F6808
S6803N1R F6803
H06805\'/0 *1345 1I06005XO *1345 S6808 1091·125 F6808 *1278
6809
"
681
6810
6811 68120
Page-line
1091-128 *1278 1061-16 Hitachi H06808 1091-129 106S·S 1,lolorola MC6808 *1351 1091-130 *1351 1069-9 1,IEX6808·22 * 1940 AUI S6809 * 1247 1091-110 *1247 10S9-2S S6809(E) *1247 1091-89 Fairchild F6809 *1272 1091-113 * 1272 1061·17 F6809E *1272 * 1274 1091·92 * 1272 *1274 1061·18 Fujitsu MBl6809 1091-116 1061-26 Hitachi H06009 *1345 1091-119 *1345 106S-6 H06809E *1345 106S·7 Molorola 1.16809 *1352 r.1680geASI,\R * 1736 r,16809EXOR * 1735 r.16809FORTRH * 1736 r,160091.1PL *1736 fA6809PASClC * 1736 F.l6809SA *1737 1.16809SETPAS * 1735 1,:6809UPDOWXlD * 1736 MC6809 *1352 1091-122 11 238-7 11 241·7 * 1352 1069-10 11 238-7 11 241·7 MC6S09E *1352 10:l1-CS 11 238·7 11 241·7 *1352 1069-11 11 238·7 11 241·7 1761-13 IMS SBC681 472-S Motorola MC681 RTC MS681 2899·134 S6810 3472·S9 AMI 3472-59 3472-53 S6810·1 3472-53 Fairchild F6810 *1278 3472·60 3472-60 r.tC1.1681 0 *1351 1.lolorola *3839 3472-62 3472-62 Siemens SAS6810 2906·140 Panasonic AN6811 510·77 I.\olorola 1,'C68120 *1352 *1357 *1730 1100-37 *1352 *1357 *1730 1069·12 1.1C68120·1 *1352 *1357
II Indicates page number in Application Note Directory.
* Indicates additional data is provided on the page noted. ©
Ie MASTER
1983
127
r----; j
~
I ..
::l
ffi1
~ e' '---
Ie MASTER
I
n':{;J1't L' \;'r-
~
i;=
:~ r-:- '
:,.;~~;,
;!i"~"
~(-i;,
I';'i!;;;:!,': tl';,';;': -:::~. ,,,,.,~
~
r';'~" '".
"""-
Bue Number
Source
68120
1.lolorola
DIvlce
Page·lIne
1.IC68120·1 *1730 1069·13 Signolics SCII68120C * 1524 1100·39 1.IC68121 68121 1.1010rola * 1357 1100·38 * 1357 1069·14 1.IC68121·1 * 1357 1069·15 1092·19 68122 Motorola MC68122 1100·34 MC68122·1 1092·20 1100·35 1,1010rola 1,IEX6816·1HR * 1940 6816 1,IEX6816·22D * 1940 1,IEX6816·22S* 1940 RCA CDP6818 6818 *1491 Motorola MC682 682 473·9 1.1010rola r.wr,IC682·114 1942 I.IVMC682·114H 1942 1.1VI.lC682·118 1942 1,1VI.~C6B2·11 BH 1942 RTC MS682 2899·135 6820 Fairchild F6820 1092·83 1102·53 1,IEX6820 *1940 I.lolorola 510·122 Panasonic AN6820 Synorlek SY6820 * 1527 1092·95 MC68200 1081·1 68200 Motorola AMI S6821 1092·80 6821 1102·48 Fairchild F6821 *1279 1092·,4 1102·54 Hllachl H06821 *1345 1092·87 1,\C6821 I.lolorola *1351 1092·91 1102·57 11 239·5 11 246·5 I.lEX6821·2 *1940 Panasonic AN6821 510·123 Synerlolc SY6821 *1528 1092·96 r.tolorola 1.1C6822 6822 *1351 1092·69 6823 RCA CPP6823 *1491 1.1C68230 *1357 68230 1.1010rola Signslics SCII68230C *1524 1100·47 68230llO Motorola MC68230l10 1100·45 6823018 Motorola MC68230l8 1100-46 68230Pl0 Moslek MK68230Pl0 1100·43 68230P8 Mostek MK68230P8 1100·44 1.1C6828 6828 Molorola *1351 1092·100 1102·67 1,IC6829 I.lolorola 6829 *1351 1092·73 683 Motorola MC683 473·1 RTC MS683 2899·136 S6831B 3485-34 6831 AMI 68316 Fairchild F68316 *1281 3485-18 Motorola MCM68316 3454·4 6832 Oalol ST·6832 *1933 1,1010rola rm6B32·1 HR * 1940 1.1EX6832·22 * 1940 68332 AUI S68332 *3612 3485·121 Fairchild F68332 *1282 3486·21 l.Ioiorol3 r.1C6835 6835 *1351 1092·29 Panasonic DN6835 511·56 2963·121 68364 Molorola I.1Cr.168364 *3840 3486-30
* * * *
Basa Numbar
Sourca
68364
1,1010rola
68365
68366
Davlca
Plga·Llna
1.1CI,168364-25 * 3840 3486·52 l,lCI,168364·30 3840 3486·83 1,lolorola r.;cr,16B365-25 3840 3486·53 rm,16B365·35 3840 3486·101 1,ICr,168366·25 * 3840 I.'olorola 3486·54 1,1cr.l6B366·35 3840 3486·102 Panasonic DN6837 511·57 2963·122 Panasonic DN6838 511·58 I.lolorola 1,IC6839 *1351 1092·53 Panasonic DN6839 511·59 Motorola MC684 472·29 AMI S6840 1092·102 Fairchild F6840 * 1279 1092·105 Hllachl 1106840 * 1345 1092·108 I.lolorola MC6840 *1351 1092·111 l,lC68401.1 *1351 1092·112 MPQ6842 Motorola 1092·12 Hllachl 1106843 *1345 1092·57 1,1010rola 1.1C6843 *1351 1092·59 Signalics B68430 *1525 SCB68430 * 1525 Fairchild F6844 * 1279 1092·42 Imachl 1106844 *1345 1092·43 1.;C6344 Molorola *1351 1092·46 11 241·7 1.\C68441.1 .,35, 1092·47 II 241·7 1.lolorola 1.1C68440 * 1358 1101·128 Fairchild F6845 *1276 1092·25 F6845A *1276 lIilachl H06845 *1345 1092·26 1,1010rola 1,\C6845 *1351 1092·30 1.1C6845 1,1 *1351 1092·31 SynerlBk SY6845R *1532 1092-37 Hilachl 11068450 *1345 1100-36 I.lolorola l,lC68450 *1358 l,lC68451 1.1010rola *1358 1100-41 Signolics 1168451 *1525 SCIl68451 *1525 I.\olorola I.lC68452 *1359 AMI S6846 1092·117 ~ 244·9 Fairchild F6846 *1280 1092-118 Hitachi H06846 *1345 1.1010rol3 r.IC6846 ' *1351 1092·119 11 243-6 r.IC68461.1 *1351 1092-120 II 243·6 Fairchild F6847 1101·107 r,IC6847 F.lolorola *1351 2906-45 If 238·5 ~ 238·7 ~ 241-13 *1351 1092-147 1100-49
6838 6839 684 6840
6842 6843
68430 6844
68440 6845
68450
68451
68452 6846
6847
Sourca
Davlce
6847
Motorola
MC6847
* * * *
6837
Basa Number
68478 6848
Motorola 1,lolorola
68488
AMI Fairchild 1.1010rola
685
AMD
6850
Motorola AMI Fairchild
-
Hllachl I,\olorola
6852
AMI Fairchild
Hllachl I.lolorola
6854
AMI Fairchild I.lolorola
6855 6856
Motorola Fairchild
68562 68564 6859
1,1010rola Mostek Molorola r.lolorola
68590
Mostek
Page·Llne
1101·109 ~ 238·5 ~ 238·7 ~ 241·13 I.1C6847Y *1351 1100·50 11 238·5 11 238·7 11 241·13 MC68478 1092·148 I.IEX6848·1 HR * 1940 1.1EX6848·22 * 1940 S68488 1092·62 1102·43 II 245·12 F68488 *1280 1092·63 r,IC68488 *1351 1092·64 F.1C684881.1 *1351 1092·65 685l 2891·18 II 270·15 685M 2891·19 11 270·15 MC685 472·20 S6850 2486·3 1091·159 1102·25 F6850 *1280 2486·4 *1280 1091·163 1102·28 H06850 *1345 1092·3 1.1C6850 *1351 2486·5 11 258·1 II 241·3 *1351 1092·5 1102·30 11 258·1 11 241·3 1.1C6850P.1 *1351 1092·6 ~ 258·1 ~ 241·3 I.1EX6850 *1940 UEX6850·2 *1940 S6852 1092·134 F6852 *1281 1092·137 1102·78 H06852 *1345 1092·140 I.1C6852 *1351 2487-23 ~ 241·12 * 1351 1092·142 1102·79 II 241·12 UC68521.1 *1351 1092-143 II 241·12 S6854 1091·148 F6854 *1281 1091·152 I.tC6854 *1351 1091·156 MC6855 1092·50 F6856 *1277 2487·21 *1277 1091·153 1.1C68562 *1359 MK68564 1100-48 1,IC68564 *1359 1,IC6859 *1351 510-66 *1351 1092·40 MK68590 1100·40 1101-62
Bau Number
Source
Davlce
686
AMD
686C
Page·Llne
507·26 270·15 2891·36 ~ 270·15 686M 507·27 11 270·15 2891·20 II 270·15 MC686 473·17 3489·88 MC6860 *1351 *3298 2486·63 II 258·8 II 258·9 * 1351 *3298 2948·134 II 258·8 II 258·9 * 1351 *3298 1092·75 II 258·8 II 258·9 I.1C6860l *1351 *3298 1092·76 II 258·8 II 258·9 F.1C6862 *1351 2948·133 * 1351 1092·41 1.1EX6864·1 HR * 1940 1.1EX6864·22 * 1940 1,\C68652 *1359 2486·95 1,\C68652·2 * 1359 2486·96 68652 * 1520 1,IC68653 *1360 2467·30 68653 * 1520 I.1C68661A *1360 2486·71 * 1360 1100·104 1,1C68661B * 1360 2486·73 *1360 1100·105 I.lC68661C * 1360 2486·72 * 1360 1100·106 68661 *1521 MC6B6Bl *1360 2487·79 68681 2486·67 SCII686B1C *1525 1100·52 687Al 2893·12 11 270-15 687AM 2892·58 11 270-15 687l 2893-13 11 270·15 687M 2892·59 II 270-15 MC6870 1092-17 MC68701 * 1351 * 1730 1091·55 ~ 241·2 ~ 243-4 *1351 * 1730 ,1069·16 \I 241-2 11 243·4 MC68701·1 *1351 *1730 1091-56 II 241·2 If 243·4 ~
Motorola 6860
Molorola
6862
l.Iolorola
6864
1.lolorola
68652
Molorola
68653
Signolics 1,1010rola
68661
Signolics 1.lolorola
68681
Signolics I.lolorola Signetics Signelics
687
AMD
6870 68701
Motorola 1.I010roia
Arranged alphanumerically from left to right.
128
©
Ie MASTER
1983
PART NUMBER INDEX Dasa Numbar
Source
Davlee
68701
I,tolorola
l,lC68701-1
Page-line
.,35, .,730 1069-17 If 241-2 If 243-4 l,lC68701C *1351 *1730 1091-57 If 241-2 If 243-4 r.lC68701C-l * 1351 *1730 • 1091-58 If 241-2 If 243-4
Basa Humber
Source
Device
68AOI
I.tolorola
l,tC68AOl
68A02
68A03
AMI Fairchild Motorola Uolorola
68A045 AUI 68A08
AMI
68A09
Motorola M.II
68701U4 Motorola 68705
1,1010rola
MC68701U4 1069-18 MC68701U4-1 1069-19 l,lC68705 *1351 *1730
68705P3 Motorola
MC68705P3
1091-59 1069-20
68705R3
Fairchild
1091-54 1069-21
Motorola
MC68705R3
Motorola
1091-60 1069-22 3463-82 F68708 3463-84 MCM68708 1092-18 MC6871 3465-66 F68716 MCM6874-35 3466-103 MC6875 1092-13 If 244-15 If 246-4 MC6875A 1092-14 If 244-15 ~ 246-4 2463-6 AN6875 1,1CM68764 *3839 3467-3 UCI.168766 *3839 3467-4 1,ICI.I68766-35 * 3839 3466-104 472-59 MC688 If 276-9 2477-13 MC6880 1092-10 MC6880A 2967-164 AN6880 MC6881 507-106 1092-149 F6882 *1278 1091-102 r.lC6882A *2752 1092-157 MC6882B *2752 1092-158 497-82 MC6883 1092-131 1092-151 MC6885 1092-152 MC6886 1092-153 MC6887 1092-154 MC6888 1,lC68881 *1357 508-24 MC6889 2477-27 1092-11 472-6 MC689 1,IC6890 *2758 2442-12 *2758 1092-38 I.1C6890A *2758 2441-38 *2758 1092-39 1100-42 MK68901 !.lC68901 *1360 1091-134 S68AOO 1091-137 F68AOO 1I06BAOO *1345 1091-141 1091-146 MC68AOO
68705U3
68708 6871 68716 6874 6875
Fairchild Motorola Motorola Fairchild Motorola Motorola
68764
Panasonic I.totorola
68766
l.Iolorola
688
Motorola
6880
Motorola
6881
Panasonic Motorola
6882
Fairchild !,'olorola
6883
Motorola
6885 6886 6887 6888 68881 6889
Motorola Motorola Motorola Motorola 1,lolorol3 Motorola
689 6890
68901 68AOO
Motorola I,'olorola
Mostek !,Iolorola AMI Fairchild IIl1achl Motorola
MC68705U3
Fujitsu lIilachi
Motorola 68Al0
AMI Fairchild I•• otorola
68A21
AMI Fairchild lIilachl Motorola
68A29 Motorola 68A30 Motorola 68A308 Molorola 68A308P7 Motorola 68A316 AUI I.'olorola
Page-line
*1351 1091-85 *1351 1069-23 1091-99 S68A02 1059-26 1091-103 F68A02 MC68A02 1091-108 1.1C68A03 *1351 1091-69 *1351 1069-24 S68A045 *1250 1092-22 S68A08 J091-126 1059-27 1091-131 MC68A08 S68A09 *1247 1091-111 *1247 1059-28 S68A09(E) *1247 1091-90 F68A09 *1272 1091-114 *1272 1061-19 F68A09E *1272 *1274 1091-93 *1272 *1274 1061-20 1091-117 M8L68A09 1061-27 1I068A09 *1345 1091-120 H068A09E *1345 1091-123 MC68A09 MC68A09E 1091-96 S68Al0 3472-54 3472-54 F68Al0 3472-55 3472-55 r.lCF.168Al0 *3839 3472-57 3472-57 1092-81 S68A21 1102-49 1092-85 F68A21 1102-55 H068A21 *1345 1092-88 1092-92 MC68A21 1102-58 1092-72 C68A29 MCM68A30A 3484-71 1,ICI.I68A308 *3840 3484-73
BasI 'lumber
68A39 68A40
Source
Device
Motorola AMI Fairchild Hilachl
MC68A39 S68A40 F68A40 H068MO
68A43
Motorola llilachl
68A44
Hilachl
68A45
Motorola Hilachl
Motorola 68A46 Motorola 68A488 Motorola 68A50 AMI Fairchild Hilachl Motorola 68A52
AMI Fairchild Hilachl
Motorola AMI Fairchild Motorola 68A708 Motorola 68800 AMI Fairchild Hilachl 68A54
68801
Motorola Uolorola I
68802 68803
AMI Motorola Molorola
688045 AMI 68808
AMI Motorola
68809
!;~~I
Fairchild
MCM68A308P7 3484-74 S68A316 *3611 3485-35 UCM6BA316A * 3840 3485-21 MCI,'6BA316E * 3840 3485-22 I.lCr~68A316E-91
* 3840 3454-5 68A316EP91 Motorola 68A332 AMI Fairchild 1.1010rol3 68A332P2 r.tolorola 68A35 Motorola 68A364 AI.II Motorola 68A364P3 Motorola
Fujitsu
MCM68A316EP91
Hilachl
3485-23 S68A332 3485-96 F68A332 3485-100 UCr.168A332 * 3840 3485-103
Motorola
UClA68A332P2 * 3840 3485-104 68810 1092-32 MC68A35 S68A364 *3613 3486-95 MCM68A364 3486-103 MCM68A364P3 3486-104
AMI Fairchild I,Iolorola
1092-54 1092-103 1092-106 *1345 1092-109 1092-113 MC68A40 H068M3 *1345 1092-58 H068M4 *1345 1092-44 MC68A44 1092-48 H068M5 *1345 1092-27 1092-33 MC68A45 1092-121 MC68A46 1092-66 MC68A488 1091-160 S68A50 1102-26 1092-1 F68A50 1102-29 H068A50 *1345 1092-4 MC68A50 1092-7 1102-31 1092-135 S68A52 1092-138 F68A52 H068A52 *1345 1092-141 1092-144 MC68A52 1091-149 S68A54 1091-154 F68A54 1091-157 MC68A54 MCM68A708 3463-71 S68800 1091-135 F68BOO 1091-138 H068BOO *1345 1091-142 1091-147 MC68800 !.IC68001 *1351 1091-86 * 1351 1069-25 1091-100 S68802 1091-109 MC68B02 r.1C68B03 *1351 1091-70 *1351 1069-26 S68B045 *1250 1092-23 1091-127 S68808 1091-132 MC68808 S6~~!!!l *12H 1091-112 *1247 1059-29 S68B09(E) *1247 1091-91 F68B09 *1272 1091-115 *1272 1061-21 F68B09E *1272 *1274 1091-94 *1272 *1274 1061-22 M8L68809 1091-118 1061-28 H068B09 *1345 1091-121 HD68B09E *1345 1091-124 MC68809 If 248-10 1091-97 MC68809E If 248-10 If 248-10 3472-49 S68810 3472-49 3472-50 F68810 3472-50 li'CI,t68BI0 *3839 3472-51 3472-51
If Indicates page number In Application Note Directory. * Indicates additional data is provided on the page noted. ©
Ie MASTER
1983
Plge-Llne
Blu Ilumbsr
Source
Davlee
68B20
Synerlak
SY68020
68B21
AMI Fairchild llilachl Motorola Synarlak
68B29 Motorola 68B30 Motorola 68B308 Fairchild r.tolorola 68B316 AMI 68B35 Motorola 688364 AMI
68839 68840
Motorola Motorola AMI Fairchild Hilachl
68844
Motorola Hilachl
68845
Motorola lIilachl
Motorola 68846 Motorola 688488 Motorola 68850 AMI Fairchild Motorola AMI Fairchild Motorola 68854 AMI Fairchild Molorola 688ASR010 Molorola 688SA 1 Uolorola 688SA2 1,'010roI3 688SA4 1,1010rola 68BSA5 i~oloroi4 688SA6 1"010ro13 68DSK2 l.Iolerola 68DSK3 I,'olorola 68FTNR012 I,'olorola 68Kl Omnibyte 68KEXOR16 1.1010rola 68KEXOR32 Molorola 68KEXOR96 !.tolorola 68KFDll02 I.lolorola 68KHDS16 1,1olorola 68KHDS32 !,'olorola 68KHDS96 I,'olorola 68KORMS68 1.I010roia 68KVMOI rAolorola 68KVM02 Molorola 68B52
68KVM10 1,lolcrol3 68KVMll 1.I010roia 68KVM20 I,tolorola
Plge-lInl
*'527 1092-97 S68B21 1092-82 1102-50 F68B21 1092-86 1102-56 H068B21 *1345 1092-89 MC68B21 1092-93 1102-59 SY68021 *1528 1092-98 1092-74 MC68B29 MCM68B30A 3484-56 F68B308 3484-54 1,1CF.l68B308 * 3B40 3484-55 3485-36 S68B316 1092-34 MC68835 460-145 S688364 3486-47 MCM688364 3486-55 1092-55 MC68839 1092-104 S68840 1092-107 F68840 H068B40 *1345 1092-110 1092-114 MC68840 11068044 *1345 1092-45 1092-49 MC68844 H068045 *1345 1092-28 1092-35 MC68845 1092-122 MC68846 1092-67 MC688488 1091-161 S68B50 1102-27 F68B50 1092-2 MC68850 1092-8 1102-32 S68B52 1092-136 1092-139 F68B52 1092-145 MC68852 1091-150 S68B54 1091-155 F68B54 1091-158 MC68854 1~6BBASROI
au *
1A68BSAl 1,'68DSA2 l,l68BSM
1736 *1729 *1729 *1729
i"uuiiS,,5
... 1iZ~
1,168BSA6 1,I680SK2 U680SK3
*1729 *1738 *1738
1~68FTKR0121A
* 1736 1765-32
0868Kl
1oI68KEXOR16 * 1733 1.t68KEXOR32 * 1733 I,I68KEXOR96 * 1733 1,'68KFOll02 * 1738 1.l68KHDS16-1 * 1738 tl68KHDS32-1 * 1738 1,!68KHDS96-1 * 1738 1,168KOR!.IS68K * 1936 1,16BKV1.l01A * 1937 1.16BKVF.l02 *1937 1767-33 1,16BKVI,I1 0 *1938 1.168KVIll1 *1938 1,168KVUZO *1938
r----: I
~
._'
I ~ g
L-
Ie MASTER" Source
68KVM21 1,1010ro13 68KVM30 /,lolorola 68KVM31 Molorola 68KVM40 Molorola 68KVM60 Molorola 68KVM80 1,1010rola 68L764 Motorola
Pagl-Llne
Devlca
1,1010rola
68MM01A2 I.1olorola 68MM01Bl 1,1010rola
('),
r~'i
'i~;
i~='i~ ;'~'
\'1-'
""~ I":; ,"':::,.
l:':~' ,.""~.,,
Et
Source
1,168KV/,I31 *1938 /,168KVI,140 *1938 I,168KVP.l60 *1938 1,168KV1.180 * 1938 MCM68L764-35 3466-105 1,168/,11.101
*1939 1759·17 l,t68m101B *1939 1761-5 1,1 68P,IIW1 0 *1939 1759·19 1,1681,1I,101A2 * 1939 1759-18 l.l68m,101BIA* 1939 1761-6 1,1681.11,t03
I,lolorola
101681,11,104 *1940 M68f,1I,104·A * 1940
*1940
68MM04
68MM05
/,1681,11.1010 *1939
1,1010rola 68MMSCI 1,10lorola 68MPLR020 r.1olorola 68POI Hitachi 68P01S0 Hllachl 68POlV05 llilachl 68POlV07 IIlIachl 68P05 Hitachi 68P05V05 Hitachi 68P05V07 IIlIachl 68PP3 I,tolorola 68RADI 1,lolorola 68RFDCl 1,1010rola 68RIOI Molorola 68RMS68 1,1010rola 68RSC 1 I,lolorola 68RTFR02 I,lolorola 68RWINI 1.1010rola
f,1681,1I,IS1·1 * 1940
U681,",105A *1940 I,168m,105B *1940 1,1681.H.l05C *1940
68SA2 I,toiorola 68SC02 Mitel
68MM06 Uolorola
1,1681,11,106
*1940
1.1010rola
1,1681,1/,107
*1940
1,1010rola
101681,11,109
*1940
Molorola
mOl.tr,tll
*1940
"'olorola
1,1681,11,112 *1940 1,168f.II,112·1 *1940 1,1681.11,112A * 1940
68MM07 68MM09 68MMll 68MM12
68MM13 P.168mmA 1,1681,11.1138 1.168/,lImC 1.168UP.1130
*1940 *1940 *1940 *1940
68MM15 I.lolorola
1.1681,n.115A *1940 1,168f.1P.115B * 1940 I.168/,1P.115BEX * 1940 1.1 68 1.1f.115 CI 1940 l,t681,tr.115CV * 1940
*
68MM15Al Molorola 68MM16 Molorola
1,1681,1I,115A 1 * 1940 1.168P.1P.116·1 *1940 r,168',1I.116·2 * 1940 1.16Br,1I.116·3 * 1940
68MM17 Uolorola
P,168f,tr.117
*1939 1761·21
1,1010rola
1,168"".118
*1940
Motorola Molorola
M68MM19 1761·22 1,168r.t1.119·1 * 1939 1,1681;11.n9A * 1939 1761-32
',!olorola
r,lB8r,Ir.121 *1940 "'681,11,121-1 * 1940
68MM18
68SC21 Mitel 68SC40 Mitel 68SC49 Mitel 68SETDS351 1,1010rola 68SP702Cl0 I,lolorola 68SXD10155 I.lolorola 68UCANAI 1,1010rola RClData 69
690 691 6910 6912 6917 693 696 697 699 60V12 60V15 60V24 60V28 60V5 60V6 7
68MM19
68MM21 70
68MM22 '.lolorola 68MMCC05 Motorola 68MMCC10 r.1olorola 68MMFLCI Molorola 68MMLCI Molorola
Page-Llna
Bua
Number
Source
Device
700
Signelics
C700 SCC700
68MMSI /,168KVI,130 *1938
1,lolorola
I.lolorola
Devlca
1.I010roia
I.l68 KVI.12I *1938
68MM03
I,Iolorola
Kumbar 68MMOI
68MMOI
It,
Bua
BISB
Ban
Number
l,t68/.1I.122
*1940
US8f.IF.1CCD5 * 1940 r.168 1.11,1 CC 10 * 1940 1.168P.lP;IFlCl * 1940 700 ~168"'mC1
* 1940
ToledynaS
1,16B/,mSCI * 1940 I,:68!.IPLR0201,1 HD68POI
* 1736
7000
1065·8
H068POISO * 1345
TI Holt Panasonic Rockwell Signetics TI
H068P01V05 * 1345 H068P01V07 * 1345 HD68P05 1065-9
70003
1,llcroEng
:ID68P05V07 * 1345 /,m8PP3 * 1737
7001
NEC-Micro
1,168RAOI
*1941
70014
1,1IcroEng
1,168RFOCI 1.168RIOI
*1941 *1941
H068P05V05 * 1345
7002
NEC·Micro
7004 7005 7010
SMC MasterLogic MasterLogic Signetics Sanyo MasterLogic NEC-Electron
l,t68RI,1S68K * 1935 1.168RSCI *1938 I,168nTFR021,1 * 1736
I,168nY/IIII·1 * 1941 I,168RWIIII·2 * 1941 7011 l,tEX68SA2 *17377015 MD68SC02 1091-87 702 1067·5 MD68SC21 1092-99 1092-150 MD68SC40 MD68SC49 1092·9 I,16BSETOS351
* 1735
I,168SP702CIO * 1738 I,~6BSXOIOI55
!.l6DUCAIiAl CMC69/04 CMC69/04A CMC69/15 MC690 MC691 1,1SI,16910 r.lSI,16912 AN6912 mr.16917 MC693
S,GS TI
7020
* 1738
* 1737 1761-31 1763-2 1761-30 Motorola 472-13 70200 Motorola 473·37 7027 OKI *3873 OKI *3873 Panasonic 2895-23 703 7030 OKI *3873 Motorola 472-94 2483-98 7031 Motorola 473-29 MC696 472-14 7033 Motorola MC697 Motorola MC699 472·43 Lambda L60V12 2965-53 Lambda L60V15 2965-54 Lambda L60V24 2965-55 70360 Lambda 2965-56 7038 L60V28 Lambda L60V5 2965-57 Lambda L60V6 2965-58 . Crommco OT7A *1922 SIII,I·mC Oatel *2622 2967-73 SHM-7MR Datel 2967-74 SHm Oalel *2614 Supertex DC-7 464-67 TeledyneC CAG7 2418-34 7040 CAG7-10 2418-35 Burr·Brown DAC70/CCD 2462-21 DAC70/COB 2462-11 DAC70/CSB 2462·9 DAC70C/CCD 2462-22 DAC70C/COB 2462-12 DAC70C/CSB 2462-10 7041 8PK70 Inlsl *3808 3468-3 MicroEng MCE70 2934-22 AnalogSys MA700 2933-45 2898-52 7045 ITT TCA700
Holt MasterLogic Signetics TI
IMI Intersil
"'olorola lSIComp lSIComp NCR Nitron
IMI Intersil
Fairchild lSIComp TI
TI
Intersil
Page-Llnl
*4524 *4524 4141·115 TSC700A *2846 2464·133 STL700 * 438 2899·155 HI1000 2900·125 AN1000 RC7000 1088·113 SAA7000 2896·39 TI.1S7000 *1556 1093-2 *1556 1075-19 l,mOO03 *4440 4141-25 *4440 464·9 uPD7001 2429·28 1094·55 1102-14 1.1T70014 *4440 4141-26 *4440 464-10 2435-20 uPD7002 1094-56 1102-15 CRT7004 3453-57 ML7005 4140·159 4140·160 ML7010 2896-40 SAA7010 LA7011 2968·39 4140-161 ML7015 uPC702 2913-118 2929-47 L702 2889·92 TL702C 2913·119 2933-50 2913-120 TL702M 2929-48 2923-8 uA702M 2899-159 HI7020 ML7020 4140·162 SAA7020 2896-41 Tr.tS7020 *1556 1093·3 *1556 1075·20 4141-155 G70200 IM7027-1 3468·14 IM7027-3 3468-24 IM7027-4 3468-36 MPRIIIT703 *1738 lS7030 * 696 510-58 lS7031 * 696 510-55 3455-4 NCR7033 3455-5 NC7033 II 285·3 II 243-9 G70360 4141-156 462-85 ICM7038A 2898-143 462-86 ICM7038B 2898-144 462-87 ICM7038C 462-88 ICM7038D 462-90 ICM7038E ICM7038F 462·91 462-92 ICM7038G 2906-49 FCM7040 lS7040 696 510-45 Tl.tS7040 *1556 1092-123 1093-4 *1556 1075-21 U1S7041 *1556 1093-6 *1556 1075-22 511-49 ICM7045
*
Number
Source
Device
7045
Intersil
ICM7045
7047
1049 7050
7051
7052 7055
7060
7061
7062 7063 7064 70640 7069 707 7070 7071 7072
7073 7074 7075 7076 7080 7085 7089 709
7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 70C20
Plgl-LiRI
2899·74 2899·90 ICM7045A 511·47 2951·17 Intersil ICM7047 2899·95 Intersil ICM7049A 462·103 2898·145 IPI IPI7050 2964·14 ICM7050 Intersil 462·104 2898-146 lS7050 lSIComp * 696 510-49 Inter~iI ICM7051A 462·83 2899-30 ICM7051B 462-105 2899-31 Nitron NC7051 3455·8 TA7051 Toshiba 2905·48 ICM7052 462-106 Intersil 2899-32 lSIComp lS7055/56 * 696 510-50 NC7055 3455-16 Nitron lSIComp lS7060 * 696 510-61 II 260-5 lSIComp lS7061 * 696 510-62 II 260·5 Toshiba TA7061A 2888-116 lSIComp lS7062 * 696 510·46 TA7063 2897-172 Toshiba IPI IPI7064 2964-15 IMI G70640 4141-157 Toshiba TA7069 2906-10 4141-29 MicroTech MC707 2896-69 Panasonic AN7070 TA7070 2903-31 Toshiba Panasonic AN7071 2896·62 U87072E Fujitsu *3681 469-5 *3681 3473-48 1,1870721' *3681 469-6 *3681 3473·52 2905-49 Toshiba TA7072 Toshiba TA7073A 2905-50 2906-11 TA7074 Toshiba TA7075 2906-12 Toshiba TA7076 2906-13 Toshiba LSILogic LSI-7080 4140-150 Toshiba TA7085A 2960-33 TA7089 2959-57 Toshiba 2924-9 Fairchild uA709AM 2932-9 uA709C uA709M 2929-4 MHW709 2888-52 Motorola LM709 2929-6 National 2924-11 LM709A 2932-10 LM709C Raytheon RC709 2932-11 2925-41 RM709 2921-19 RM709A uA709AM 2924-13 TI uA709C 2932-5 uA709M 2929-38 National DM7090 495-87 National DM7091 491-90 ACF7092C 2962-20 GI 490-142 National DM7092 DM7093 476-134 National II 236-15 DM7094 476-109 National National' DM7095 159 485-16 National DM7096 107 485-15 National DM7097 160 485-16 National DM7098 108 485-15 491-80 National DM7099 TP.IS70C20 *1556 TI
Arranged alphanumerically from left to right.
130
©
Ie MASTER" 1983
PART NUrv1BER ;NOE)( BlSa Numbor
70C95 70C96 70C97 70C98 70E40
70L22 71
Source
Device
Paue-Llne
450-103 450-171 450-104 450-172 *1556 1093-1 *'556 1075-23 1093-5 TI TMS70L22 1075-24 ADADC71J *3173 AD 2436-45 ADADC71K *3173 2436-39 ADDAC71-C08-1 3166 2461-25 ADDAC71-COB-V 3166 2461-37 ADDAC71-CS8-1 3166 2461-26 ADDAC71-CSB-h 3166 2461-38 2437-4 Burr-Brown ADC71J 2436-47 ADC71K DAC71/CCD 2462-27 DAC71/COB 2462-1 DAC71/CSB 2462-2 Datel DAC-71-CCD-1 2462-23 DAC-71-CCD-V 2462-25 DAC-71-C08-1 2461-20 DAC-71-C08-V 2461-33 DAC-71·CS8-1 2461-21 DAC-71-CS8-V 2461-34 NEC-Electron uPC71 2892·18 2892-15 Fairchild uA710C uA710M 2891·24 Motorola 2888·53 MHW710 I LImo lIational *3317 2891·26 LIm DC *3317 2892-17 SiliconG 2891·27 SG710 2892·19 SG710C 2892-34 TI TL710C 2892-21 TL710M 2891-28 uA710M IPI IPI7100 2964·16 LSIComp LS71DD * 696 2464-46 2427-27 MicroNet MN7100 2963·22 2427·28 MN7100H 2963·23 Synerlsk 7100 *4536 SY71DO *4536 4141·118 IMI G71000 4141·158 LSILogic LSI·71000 4140·151 TI 2902·68 VM71001 2902·69 TI VM71002 TI VI.I71003 *1563 2902·70 TI V1.171 004 *'563 TI VI.171005 *'563 Intersil ICL7101 2438·23 Intersil 2438-24 ICL7103 ICL7103A 2438·42 11 253·16 \I 276·11 11 277-1 Intersil 2436-20 ICL7104·12 If 253-16 11 256·16 11 248·1 ICL7104·14 2436·28 11 253·16 11 256·16 11 248·1 ICL7104-16 2437·5 11 253·16 11 256-16 11 248·1 511-43 MicroPwr MP7104A Intersil ICL7106 2438·1 11 256·20 11 257·1 National National National National TI
MM70C95 MM70C96 MM70C97 MM70C98 T!.lS70E40
* * *
710
7100
71000 71001 71002 71003 71004 71005 7101 7103
7104
7106
Base Nurnbsr
Source
Device
7106
Intersil
ICL7106
7107
TeledyneS Intersil
TSC7106 ICL7107
7109
Nitron TeledyneS Intersil
Telodyne3
NC7107 TSC7107 ICL7109
TSC7109C TSC71 091.1
711
Datel Fairchild !latlonal
ST-711 uA711C uA711M LIm 1 W711C
SiliconG
7110
TI AD Intel LSIComp
7111
SG711 SG711C uA711C AD711DK 7110 LS711D
Panasonic Synerlsk
AN7110 7110 SY7110
AD
AD7111K AD7111L AD711IT AD7111U
Synarlek
7111 SY7111
7114 7115
Panasonic AD
AN7114 AD7115K
PanJ~onic
7116
Intersil
AN7115 ICL7116
7117
TeledyneS Intersil
TSC7116 ICL7117
7118
TeledyneS AD
TSC7117 AD7118K AD7118L A07118T AD7118U
711RLY16 Dalol
ST·711RLYI6D
Page-Llna
11 276-15 11 277-5 11 277-10 2438-13 2438-2 11 256-20 11 257-1 11 277-10 510-51 2438-14 2435-25 11 253-16 11 257-1 *2847 2435-26 *2847 2435-27 *1933 2893-47 2893-28 *3317 2893-29 *3317 2893-49 2893-30 2893-50 2893-51 *3166 2896-27 3468-2 * 696 511·95 * 696 2424·96 2896-99 *4537 *4537 4141·119 *3166 2896-21 *3166 2896·22 *3166 2896-23 *3166 2896-24 *4537 *4537 4141-120 2896·100 *3163 2896·20 2895·101 2438·3 11 256-20 2438·15 2438·4 11 256-20 2438·16 *3166 2896·28 *3166 2896-29 *3166 2896·25 *3166 2896·26
* 1933
oase Number
Source
Device
7122
Fujitsu
1,107122E
7123
7124
7125 7126
7127 7128
7129 7130
7131
7132
7133 7134
7135
711RLY8 712 7120
Dalel TI MicroNet
7121
Panasonic Sanyo Toshiba Fujitsu
National
ST·711RLY8D * 1933 TL712 2965·154 MN7120 2427·29 2963-24 7136 MN7120H 2427·30 2963·25 AN7120 2896-102 LC7120 2898·125 7137 TA7120 2897·173 UB7121E *3679 3461·115 3461·115 1,IB712111 *3679 3461·103 7138 3461·103 DM7121 500·1
Page-Line
*3679 3461-118 3461-118 1.\0712211 *3679 3461-105 3461-105 2897-174 Toshiba TA7122A TA7122B 2897-175 1,\07123E Fujitsu *3679 3461-5 !.I0712311 *3679 3460-117 National DM7123 499-66 Fujitsu 1.1B7124E *3679 3461-10 1,18712411 *3679 3460-120 Toshiba TA7124 2906-14 Toshiba TA7125 2905-74 2438-5, Intersil ICL7126 11 256-20 TeledyneS TSC7126 *2848 2438-17 Toshiba TA7126 2904-133 1.18712711 '*3679 Fujitsu 3463-105 1,187128 Fujllsu *3679 497-77 1,187128E *3679 3463-117 1,!07128E·\'1 * 3679 3463·118 1.10712811 *3679 3463·107 IPI7128 IPI 2964·17 Toshiba TA7129 2897·176 TA7129A 2897·177 Fujitsu MB7130E 3484·30 M87130H 3484-31 MicroNet MN7130 2967·107 11 253·7 MN7130H 2967-108 11 253-7 National DM7130 474·135 Panasonic AN7130 2896·103 TA7130 Toshiba 2905·51 Fujitsu 1.187131 *3679 497·71 l.lB7131E *3679 3462·87 I.IB713111 *3679 3462·73 National DM7131 474·76 Sanyo LC7131 2898·132 Fujitsu I.IB7132 *3679 497·72 I.lB7132E *3679 3462-88 I.IB713211 *3679 3462·76 UB7132Y *3679 3462-67 Toshiba TA7133 2946·7 1.1B7134E Fujitsu *3679 3485·67 UB713411 *3679 3485·66 Toshiba TA7134 2904·134 Intersil ICL7135 2438·40 Sanyo LC7135 2898·133 TslsdynaS TSC7135 *2850 2438·41 Toshiba TA7135 2904·135 Fujitsu MB7136E 3484·109 MB7136H 3484·108 National DM7136 474·78 Toshiba TA7136A 2897-178 Fujitsu I.1B713711 *3679 3464·59 Toshiba TA7137 2902·102 TA7137·ST 2902·103 TDA7137 2896·18 TDA7137·ST 2896·19 I.lB7138E Fujllsu *3679 3464-90 I.lB7138E·\'1 * 3679
Base Ilumbar
Source
Davlce
7138
Fujitsu
MB7138E-W
1,lIcroPwr
7139 714
MicroPwr Fairchild
7140
LSILogic MicroNet
7141
Toshiba Fujllsu
Intersil
7142
Toshiba Fujllsu
7143
Fujitsu
7144
Fujllsu
71440 7145
IMI Panasonic
7146
Toshiba Panasonic
7147 7148 7149
Tpshiba Toshiba Toshiba MicroPwr
715
Toshiba Fairchild
7150
7151 7152 7154 7155 7156
MicroPwr Panasonic Toshiba Panasonic Toshiba Panasonic Toshiba Panasonic Panasonic MicroPwr Panasonic
7157 7158 716 7160 7161 7162
Toshiba Toshiba Dalal MicroPwr National Toshiba MicroPwr Toshiba
Page-Line
497-78 *3679 3484-110 1,\0713811 *3679 3464-62 1,IP7138 * 401 *2749 2438-6 1.1P7138A * 401 *2749 2438-7 2898-126 MP7139 uA714 2911-56 2915-27 2911-107 uA714C 2916-34 2915-33 uA714E LSI-7140 4140-152 MN7140 2963-26 2963-27 MN7140H 2896-137 TA7140 1.IB7141E *3679 3466-21 1,18714111 *3679 3466-19 3482-98 IM7141 3482-25 IM7141-2 IM7141-2M 3482-26 IM7141-3 3482-67 IM7141-3M 3482-68 3482·99 IM7141L IM7141L·2 3482·27 3482·69 IM7141L·3 IM7141M 3482·100 2904·22 TA7141A 1.IB7142E *3679 3466·22 UB7142E·\y *3679 497-79 *3679 3466·24 3485·69 1,18714211 *3679 3466·20 1,IB714311 *3678 3466·77 1.1B714411 *3678 3466·78 G71440 4141·159 2897·129 AN7145H AN7145L 2897·100 AN7145M 2897-113 TA7145 2906·15 2897-130 AN7146H AN7146M 2897·101 2905·52 TA7146 2906-16 TA7147 TA7148 2904·23 2898·127 MP7149 2945·141 TA7149 2904·24 uA715C 2913·144 2932·4 2913·145 uA715M 2929·40 MP7150 2899·165 AN7150 2897·31 2904·25 TA7150 AN7151 2897·32 2904·118 TA7151 AN7152 2897·33 2905·119 TA7152 AN7154 2897·34 AN7155 2897·35 2898·124 MP7156 2945·84 AN7156 2897·114 2897·131 AN7156N 2901·153 TA7157A 2965·2 TA7158 ST·716 *1933 2899·149 MP7160 474·70 DM7160 2904·26 TA7161 MP7162 2906·116 TA7162 2906·17
11 Indicates page number in Application Note Directory. * Indicates additional data is provided on the page noted. ©
Ie MASTER
1983
131
r--:
§ e
I • c,
II
(.'::111
~:
... ~ ~
?1 ~,
-
Ie Bin Number
MASTER Source
ITT 7163 7164 ITT 7165 Toshiba Toshiba 7167 71671L70 IDT 7168 IDT Toshiba 71681L 100 IDT
71681L45 IDT
71681L55 IDT
71681L70 lOT 71681L85 IDT
71681S100 IDT
71681S45 IDT
71681S55 IDT
71681S70 IDT
Device
ITT7163 ITT7164 TA7165 TA7167
PagB-Llne
2481-54 2481-55 2907-9 2904-27
Bue Number
Source
, Device
72
AD
' ADDAC72-COB-V
IDT11671L70 * 3805 IDT7168 *38D5 2904-28 TA7168 IDT716811100'* 3805 3483-38 3483-39 1DT11681L45 * 3805 3482-118 3483-1 1DT11681 L55 * 3805 3483-9 3483-10 1DT71681L70 3483-17 3483-18 1DT11681 L85* 3805 3483-31 3483-32 1DT71681S100 * 3805 3483-40 3483-41
720
7200
7201
1DT11681 S45 * 3805 3483-2 3483-3 1DT11681S55 * 3805 3483-11 3483-12
7203 7205
IDT11681S70 * 3805 3483-19 3483-20
7206
71681S85 IDT
1DT11681 S85 * 3805 3483-33 3483-34 Toshiba 2904-29 7169 TA7169 MicroTech MC717 4141-30 717 7171 Toshiba 2903-89 TA7171 7172 Toshiba 2903-90 TA7172 7173 Toshiba 2904-30 TA7173 Toshiba 7174 TA7174 2904-31 Toshiba 2905-53 7176 TA7176A Toshiba 2903-91 7177 TA7177 Toshiba 2903-92 7178 TA7178 7179 Toshiba 2958-81 TA7179 7180 Spraguo UOII-7180 *2843 2465-115 7181 Sanyo 2898-121 LC7181 Spragus 7183 UDII-7183 *2843 2464-118 7184 Sanyo 2898-122 LC7184 Spraguo UDlI-7184 *2843 .2464-119 Spragus 7186 UDN-7186 *2843 2464-120 7189 MicroPwr MP7189 2898-128 7191 Sanyo 2898-123 LC7191 Toshiba 7192 TA7192 2904-32 Toshiba 7193 TA7193 2904-33 71960 IMI G71960 4141-160 71LS95 AMD 477-38 DM71LS95 National 477-42 DM71LS95 478-27 71LS96 AMD DM71LS96 71LS97 AMD DM71LS97 477-39 National 477-43 DM71LS97 71LS98 AMD 478-28 DM71LS98 71S96 National 478-31 DM71S96 71S98 National DM7,1S98 478-32 72 AD ADADC72J *3173 2436-46 ADADC72K *3173 2436-40 ADDAC72-C08-1 * 3166 2461-27
7207
7208
7209 721 7210
7211
7212
Page-Line
* 3166
2461-39 ADDAC72-CSB-1 * 3166 2461-28 AODAC72-CSB-V * 3166 2461-40 2436-48 Burr-Brown ADC72 DAC72/COB 2462-3 DAC72/CSB 2462-4 Datel DAC-72C-CCD-1 2462-24 DAC-72C-CCD-V 2462-26 DAC-72C-COB-1 2461-22 DAC-72C-COB-V 2461-35 DAC-72C-CSB-1 2461-23 DAC-72C-CSB-V 2461-36 Dalal DAC72 *2615 Inial BPK72 *3809 2940-25 MicroEng MCE72 2907-13 ITT TCA720 Reticon 2963-150 R0720A Universal HCM720 4141-126 LSILogic LSI-7200 4140-153 National 474-32 DM7200 Sanyo LC7200 2900-148 Intersil 2964-112 ICM7201 2486-97 NEC-Electron uPD7201 NEC-Micro uPD7201 1094-145 1096-58 1098-30 1101-61 2900-149 Sanyo LC7201 Sanyo 2900-150 LC7203 2897-106 Toshiba TA7203 Intersil ICM7205 2899-92 Toshiba 2897-87 TA7205A Intersil ICM7206A 2949-139 2949-140 ICM7206B 2949-141 ICM7206C 2949-142 ICM7206D Intersil 462-80 ICM7207 462-81 ICM7207A ~ 277-2 Sanyo LC7207 2900-151 Toshiba TA7207 2896-138 452-100 Intersil ICM7208 ~ 277-2 Toshiba 2896-139 TA7208 Intersil ICM7209 462-77 2480-7 2965-155 TI TL721 2899-112 Intersil ICM7210 2899-113 ICM7210C 2899-114 ICM7210M ICM7210MC 2899-115 LSICornp LS7210 * 696 464-64 * 696 2951-26 National 500-6 DM7210 ~ 235-12 NEC-Micro uPD7210 1102-46 2900-90 Sanyo LC7210 2945-130 -Toshiba 2897-7 TA7210 Intersil ICM7211 455-26 2464-122 455-27 ICM7211A 2464-123 ICM7211AM 455-21 2464-111 ICM7211M 455-22 2464-112 500-7 National DM7211 2464-110 SSS SCL7211 TolBdynaS TSC7211A *2852 2464-132 455-37 Intersil ICM7212 2464-114 455-38 ICM7212A 2464-115
Base Number
Source
Devlca
7212
Intersil
ICM7212AM
7213 7214
7215
7216
7217
7218
7219 722 7220
7221 7222 7223
7224
7225
7226
7227
Page-Line
455-39 2464-116 ICM7212M 455-40 2464-117 TeledynaS TSC7212 *2852 Intersil ICM7213 462-82 Panasonic AN7213 2900-156 Intersil ICM7214 2899-178 ICM7214A 2899-179 National DM7214 497-137 ~ 236-15 Toshiba TA7214 2897-107 Intersil ICM7215 511-48 2899-93 Toshiba TA7215 2897-108 Intersil ICM7216 453-108 ICM7216A 510-40 ICM7216B 510-41 ICM7216C 510-56 ICM7216D 510-57 MicroPwr MP7216 2899-156 Intersil ICM7217 453-63 ICM7217A 453-64 ICM7217B 453-65 2951-95 ICM7217C 453-66 2951-96 Toshiba TA7217A 2897-88 Intersil ICM7218A 511-90 2463-57 ICM7218B 511-91 2463-58 ICM7218C 511-92 2463-59 ICM7218D 511-93 2463-60 ICM7218E 511-94 2463-61 Panasonic AN7218 2900-107 National DM7219 500-89 Burr-Brown 722 2960-85 7220 Intel 1100-64 7220-1 2962-113 Intersil ICM7220 2899-116 ICM7220A 2899-160 ~ 275-3 ICM7220B 2899-117 ICM7220C 2899-148 ICM7220FA 2899-161 ICM7220M 2899-118 ICM7220MA 2899-119 ICM7220MC 2899-120 ICM7220MFA 2899-162 LSICornp LS7220 * 696 2906-50 ~ 231-10 National DM7220 509-26 Sanyo LC7220 2900-91 2945-131 Intersil ICM7221 2899-163 Intersil ICM7222 2899-164 Toshiba TA7222A 2897-89 Intersil ICM7223 2899-2 2899~3 ICM7223A ICM7223VF 2899-4 National DM7223 483-146 Toshiba TA7223 2902-98 ICM7224 Intersil 453-52 ICM7224A 453-53 Toshiba TA7224 2902-124 Intersil ICM7225 453-54 ICM7225A 453-55 LSIComp LS7225 * 696 2906-51 Sanyo LC7225 2900-92 2945-132 Toshiba TA7225 2902-123 Intersil' ICM7226 453-109 ICM7226A 510-42 ICM7226B 510-43 Intersil ICM7227 453-67 ICM7227A 453-68 ICM7227B 453-69 2951-97
Bue Humber
Source
Device
7227
Intersil
ICM7227C
7229 723
7230
7231 7232 7233 7234 7235
7236
7238 724 7240 7241 7242
7243 7245 725
7250
7253
Plge-Llne
453-70 2951-98 Toshiba TA7227 2897-128 LSIComp LS7229 * 696 Toshiba TA7229 2902-125 Fairchild uA723C 2959-90 uA723M 2959-91 Intersil uA723 2959-92 Lambda LAS723 2959-119 LAS723B 2960-14 National LM723 2959-95 LM723C 2959-96 Raytheon RC723 2959-97 RM723 2959-98 RCA CA723 2959-99 CA723C 2959-100 Signetics uA723 2959-101 uA723C 2959-102 SiliconG SG723 2959-103 SG723C 2959-104 TI uA723C 2959-105 uA723M 2959-106 Intel 7230 2962-114 National DM7230 482-91 ~ 236-15 Intersil ICM7231 2465-98 LSIComp LS7231 2906-154 Intersil ICM7232 2465-133 LSIComp LS7232 2906-155 Intersil ICM7233 2464-103 LSIComp LS7233 2906-156 Intersil ICM7234 2465-8 LSIComp LS7234 2906-157 Intersil ICM7235 2464-104 ICM7235A 2464-105 ICM7235AM 2464-106 ICM7235M 2464-107 LSIComp LS7235 2906-158 Intersil ICM7236 453-57 ICM?236A 453-51 LSIComp LS7236 2906-159 Toshiba TA7238 2897-90 Burr-Brown 724 2960-86 Intersil ICM7240 2951-22 LSIComp LS7240 510-25 Motorola MC7241 495-12 Intel 7242 2485-47 2962-119 2962-120 Intersil ICM7242 2951-23 Motorola MC7242 495-64 Toshiba TA7242 2905-120 Toshiba TA7243 2905-54 Intersil ICM7245 2899-96 AMD SSS725A 2911-53 2915-54 SSS725B 2920-7 Fairchild uA725A 2911-77 uA725AM 2919-41 uA725C 2924-27 uA725E 2911-78 .uA725M 2921-17 National LM725 2921-18 LM725A 2911-64 2921-34 LM725C 2924-28 NEC-Electron uPC725 2924-29 PMI PM725 2921-15 ~ 271-2 PM725C 2924-30 ~ 271-2 SSS725 2919-42 ~ 266-2 2915-53 S~S725A ~ 266-2 SSS725C 2911-106 2921-29 ~ 266-2 Raytheon RC725 2924-31 RM725 2921-16 Intersil 2951-24 ICM7250 Motorola MC7250 482-112 Sanyo LC7250 2900-152 Siliconix SI7250 *2830 2962-117 Sanyo LC7253 2900-95
Arranged alphanumerically from left to right.
132
©
Ie MASTER
1983
PART NUMBER INL nasa
Basa
Paas-Llne
Number
Source
Davlea
7254 7255 7256 7257 7258 726
Siliconix NEC-Micro IPI Sanyo Sanyo Fairchild
7260
Intersil Motorola Motorola
VQ7254 uP07255 IP17256 LC7257 lC7258 uA726C uA726M ICM7260 MC7260 MC7261
lSICcr.tp lSIComp
lS7262 lS7263
7261 7262 7263 7266 7267 7269 727
7270
MC72GG AN72GG MC72G7 ICM7269 IIA727C lIA727M MicroTcch MC727 ICM7270 Intersil lS7270 lSIComp Me7270 Motorol3
Motorola Panasonic Motorola Intersil Fairchild
SGS 7271
Intersil Motorola
TDA7270 ICM7271 MC7271
2483-75 2466-13 2964-18 2900-96 2900-97 2968-9 2968-10 2951-25 474·168 474·137 696 696 498-68 2900-108 499-62 2899-121 2888-30 2888-31 4141-31 2899-122 1102-70 501-104 3488-55 2902-122 ~ 272-13 2899-173 501·W
*
*
llur.1her
Source
733
Intersil
7330 7331 7332
7335 734 7343 736 7364 737 738 739
7392
7404 2888-73 2888·74 2888-82 2888-104 2888·105 2888-110 2888-111 7405 2888·114 2888·115 2902-131 2902·126 2896-140 3485-86 3485·6 2906-109 7406 2901·2 2892·22 2891-37 2901·157 2461-11 3486·100 7407 4141·32 2900-15 2897·183 2897-184 2940·8 2906-Gg
uA733 uA733C National lM733 Signetics uA733 uA733C SG733 SiliconG SG733C uA733C TI uA733M TA7330 Toshiba TA7331 TOShiba uA7332 Fairchild IM7332 Intersil IM7332C Toshiba TA7332 Toshiba TA7335 FairChild uA734C uA734M Toshiba TA7343 Burr-Brown DAC736 Intersil IM73G4C MicroTcch MC737 SGS M738 FairChild UA739 uA739 Fairchild
uA7392
296·1-12~
3488-~G
7272 7273 728 7280
Intersil Intersil
ICM7272 ICM7273
Dalsl
ST-728
Motorola National 7281 Motorola National 7288 National 7290 National 7291 National 72C19 National 72HM185 Intersil Burr-BIOII'll 73
730
7301 7302
730-1
7306 7307 7308 731 7310 7311 7312 73128 7314 7315 7316 7317 7318
732 7320 7322 7324 7325 7326 7327 733
©
Ie
Si(}lIdics Unilloda
MC7280 OM7280 MC728 I OMntll O~17:'!lB OMi;'~l() [)I.I/;'~ll
MM/2C19
12111.1 185C AOC73J AOC73K DAC73 OAC73C TCA730A
PIC730
3484-105 2436·43 2436-37 2461-13 2461-14 2896·35
*3446
ACF7301C ACF7302C GI TA7302 Toshiba AM7303 MID National DP7303 Toshiba TA7303 AMO AM7304B National DP7304 DP73048 Toshiba TA7306 AMD AM7307 National DP7307 AMD AM7308 National OP7301l Burr·Brown ADC731.J ADC7:lIK National DP73 10 National DP7311 Panasonic AN7:)11 Toshiba TA7:lL' lIPDt:lt:'H NEC-EA Toshib;l T"lJ J.I TMJI~. Toshlb,l 1"1:11(; Toshl!!,l flallon~1 1.11.11317 Toshlll,l 1A1:!1l IAl311l Toshib,l , Datel ST-7n I :;l-/J;'O lSILogiG Toshib,l I M;I:';' Toshib,l IA/:{;'-I TOShiba IAn'!, Toshiba I M,L'ti Toshiba IAn;', Toshiba uMJ:lC Fairchild
MASTER
2899-1:':1 2899- 1].1 '" 1933 ·I(IO-tl7 ·HlO-92 478-49 478·55 482-24 480-93 478-56 462-6
2961-9,1 2962-;>1
lIalional 8igntlics SPI 740
TI In11174116 ZN:4118 ZII74119 ;':12 7M7.1?
HOi-II,'
SN74 12 MC-74120 SN74120
!
836
490·181 457-81 495-108
867 495·110 487·164 487·168 ,1U7-liO 487·17·1 487·178 487·182
869 488·1 ,187·116 487-118
:/( 870
*
487·120 870
247.~-1!,
·I;i'l ;Ii ,lU'l-·HJ
/.!ll
74111
,~L741CH; ;':1.1, U
2925-;:lr :'90"
*
81174107
n
29t- g
2909-32
*
74107 ZN74107 HD74107 r.IC7,11U7 0M74107 14107
74110
f
2929·12 2925-34
*
81174100
National Signetics
fell":ti
2924-8
LA"'., ,I
TC7410B MC74100
Fairchi/,' Nation,1I Si!1I1I'1IC ~,
*3153
UPC7.11
Toshiba Motorola TI
OM7411 7411 8;mtlO
."I,II'i
\1"
SII7410
Fairchild
7411
489-96 2923-19 2928-20
ICL741Cl :':1.':1_ fIJ ICL74 f:; 2929·2
TI
S117 ,11 !l9A
835
11,\/-\1,\'-1 ,Jl1-'1c
National, ,'" ',i -Iv! /,1 II:
SG741C SG741S SG741SC uA741C TI uA741M Thomson·CSF SFC741C Fairchild 7410 Ferranti ZN7410 Hitachi HD7410 Motorola MC7410 National DM7410 SiaJlctics 7410
Ferranti
,1::'1 !IO ,1iI:192 ,109-94
'" 3153,
,,833
uA741C SG741
HiLtchi I.\n\olol:l tJ.ltion,ll :;lgneUc:; TI
.1Ii!1 II!I
AD741S
Intersil
SiliconG
290 292S 2930 290929292930-: 2929·:' 2931-9 2930-51 2929-17 2930-57 490-16-_ 490-169 490-170 490-173 490·175 490·178
489-1J.1 489 Hi
*31l'S t919-39
IIJJ
uA741
835
A0741l
11M-II
Signetics
74107
290~-27
Fairchild
741
74100
485-6 484-135 484·136 484-13B 484- Hll 48,1-J.ll 035 .ltl4·143 489-123 489-125 489-126 489-128 489·130 489·132
2!1:'9-8
A0741C
Pag.
7410
835
*
*
Davlel
·\77-67 ·1Il4·159 484·160 485·1 485·3 485·4
7,101I
Fairchild Ferranti Hitachi Motorola National TI
Source
834
833
4"1 !II
.:.l
477·167 451·17 477-56 477·58 477·59 477-61 477-63 477-64
-I
-'~~ A (r;t"7}v
~ (rc,
7
0'
7~
j -j 0 ~ 1) !I- 1) -£5,fom·~v:t
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0) JAN / - } ;/ j' :7 T =>. "7 K Hc:if& -;; tL -C LAj -j 0 ~} --j] -il~~~7E-;; tL -C\r) 6 -', ~'/ -7 - ~M:tk t 1) - Vii J:vt tl ~AO) Q P L ~ 5t 6 :o>f~ q 0) } -:h -K)!E;f,t L -cT -;; LAo
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vc 0) -tt -c;:b t> 'f -j
354
0
© Ie MASTER 1983
MILITARY DEVICE TESTING
IC MASTER
MANUFACTURER Advanced Micro Devices American Microsystems, Inc. Analog Devices Burr-Brown Research 9herry Semiconductor Datel-lntersil EMM/Semi Exar Integrated Systems Fairchild Semiconductor General Instrument Harris Semiconductor Hughes Aircraft Hybrid Systems ILC - Data Device Integrated Device Technology Intel Interdesign International Microcircuits Intersil LSI Computer Systems Micro Networks Micropac Micro Power Systems Monolithic Memories Mostek Motorola Semiconductor National Semiconductor NEC-Electronic Arrays NEC Microcomputers Nitron Nortec ~ptical Electronics Plessey Semiconductor Precision Monolithics ~_aytheon Semiconductor RCA Solid State Rockwell SGS-ATES Signetics Silicon General Siliconix Solid State Scientific
Linear X
MIL-M-38S10 QPL Other Bipolar TTL X
MIL-STD-883 SCREENING CMOS
X
Class B
Class C
Class S
X
X
X
X X
X
limited
X X
X X X X X X
X
X X X
X
X
DTL
X
PROM
X X X
X ,uP
X
X X X X X X X X X X X
X X
-----
X
PROM
X X
ECL,,uP
X X X X
--
X X
X
X X
X
X
X
X
X
X
X X X
X
X
X X
-
X X - - r----- -
X
----
X
X
X X
Solitron
X
X
Sprague Electric
X
X
X X
Standard Microsystems Corp.
X
X
X
Synertek
X
Teledyne Crystalonics
X
X X
X-
Teledyne Philbrick
X
X
X
X
--
Teledyne Semiconductor Texas Instruments
--
X
X
X
RAM
X
TRW LSI
X
Zilog
X
X X X X
--
X X X X
X X X X
-- r---
---- f - - - - - - - -
X X
Q)
"0 ::J
-
X
X X X --1--------X X X X X X ----. X X - ------ .---X X - - - - - - ----.--_ .._-X X X X X - - - -X- X X X X
X
X X
--
Analog Switches
X X
X X X X X X X X X X X X
X
X X X
PROM
X
X X
X X X X
X
X
X X X X X X X X X X X X X --_.X __ ._X
X X
X
X
X X X X X X X X
X X X.
X X X X
DAC
X
--f----
X
X X X X X X X
X X
X X X X X X X X X X X X
X X X
X X
OTHER SCREENING Industrial Military
--
.
X X X X X
X X X X X f---X f-----X
X
X
X X X
X X X X-------X
X
X ------- - - - - X
X
EXPLANATION: The "MIL-M-38510" section indicates the IC manufacturers currently providing Q.P.L. ICs. More detailed information on the specific devices is given in the Qualified Products lists which follow. The "MIL-STD-883 Screening" section lists those manufacturers who are both set up and actively want to screen devices to the levels indicated. "Other Screening" shows those who report that they want business calling for special military and industrial environment screening procedures. © IC MASTER 1983
355
CD
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IC MASTER
MILITARY PARTS INDEX -' DEVICE/QPL
CROSS REFERENCE -
Q)
"C ::::l
(!J C
o ...... u Q) Q)
C/)
Device
M3851D/
AM91L30AF AM91L30ADM AM91L30AFM AM91L30CDM AM91L30CF AM91L30CFM AM91L40ADM AM91L40AFC AM91L40AFM AM91L40CDM AM91L40CFC AM91L40CFM AM9130ADM AM9130AFC AM9130CDM AM9130AFM AM9130CFC AM9130CFM AM9140ADM AM9140AFC AM9140AFM AM9140CDM AM9140CFC AM9140CFM DAC-08 DAC-08A OG181 OG182 OG184 DG185 DG187 DG188 OG190 OG191 DG300 OG301 DG302 DG303 DG304 DG305 DG306 DG307 HA-2500 HA-2510 HA-2520 HA-2600 HA-2620 HA-4741 HPROM0512 IM5603A IM5623 LF147 LF151 LF153 LH2101A HM7602-2 HM7603-2 HM7610-2 HM7611-2 HM76160-2 HM76161-2 HM7620-2 HM7621-2 HM7640-2 HM7641-2 HM7642-2 HM7643-2 HM7644-2 HM7680-2 HM7681-2 HM7684-2 HM7685-2 LH2110 LH2111 LM101A LMI02 LMI06 LM108A LM109 LMll0 LM111 LM118 LM120H-05 LM120H-12 LM120H-15 LM120H-24 LM120K-05 LM120K-12 LM120K-15 LM120K-24
23706 23708 23708 23707 23705 23707 23716 23714 23716 23715 23713 23715 23704 23702 23703 23704 23701 23703 23712 23710 23712 23711 23709 23711 11301 11302 11101 11102 11103 11104 11105 11106 11107 11108 11601 11602 11603 11604 11605 11606 11607 11608 12204 12205 12206 12202 12203 11003 20101 20201 20202 11906 11904 11905 10105 20701 20702 20301 20302 21001 21002 20401 20402 20801 20802 20601 20602 20603 20903 20904 20901 20902 10603 10305 10103 10601 10303 10104 10701 10602 10304 10107 11501 11502 11503 11504 11505 11506 11507 11508
OPL
X X
X X
X X X X
X X
X X X X
X X X X X
X X X
X X
X X X X X X X X X X
X X
X X X
X X X
X
COMMERCIAL TO MILITARY Device
M3851D/
LM124 11005 LM139 11201 LM140K-05 10706 LM140K-12 10707 LM140K-15 10708 LM140K-24 10709 LM141H-05 10702 LM141H-12 10703 10704 LM141H-15 LM141H-24 10705 LM148 11001 LM149 11002 LM193 11202 LM723 10201 MCM5303 20101 MCM5304 20102 MCM6604A* 23602 MCM6604At 23604 MCM6605* 23601 MCM6605t 23603 MH0026 03501 MK84096* 23602 MK84096t 23604 MM5280* 23505 MM5280t 23506 PM155 11401 PM155A 11404 PM156 11402 PM156A 11405 PM157 11403 PM157A 11406 PM2108A 10106 Special 15504 TMS4050* 23502 TMS4050t 23504 TMS4060* 23501 TMS4060t 23503 061 11901 062 11902 064 11903 071 11904 072 11905 074 11906 10501 06001 10502 06002 10504 06201 10505 06003 10506 06004 10507 06005 10509 06006 10524 06301 10525 06302 10531 06101 10535 06104 10576 06103 10597 06202 10631 06102 1558 10108 1802 47001 2117 24001 2117 24002 2147H 23801 2147H 23803 2147H 23805 2147H 23807 2148H 23806 25LS174 33106 25LS175 33107 2708 ' 22001 2901A 44001 2905 44101 2906 44102 2907 44103 2915 44104 2916 44105 2917 44106 2918 44201 3018A 10801 3045 10802 4000A 05201 40008 05251 4001A 05202 40018 05252 4002A 05203 40028 05253 4006A 05701 4007A 05301 4008A 05401 4009A 05501 4010A 05502
OPL X
X X
X X X X X
X X X
X X X
X X X X
X X
X X X X X X X X X X X X X X X
X X X
X X X X
X X
Device
M3851D/
401068 401078 401098 4011A 40118 4012A 40128 4013A 40138 4014A 4015A 4016A 4017A 401748 4018A 4019A 40198 4020A 4021A 4022A 4023A 40238 4024A 4025A 40258 402578 4027A 40278 4028A 4030A 4031A 4034A 4041A 4043A 40438 4048A 4049A 4050A 4066A 40678 4069U8 40708 40718 40728 40738 40758 40768 40778 40818 40828 40858 40868 40938 40958 40968 40978 40988 40998 4116 4116 4136 4156 45028 45088 45148 45158 45328 45558 45568 53S1680 53S1681 5300-1 5301-1 5305-1 5306-1 5330 5331 5340-1 5341-1 5348-1 5349-1 5352-1 5353-1 5380-1 5381-1 54C929 54C930 54HOO 54H01 54H04
17702 17402 17404 05001 05051 05002 05052 05101 05151 05702 05703 05801 05601 17505 05602 05302 05352 05603 05704 05604 05003 05053 05605 05204 05254 17803 05102 05152 05901 05303 05705 05706 05505 05103 05153 05304 05503 05504 05802 17801 17401 17203 17101 17102 17003 17103 17501 17204 17001 17002 17201 17202 17701 17502 17503 17802 17504 17601 24001 24002 11004 11003 17403 17602 17301 17302 17303 17304 17305 21001 21002 20301 20302 20401 20402 20701 20702 20801 20802 20804 20805 20601 20602 20903 20904 23901 23902 02304 02306 02305
NOTE: Items marked X in the QPL column are listed on QPL-38510-54 with at least one source.
356
* 85°C Max.
OPL
X X X
X X
X X
X X
X X
X X X
X
X X X
X X
X X X X
X X X X
X X
X X X X
X X X X
X X X
X X X
t 100°C
Device
M3851D/
54H08 54H10 54H101 54HI03 54H11 54H20 54H21 54H22 54H30 54H40 54H50 54H51 54H53 54H54 54H55 54H72 54H73 54H74 54H76 54LSOO 54LS02 54LS03 54LS04 54LS05 54LS08 54LS09 54LS10 54LS107 54LS109 54LSll 54LS112 54LSl13 54LS114 54LS12 54LS122 54LS123 54LS125 54LS126 54LS13 54LS132 54LS138 54LS139 54LS14 54LS148 54LS15 54LS151 54LS153 54LS155 54LS156 54LS157 54LS158 54LS160 54LS161 54LS162 54LS163 54LS164 54LS165 54LS166 54LS168 54LS169 54LS170 54LS174 54LS175 54LS181 54LS190 54LS191 54LS192 54LS193 54LS194 54LS195 54LS196 54LS197 54LS20 54LS21 54LS22 54LS221 54LS240 54LS241 54LS242 54LS243 54LS244 54LS245 54LS251 54LS253 54LS257 54LS258 54LS259 54LS26 54LS261 54LS266
15501 02303 02205 02206 15502 02302 15503 02307 02301 02401 04001 04002 04003 04004 04005 02201 02202 02203 02204 30001 30301 30002 30003 30004 31004 31005 30005 30108 30109 31001 30103 30104 30105 30006 31403 31401 32301 32302 31301 31303 30701 30702 31302 36001 31002 30901 30902 32601 32602 30903 30904 31503 31504 31511 31512 30605 30608 30609 31505 31506 31902 30106 30107 30801 31513 31509 31507 31508 30601 30602 32001 32002 30007 31003 30008 31402 32401 32402 32801 32802 32403 32803 30905 30908 30906 30907 31603 32102 31801 30303
OPL
X X X X
X X
X X X
X X X X X
X X X· X
X X X X X X X X X X
X X X X
X X X X X X X X
X X X X X X
X X X
X X X X X X X
X
X X X X X X X X X X X X X X
X X X
X X X
X X X X
X
Max.
© Ie MASTER 1983
ARROW ELECTRONICS, INC. ELECTRONICS DISTRIBUTION DIVISION
900 BROAD HOLLOW ROAD FARMINGDALE. NEW YORK 11735 516/694/6800 510/224/6126- TWX
The Arrow Lines of Military Semiconductors
AMD Fairchild General Electric General Instrument Inmos Intel International Rectifier Intersil Microsemiconductor MMI Mostek Raytheon RCA Signetics Texas Instruments
TRW Unitrode
NORTHWEST Denver. Colorado (303) 758-2100 Salt Lake City. Utah (801) 539-1135 San Francisco, California (408) 745-6600 Seattle, Washington (206) 643-4800 SOUTHWEST Albuquerque, New Mexico (505) 243-4566 Los Angeles, California (213) 701-7500 Newport Beach, California (714) 851-8961 San Diego, California (714) 565-4800 NORTH CENTRAL Cedar Rapids, Iowa (319) 395-7230 Chicago, Illinois (312) 397-3440 Madison, Wisconsin (608) 273-4977 Milwaukee, Wisconsin (414) 764-6600 Minneapolis, Minnesota (612) 830-1800 SOUTH CENTRAL Austin, Texas (512) 835-4180 Dallas, Texas (214) 386-7500 Houston, Texas (713) 491-4100 Tulsa. Oklahoma (918) 665-7700
@
Ie .MASTER 1983
For applications ranging from shipboard and ground communication systems to avionics and missile control, Arrow inventories quality hi-rei products within a separate military warehouse system. Strict warehousing procedures, full traceability control and trained personnel support Arrow's multi-million dollar commitment to a growing demand for military electronic components. Arrow's broad inventory base meets or exceeds standards for MIL-3851 0 and 19500 and our on-line real time computerized inventory system quickly processes your order so we can ship it to you on time.
MIDWEST Cleveland, Ohio (216) 248-3990 Detroit, Michigan (313) 971-8220 Grand Rapids, Michigan (616) 243-0912 Pittsburgh, Pennsylvania (412) 856-7000 TRI-STATE Dayton, Ohio (513) 435-5563 Indianapolis. Indiana (317) 243-9353 SI. Louis, Missouri (314) 567-6888 NORTHEAST Boston, Massachusetts (617) 933-8130 Manchester, New Hampshire (603) 668-6968 EMPIRE Hauppauge, New York (516)231-1000 Rochester, New York (716) 275-0300 Syracuse, New York (315) 652-1000 Wallingford, Connecticut (203) 265-7741 MID-ATLANTIC Baltimore. Maryland (301) 247-5200 Fairfield, New Jersey (201) 575-5300 Moorestown, New Jersey (609) 235-1900 Richmond, Virginia (804) 282-0413
SOUTHEAST Atlanta, Georgia (404) 449-8252 Fort Lauderdale, Florida (305) 776-7790 Huntsville, Alabama (205) 882-2730 Melbourne, Florida (305) 725-1480 Raleigh, North Carolina (919) 876-3132 Winston Salem, North Carolina (919) 725-8711 International, TWX (510) 224-6021
Arrow. Gain strategic advantage
357
MILITARY PARTS INDEX -
IC MASTER CROSS REFERENCE Device
Q)
'0 :J (!) C
o
..... o Q)
Q)
en
54LS27 54LS273 54LS279 54LS28 54LS280 54LS283 54LS290 54LS293 54LS295 54LS298 54LS30 54LS32 54LS348 54LS365 54LS366 54LS367 54LS368 54LS37 54LS373 54LS374 54LS375 54LS377 54LS38 54LS390 54LS393 54LS395 54LS40 54LS42 54LS47 54LS490 54LS51 54LS54 54LS670 54LS73 54LS74 54LS75 54LS76 54LS83A 54LS85 54LS86 54LS90 54LS92 54LS93 54LS95 54LS96 54LOO 54LOI 54L02 54L03 54L04 ' 54LI0 54L121 54L122 54L164 54L193 54L20 54L30 54L42 54L43 54L44 54L46 54L47 54L51 54L54 54L55 54L71 54L72 54L73 54L74 54L78 54L86 54L90 54L93 54L95 54500 54S02 54S03 54S04 54S05 54S08 54S09 54S10 54S11 54S112 54S113 54S114 54S133 54S134 54S135 54S138
M38510/
30302 32501 31602 30204 32901 31202 32003 32004 30606 30909 30009 30501 36002 32201 32202 32203 32204 30202 32502 32503 31604 32504 30203 32701 32702 30607 30201 30703 30704 32703 30401 30402 31901 30101 30102 31601 30110 31201 31101 30502 31501 31510 31502 30603 30604 02004 02006 02701 02006 ,02005 02003 04201 04202 02802 02503 02002 02001 02901 02902 02903 02904 02905 04101 04102 04103 02101 02102 02103 02105 02104 02601 02501 02502 02801 07001 07301 07002 07003 07004 08003 08004 07005 08001 07102 07103 07104 07009 07010 07502 07701
-
COMMERCIAL TO MILITARY (Continued)
QPL
Device
X X X X X X X X X X X, X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
54S139 54S140 54S15 54S151 54S153 54S157 54S158 54S174 54S175 54S181 54S182 54S194 54S195 54S20 54S22 54S251, 54S253 54S257 54S258 54S30 54S40 54S412 54S51 54S64 54S65 54S74 54S85 54S86 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 54107 54116 5412 54121 54122 54123 54125 54126 5413 54132 5414 54145 54147 54148 54150 54151 54153 54154 54155 54156 54157 5416 54160 54161 54162 54163 54164 54165 5417 54170 54174 54175 54180 54181 54182 54186 54192 54193 54194 54195 5420 5423 5425 5426 5427 5428 5430 5432 54365 54366 54367
X X
X X
X X X X X X X X X X X X X X X X X X X X X
M38510/
07702 08101 08002 07901 07902 07903 07904 07105 07106 07801 07802 07601 07602 07006 07007 07905 07908 07906 07907 07008 07201 42101 07401 07402 _ 07403 07101 08201 07501 00104 00107 00401 00109 00105 00108 00801 00803 01601 01602 00103 00203 01503 00106 01201 01202 01203 15301 15302 15101 15103 15102 01005 15601 15602 01401 01406 01403 15201 15202 15203 01405 00802 01303 01306 01305 01304 00903 00904 00804 01801 01701 01702 01901 01101 01102 20101 01308 01309 00905 00906 00102 00402 00403 00805 00404 16201 00101 16101 16301 16302 16303
QPL
Device
X X
54368 5437 5438' 5440 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5453 5454 5470 5472 5473 5474 5475 5476 5477 5479 5480 5482 5483 5485 5486 5490 5492 5493 5495 5496 55107 55108 55113 55114 55115 555 556 558 6508 6518 6800 710 711 723 741 '747 76L70 76L42A 771 772 774 78M05 78M12 78M15 78M24 7805 7812 7815 7824 7831 7832 79M05 79M12 79M15 79M24 7905 7912 7915 7924 8080A 8086 82S10 82S11 82S115 82S123 82S126 82S129 83S130 82S131 82S136 82S137 82S140 82S141 82S180 82S181 82S184
X X X X X X X
X X
X X X X X X X X X X X X X X X X X X X X X X X
X X X X
X X X X X X X X X X X X X X
X X X X X X X X
X X X X
X X
X X X X X X X X
NOTE: Items marked X in the QPL column are listed on QPL-38510-54 with at least one source.
358
DEVICE/QPL
M38510/
16304 00302 00303 00301 01001 01002 01003 01004 01006 01007 01008 01009 00501 00502 00503 00504 00206 00201 00202 00205 01501 00204 01502 00207 00604 00601 00602 15001 00701 01307 01301 01302 00901 00902 10401 10402 10405 10403 10404 10901 10902 10903 23901 23902 40001 10301 10302 10201 10101 10102 02805 02906 11904 11905 11906 10702 10703 10704 10705 10706 10707 10708 10709 10406 10407 11501 11502 11503 11504 11505 11506 11507 11508 42001 53001 23101 23102 20803 20702 20301 20302 20401 20402 20601 20602 20801 20802 20903 20904 20901 * 85°C Max.
QPL X X X X X X
X X X X X
X X X X
X X X X X X
X X X
X X X X X X X X X X X X X X X X X
X X X X
X X X X X X X X X X X X X X X X X X X X X
X X
Device
M38510/
82S185 82S190 82S191 82S23 82S2708 8212 8224 8228 8250 8251 8252 9LS51 9LS54 9093 93LOO 93L01 93L08 93L09 93L10 93L12 93L14 93L16 93L18 93L22 93L24 93L28 93L415 93L422 93L422A 93L420 93L425 93Z511 930 9300 9301 9304 9308 9309 9311 9312 9314 9317 9318 9321 9322 9324 9328 9'32 933 9334 9338 9341 93410 93411 93415 93417 9342 93421 93425 93425 93425A 93427 93436 93438 93446 93448 93450 93451 93452 93453 93460 93461 935 93510 93511 936 940 944 945 946 948 950 951 957 958 9601 9602 9614 9615 962 9900A
20902 21001 21002 20701 20905 42101 42201 42301 15204 15205 15206 30401 30402 03304 02804 02907 04502 04601 02504 04602 04501 02505 04301 04603 04401 02803 23103 23112 23115 23004 23104 21004 03001 15901 15206 00603 01503 01404 15201 01402 01504 15802 15603 15801 01405 15002 15902 03101 03105 16001 15701 01101 23001 23003 23101 20301 01102 23002 23102 23106 23108 20302 20401 20801 20402 20802 20903 20904 20601 20602 20906 20905 03002 21001 21002 03003 03002 03102 03301 03004 03302 03303 03201 03103 03104 01204 01205 10403 10404 03005 46001
QPL X X X X
X X X X X X X X X X X X X X
X X X
X
X
X X X
X X X
X
X X X X X
t 100°C Max. © Ie MASTER 1983
MILITARY PARTS INDEX -
IC MASTER CROSS REFERENCE M3851D/
00101 00102 00103 00104 00105 00106 00107 00108 00109 00201 00202 00203 00204 00205 00206 00207 00301 00302 00303 00401 00402 00403 00404 00501 00502 00503 00504 00601 00602 00603 00604 00701 00801 00802 00803 00804 00805 00901 00902 00903 00904 00905 00906 01001 01002 01003 01004 01005 01006 01007 01008 01009 01101 01101 01102 01102 01201 01202 01203 01204 01205 01301 01302 01303 01304 01305 01306 01307 01308 01309 01401 01402 01403 01404 01405 01405 01406 01501 01502 01503 01503 01504 01601 01602 01701 01702 01801 01901 02001 02002
Device 5430 5420 5410 5400 5404 5412 5401 5405 5403 5472 5473 54107 5476 5474 5470 5479 5540 5437 5438 5402 5423 5425 5427 5450 5451 5453 5454 5482 5483 9304 5480 5486 5406 5416 5407 5417 5426 5495 5496 54164 54165 54194 54195 5442 5443 5444 5445 54145 5446 5447 5448 5449 54181 9341 54182 9342 54121 54122 54123 9601 9602 5492 5493 54160 54163 64162 54161 5490 54192 54193 54150 9312 54153 9309 9322 54157 54151 5475 5477 9308 54116 9314 5408 5409 54174 54175 54170 54180 54L30 54L20
QPL X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
X X X X X X
X X X X X X X X X X X X X X X X X X X X
X X X
MILITARY TO COMMERCIAL M3851D/
02003 02004 02005 02q06 02006 02101 02102 02103 02104 02105 02201 02202 02203 02204 02205 02206 02301 02302 02303 02304 02305 02306 02307 02401 02501 02502 02503 02504 . 02505 02601 02701 02801 02802 02803 02804 02805 02901 02902 02903 02904 02905 02906 02907 03001 03002 03002 03003 03004 03005 03101 03102 03103 03104 03105 03201 03301 03302 03303 03304 03501 04001 04002 04003 04004 04005 04101 04102 04103 04201 04202 04301 04401 04501 04502 04601 04602 04603 05001 05002 05003 05051 05052 05053 05101 05102 05103 05151 05152 05153 05201
Device
QPL
54L10 54LOO 54L04 54L03 54L01 54L71 54L72 54L73 54L78 54L74 54H72 54H73 54H74 54H76 54H101 54H103 54H30 54H20 54H10 54HOO 54H04 54H01 54H22 54H40 54L90 54L93 54L193 93L10 93L16 54L86 54L02 54L95 54L164 93L28 93LOO 76L70 54L42 54L43 54L44 54L46 54L47 76L42A 93L01 930 940 935 936 946 962 932 944 957 958 933 951 945 948 950 9093 MH0026 54H50 54H51 54H53 54H54 54H55 54L51 54L54 54L55 54L121 54L122 93L18 93L24 93L14 93L08 93L09 93L12 93L22 4011A 4012A 4023A 4011B 4012B 40238 4013A 4027A 4043A 40138 40278 40438 4000A
X X X X X X X X X X X X X X X
X X X X X X X X X X
X X X
X X X X X X
X
X X X X
X X X
X X X
X
M3851D/
05202 05203 05204 05251 05252 05253 05254 05301 05302 05303 05304 05352 05401 05501 05502 05503 05504 05505 05601 05602 05603 05604 05605 05701 05702 05703 05704 05705 05706 05801 05802 05901 06001 06002 06003 06004 06005 06006 06101 06102 06103 06104 06201 06202 06301 06302 07001 07002 07003 07004 07005 07006 07007 07008 07009 07010 07101 07102 07103 07104 07105 07106 07201 07301 07401 07402 07403 07501 07502 07601 07602 07701 07702 07801 07802 07901 07902 07903 07904 07905 07906 07907 07908 08001 08002 08003 08004 08101 08201 10101
NOTE: Items marked X in the QPL column are listed on QPL-38510-54 with at least one source.
© Ie MASTER 1983
QPL/DEVICE
Device
QPL
4001A 4002A 4025A 4000B 4001B 4002B 4025B 4007A 4019A 4030A 4048A 4019B 4008A 4009A 4010A 4049A 4050A 4041A 4017A 4018A 4020A 4022A 4024A 4006A 4014A 4015A 4021A 4031A 4034A 4016A 4066A ·4028A 10501 10502 10505 10506 10507 10509 10531 10631 10576 10535 10504 10597 10524 10525 54S00 54S03 54S04 54S05 54S10 54S20 54S22 54S30 54S133 54S134 54S74 54S112 54S113 54S114 54S174 54S175 54S40 54S02 54S51 54S64 54S65 54S86 54S135 54S194 54S195 54S138 54S139 54S181 54S182 54S151 54S153 54S157 54S158 54S251 54S257 54S258 54S253 54S11 54S15 54S08 54S09 54S140 54S85 741
X X X
* 85°C Max.
X X X X X X X X X
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
X X X
X X X X
X X
X X X X
X X X X X X
M3851D/
Device
10102 10103 10104 10105 10106 10107 10108 10201 10301 10302 10303 10304 10305 10401 10402 10403 10403 10404 10404 10405 10406 10407 10601 10602 10603 10701 10702 10702 10703 10703 10704 10704 10705 10705 10706 10706 10707 10707 10708 10708 10709 10709 10801 10802 10901 10902 10903 11001 11002 11003
747 LM101A LM108A LH2101A PM2108A LM118 1558 LM723 710 711 LM106 LM111 LH2111 55107 55108 55114 9614 55115 9615 55113 7831 7832 LM102 LM110 LH2110 LM109 LM141H-05 78M05 LM141H-12 78M12 LM141H-15 78M15 LM141H-24 78M24 LM140K-05 7805 LM140K-12 7812 LM140K-15 7815 LM140K-24 7824 3018A 3045 555 556 558 LM148 LM149 HA4741. 4156 4136 LM124 DG181A DG182A DG184A DG185A DG187A DG188A DG190A DG191A LM139 LM193 DAC-08 DAC-08A PM155 PM156 PM157 PM155A PM156A PM157A LM120H-05 79M05 LM120H-12 79M12 LM120H-15 79M15 LM120H-24 79M24 LM120K-05 7905 LM120K-12 7912 LM120K-15 7915 LM120K-24 7924 DG300 DG301 DG302
11004 11005 11101 11102 11103 11104 11105 11106 11107 11108 11201 11202 11301 11302 11401 11402 11403 11404 11405 11406 11501 11501 11502 11502 11503 11503 11504 11504 11505 11505 11506 11506 11507 11507 11508 11508 11601 11602 11603
QPL X X X X X X X X X X X X X
X X X X X
Q)
:Q :J
(!J
c:: o ofoJ
(,) Q)
Q)
X
X X
X X
X X
X X X X X X X X X X
X X X
X X X X
X X X X X X X X X
X X
X
X X X
X X
t lOooC Max.
359
en
MILITARY PARTS INDEX -
Ie MASTER CROSS REFERENCE M38510/
Q)
'U :::l
(!) C
o :;::. o
Q) Q)
en
11604 11605 11606 11607 11608 11901 11902 11903 11904 11904 11904 11905 11905 11905 11906 11906 11906 12202 12203 12204 12205 12206 15001 15002 15101 15102 15103 15201 15201 15202 15203 15204 15205 15206 15206 15301 15302 15501 15502 15503 15504 15601 15602 15603 15701 15801 15802 15901 15902 16001 16101 16201 16301 16302 16303 16304 17001 17002 17003 17101 17102 17103 17201 17202 17203 17204 17301 17302 17303 17304 17305 17401 17402 17403 17404 17501 17502 17503 17504 17505 17601 17602 17701 17702 17801 17802 17803 20101 20101 20101
Device DG303 DG304 DG305 DG306 DG307 061 062 064 071 771 LF151 072 772 LF153 074 774 LF147 HA·2600 HA·2620 HA·2500 HA·2510 HA·2520 5485 9324 5413 5414 54132 54154 9311 54155 54156 8250 . 8251 8252 9301 54125 54126 54H08 54H11 54H21 Special 54147 54148 9318 9338 9321 9317 9300 9,328 9334 5432 5428 54365 54366 54367 54368 40818 40828 40738 40718 40728 40758 40858 40868 40708 40778 45148 45158 45328 45558 45568 4069U8 401078 45028 401098 40768 40958 40968 40988 401748 40998 45088 40938 401068 40678 40978 402578 HPROM0512 MCM5303 54186
QPL X X X X X
X X X X X X· X X X
X X X X X X X X X X X X X X X X
X X X X X X X X X
X X
X X
X
MILITARY TO COMMERCIAL (Continued) M38510/
Device
20102 20201 20202 20301 20301 20301 20301 20302 20302 20302 20302 20401 20401 20401 20401 20402 20402 20402 20402 20601 20601 20601 20601 20602 20602 20602 20602 20603 20701 20701 20701 20702 20702 20702 20801 20801 20801 20801 20802 20802 20802 20802 20803 20804 20805 20901 20901 20902 20902 20903 20903 20903 20903 20904 20904 20904 20904 20905 20905 20906 21001 21001 21001 21001 21002 21002 21002 21002 21004 22001 23001 23002 23003 23004 23101 23101 23102 23102 23103 23104 23106 23108 23112 23115 23501 23502 23503 23504 23505 23506
MCM5304 IM5603A IM5623 HM7610·2 5300·1 82S126 93417 HM7611·2 5301·1 82S129 93427 HM7620·2 5305·1 82S130 93436 HM7621·2 5306·1 82S131 93446 HM7642·2 5352·1 82S136 93452 HM7643·2 5353·1 82S137 93453 HM7644·2 HM7602·2 5330 82S23 HM7603·2 5331 82S123 HM7640·2 5340·1 82S140 93438 HM7641·2 5341·1 82S141 93448 82S115 5348·1 5349·1 HM7684·2 82S184 HM7685·2 82S185 HM7680·2 5380·1 825180 93450 HM7681·2 5381·1 825181 93451 82S2708 93461 93460 HM76160·2 5351680 82S190 93510 HM76161·2 53S1681 82S191 93511 93Z511 2708 93410 93421 93411 931420 93415 82S10 93425 82S11 93L415 931425 93425 93425A 93L422 93l422A TMS4060* TMS4050* TMS4060t TMS4050t MM5280* MM5280t
QPL
X X X X X X X X X
X X X X X X X
X X X
X
X X
X X
X X X X X X
M38510/ 23601 23602 23602 23603 23604 23604 23701 23702 23703 23703 23704 23704 23705 23706 23707 23707 23708 23708 23709 23710 23711 23711 23712 23712 23713 23714 23715 23715 23716 23716 23801 23803 23805 23806 23807 23901 23901 23902 23902 24001 24001 24002 24002 30001 30002 30003 30004 30005 30006 30007 30008 • 30009 30101 30102 30103 30104 30105 30106 30107 30108 30109 30110 30201 30202 30203 30204 30301 30302 30303 30401 30401 30402 30402 30501 30502 30601 30602 30603 30604 30605 30606 30607 30608 30609 30701 3070'2 30703 30704 30801 30901
NOTE: Items marked X in the QPL column are listed on QPl·38510·54 with at least one source.
360
QPL/DEVICE
QPL
Device MCM6605* MCM6604A* MK84096* MCM6605t MCM6604At MK84096t AM9130CFC AM9130AFC AM9130CFM AM9130CDM AM9310AFM AM9130ADM AM91L30CF AM91L30AF AM91L30CFM AM91L30CDM AM91L30AFM . AM91L30ADM AM9140CFC AM9140AFC AM9140CFM AM9140CDM AM9140AFM AM9140ADM' AM91L40CFC AM91l40AFC AM91L40CFM AM91L40CDM AM91l40AFM AM91L40ADM 2147H 2147H 2147H 2148H 2147H 6508 54C929 6518 54C930 2117 (200 ns) 4116 (250 ns) 2117 (250 ns) 4116 (250 ns) 54lS00 545L03 54LS04 54LS05 54lSlO 54lS12 54lS20 54lS22 541530 54lS73 54lS74 54lS112 5415113 5415114 54lS174 54lS175 54lS107 54lS109 54lS76 54lS40 54lS37 54lS38 54lS28 54lS02 54lS27 54lS266 9lS51 54L551 54lS54 91551 54lS32 54lS86 54lS194 54lS195 54lS95 54LS96 54lS164 54lS295 54LS395 54lS165 54lS166 54lS138 54LS139 54lS42 54LS47 54lS181 54lS151 * 85°C Max.
X X X X X
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
M38510/ 30902 30903 30904 30905 30906 30907 30908 30909 31001 31002 31003 31004 31005 31101 31201 31202 31301 31302 31303 31401 31402 31403 31501 31502 31503 31504 31505 31506 31507 31508 31509 31510 31511 31512 31513 31601 31602 31603 31604 31801 31901 31902 32001 32002 32003 32004 32102 32201 32202 32203 32204 32301 32302 32401 32402 32403 32501 32502 32503 32504 32601 32602 32701 32702 32703 32801 32802 32803 32901 33106 33107 36001 36002 40001 42001 42101 42101 42201 42301 44001 44101 44102 44103 44104 44105 44106 44201 46001 47001 53001
Device
QPL
54LS153 54LS157 54LS158 54LS251 54LS257 54LS258 54LS253 54LS298 54LS11 54LS15 54LS21 54LS08 , 54LS09 54LS85 54LS83A 54LS283 54LS13 54LS14 54LS132 54LS123 54LS221 54LS122 54LS90 54LS93 54LS160 54LS161 54LS168 54LS169 54LS192 54LS193 54LS191 54LS92 54LS162 54LS163 54LS190 54L575 54L5279 54LS259 54L5375 54L5261 54L5670 54L5170 54LS196 54L5197 54L5290 54L5293 54lS26 5415365 5415366 54lS367 5415368 5415125 5415126 54lS240 54lS241 5415244 5415273 54lS373 54lS374 54lS377 54lS155 54lS156 5415390 5415393 54lS490 54LS242 54lS243 54lS245 54lS280 25lS174 25lS175 54lS148 54lS348 6800 8080A 8212 54S412 8224 8228 2901A 2905 2906 2907 2915 2916 2917 2918 9900A 1802 8086
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
X
t 100°C Max.
© Ie MASTER 1983
MILITARY PARTS DIRECTORY BUFFERS (coni) Detailed Product Information Provided by: Micro Power Systems National Semiconductor
on Military Parts
401 402 406 410 424
RCA ....... .
Signetics Synertek. Texas Instruments
433
DIGITAL· ARITHMETIC FUNCTIONS Device
M38510/
4008A 5480· 5482 5483
05401 00604 00601 00602
5485
15001
54181, 9341 54182
01101
54LS83A 54LS85
31201 31101
54LS283 54S85
31202 08201
54S181 9304 9324
07801 00603 15002
01102
Description 4-Bit Full Adder Gated Full Adder 2-Bit Binary Full Adder 4-Bit Binary Full Adder (Look-Ahead Carry) 4-Bit Magnitude Comparator Arithmetic Logic/ Function Generator Look-Ahead Carry Generator ' 4-Bit Binary Full Adder 4 Bit Magnitude Comparator 4 Bit Binary Full Adder 4-Bit Magnitude Comparator ALU/Function Generator Dual Full Adder 4-8it Magnitude Comparator
Source SSS Motorola Motorola Motoroia, National, Signetics, TI Motorola, Signetics
05301
4009A
05501
40 lOA
05502
4049A
05503
4050A
05504
4069UB 4502B 5404
17401 17403 00105
5405 5437
00108 00302
5438
00303
5440
00301
54126 54365 54366 54367 54368 54H04 54H40
15302 16301 16302 16303 16304 02305 02401
54LS04
30003
Dual Complementary Pair plus Inverter Hex Buffer/Converter, Inverting Hex Buffer/Converter, Non-Inverting Hex Buffer/Converter, Inverting Hex Buffer/Converter, Non-Inverting Hex Inverter Hex Inverter/Buffer Hex Inverter Hex Inverter, O/C Quad 2-lnput NAND Buffer Quad 2-lnput NAND Buffer, O/C Dual 4-lnput NAND Buffer Quad Gated Buffer, TS Hex Buffer, TS Hex Inverter, TS Hex Buffer, Three state Hex Inverter, TS Hex Inverter Dual 4-lnput NAND Buffer Hex Inverter
54LS05
30004
Hex Inverter, O/C
54LS28
30204
54LS37
30202
54LS40
30201
54LS125 54LS126 54LS365 54LS366
32301 32302 32201 32202
Quad 2-lnput NOR Buffer Quad 2-lnput NAND Buffer Dual 4-lnput NAND Buffer Quad Gated Buffer, TS Quad Gated Buffer, TS Hex Buffer, TS Hex Inverter, TS
54LS367
32203
Hex Buffer, TS
54LS368
32204
Hex Inverter, TS
54L04 54S04
02005 07003
Hex Inverter Hex Inverter
M38510/
54S05 54S40
07004 07201
935 936
03002 03003
4017A
05601
4018A
05602
4020A
05603
4022A
05604
4024A
05605
~.~
01307 01301
5493 54160
01302 01303
54161
01306
Fairchild, Motorola, TI Motorola, Signetics, TI
54162
01305
Fairchild, Motorola, TI Signetics
54163
01304
'smT.
Motorola, National, Signetics Motorola
Signetics Motorola Motorola
54193 54LS90 54LS92 54LS93 54LS160
01308 01309 31501 31510 31502 31503
54LS161
31504
54LS162
31511
54LS163
31512
54LS190
31513
54LS191
31509
National, RCA, SSS SSS SSS Motorola, National, RCA,SSS Motorola, National, RCA, SSS RCA RCA Fairchild, Motorola National, Signetics, TI Motorola, National, TI Fairchild, Motorola, National, TI Motoral, National, TI Fairchild, Motorola National, TI Signetics Signetics Signetics Signetics Signetics Fairchild, Motorola, TI Motorola, TI Fairchild, Motorola, National, Raytheon, Signetics, TI Fairchild, Motorola, National, TI Motorola Motoroa, National Raytheon, Signetics, TI Motorola, National, Raytheon, TI Signetics, TI TI Fairchild, Signetics, TI Fairchild, TI Fairchild, Motorola, Signetics, TI Fairchild, Motorola, Signetics, TI National Fairchild, Signetics, TI
Description Hex Inverter, O/C Dual 4-lr1Put NAND Buffer Hex Inverter Hex Inverter
Source TI Fairchild, Signetics Fairchild Fairchild
COUNTERS
5492
BUFFERS, INVERTERS 4007A
Device
54LS192
31507
54LS193
31508
54LS197 54LS290
32002 32003
54LS390
32701
54LS293
32004
54LS393
32702
54LS490
32703
54L90 54L93
02501 02502
Decade Counter / National, RCA, SSS Divider, Decoded Output Presettable Divide-by·N Motorola, National, Counter 14-Bit Binary Counter Motorola, National, RCA Divide-by-8 Counter/ National, RCA, SSS Divider, Decoded Output 7-Bit Binary Counter Motorola, National, RCA, SSS Decade Counter, Ripple Motorola, National Divide-by-12 Counter Motorola (+2, +6) 4-Bit Binary Counter Motorola, Signetics Synchronous Decade Motorola, National, Counter Signetics Synchronous 4-Bit Motorola, National, Signetics Binary Counter Fully Synchronous Motorola, National Decade Counter Fully Synchronous 4-Bit Motorola, National, Binary Counter Signetics Motorola Decade Up/Down Decade Up/Down Motorola, Signetics Motorola, Signetics, TI Decade Counter Divide-by-12 Counter Motorola, Signetics, TI 4-Bit Binary Counter Signetics, TI Motorola, TI Synchronous Decade Counter Mo to rOJa;S iine tics ,lI Synchronous 4-Bit Binary Counter --_. ---" -- - . Motorola, TI Fully Synchronous Decade Counter Fully Synchronous 4-Bit Motorola, Signetics, TI Binary Counter Motorola, Signetics, TI Synchronous Decade Up/Down Counter Motorola, Signetics, TI Synchronous Binary Up/Down Counter Motorola, Signetics, TI Decade Up/Down Counter Motorola, Signetics, TI Binary Up/Down Counter Signetics Binary Up Counter Motorola, Signetics, TI Decade Counter, Divide-by-2 and 5 TI Dual Decade Counter, Ripple Signetics, TI 4-Bit Binary Counter, Ripple Signetics, TI Dual 4-Bit Binary Counter, Ripple Signetics, TI Dual Decade Counter, Ripple Decade Counter, Ripple National National 4-Bit Binary Counter
Q)
"'C ~
(!J C
o
.....() Q) Q)
en
--
DECODERS 5442
01001
5443
01002
5444
01003
5445
01004
5446
01006
5447
01007
5448
01008
5449
01009
54145
01005
54154, 9311
15201
BCD-tO-Decimal Decoder Excess 3-to-Decimal Decoder Excess 3-Gray-toDecimal Decoder BCD-to-Decimal Decoder, O/C BCD-to-Decimal Decoder/Driver,30V Output BCD-to-Decimal Decoder/Driver, 15V Output BCD-to-7 Segment Decoder/Driver with 30V Output BCD-to-7 Segment Decoder,O/C BCD-to-7 Segment Decoder 4-Line to 16-Line Decoder/Demultiplexer
Fairchild, Motorola, National, Signetics Motorola Motorola Motorola National
National Motorola Motorola Motorola Motorola, Signetics
BASED ON QPL-38510·54. 20 SEPTEMBER. 1982
© IC MASTER 1983
361
MILITARY PARTS DIRECTORY DECODERS (cont) Device 54155
M38510/ 15202
54156
15203
54LS138
30701
54LS139
30702
54LS148
36001
54LS155
32601
54LS156
32602
54LS348
36002
54LS42
30703
(!)
54LS47
30704
C
54S139
07702
9301
15206
9317
15802
9318
15603
CD
:Q ::J
....o (.)
CD CD
en
FLlp·FLOPS (cont) Description Dual 2-Line to 4-Line Decoder/Demultiplexer Dual 2-Line to 4-Line Decoder/Demultiplexer 3-to-8-Line Decoder/ Demultiplexer Dual 2-Line to 4-Line Decoder /Demultiplexer 8-lnput Priority Encoder Dual 2·tO-4 Line Decoder/Demultiplexer Dual 2-to-4 Line Decoder/Demultiplexer 8-lnput Priority Encoder BCD to Decimal Decoder BCD t07·Segment Decoder Dual 2-Line to 4-L1ne Decoder/Demultiplexer BCD-to-Decimal Decoder BCD to 7-Segment Decoder/Driver 8-lnput Priority Encoder
Source
Device 54LS112
M38510/ 30103
54LS113
30104
54LS1l4
30105
TI
54lS174
30106
"Motorola, Signetics, TI
54LS175
30107
54LS273
32501
54LS298
30909
54LS373 54LS374
.32502 32503 .
54LS377
32504
54L71
02101
54L72
02102
Motorola Motorola Fairchild, Motorola, Raytheon, Signetics, TI Fairchild, Motorola, TI TI
TI Fairchild, Motorola, Signetics, TI TI Fairchild Motorola Fairchild I
Motorola
J...
2
UJ
ctS
~
DRIVERS 5406
00801
5407
00803
5416
00802
5417
00804
5426
00805
Hex Inverter Buffer/ Driver, O/C High Voltage Output Hex Buffer/Driver, O/C High Voltage Output Hex Inverter Buffer/ Driver, O/C High Voltage Output Hex Buffer/Driver, O/C High Voltage Output Quad 2-lnput NAND Buffer/Driver, O/C, High Voltage Output
Motorola, National, TI
54173
02103
Motorola, TI
54L74 ,
02105
Fairchild, Motorola, National, TI
54L78
02104
54S74 54S112
07101 07102
54S113
07103
54S174 54S175 10531
07105 07106 06101
10576
06103
10535
06104
10631
06102
Fairchild, Motorola, TI Signetics
FLlp·FLOPS 25LS174 25LS175 4013A
33106 33107 05101
4027A
05102
5470
00206
5472
00201
5473
00202
5474
00205
5476
00204
54107
00203
54174
01701
Hex D-Type Flip-Flop Quad D-Type Flip-Flop Dual "0" Flip-Flop with Set/Reset Dual J-K Master-Slave Flip-Flop Positive EdgeTriggered J-K Flip-Flop J·K Master Slave Flip-Flop (AND Inputs) Flip-Flop Dual J-K Master Slave Duai D-Type EdgeTriggered Flip-Flop Dual J-K Master Slave Flip-Flop with Preset and Clear Dual J-K Master Slave Flip-Flop Hex D-Type Flip-Flop
54175
01702
Quad D-Type Flip-Flop
54H72
02201
J-K Master-Slave FlipFlop (AND Inputs) Dual J-K Master-Slave Flip-Flop Dual J-K Flip-Flop J-K Negative EdgeTriggered Flip-Flop (AND-OR Inputs) Dual J-K Negative EdgeTriggered Flip-Flop Dual J-K Master Slave Flip-Flop Dual D-Type Positive Edge-Triggered FlipFlop with Preset and Clear Dual J-K-Master Slave Flip-Flop with Preset and Clear Dual Master Slave Flip-Flop Dual J-K Positive EdgeTriggered Flip-Flop with Preset and Clear
54H73
02202
54H76 54H101
02204 02205
54HI03
02206
54LS73
30101
54LS74
30102
54LS76
30110
54LS107
30108
54LS109
30109
Motorola, TI Motorola Motorola, National, RCA, SSS Motorola, National, RCA,SSS Motorola, TI National, TI Motorola, National, Signetics, TI Fairchild, Motorola, National, Signetics, TI National, Signetics, TI
GATES , AND/NAND 4011A
05001
4012A
05002
4023A
05003
Motorola, National, TI Fairchild, Motorola, Signetics Fairchild, Motorola, Signetics Motorola
4073B 40818 4082B 5400
17003 17001 17002 00104
5401
00107
Motorola
5403
00109
TI Motorola
5408
01601
5409
01602
5410
00103
5412
00106
5420
00102
5426
00805
5430
00101
54HOO
02304
54HOI
02306
Motorola Signetics, TI Fairchild, Motorola, Signetics, TI Signetics, TI Motorola, Signetics, TI Fairchild, Motorola, Signetics, TI
Description Source Dual J-K Negaive Edge- Fairchild, Motorola, Triggered Flip-Flop Signetics, TI with Preset and Clear Dual J-K Negative Edge-. Fairchild, Motorola, Triggered Flip-Flop Signetics, TI with Separate Preset and Clock Dual J-K Negative Edge- Fairchild, Motorola, TI Triggered Flip-Flop with Clock, Clear, and Preset Hex D-Type Flip-Flop Fairchild, Motorola, Signetlcs, TI Fairchild, Motorola, Quad D-Type Ed~eRaytheon, Signetlcs, TI Triggered Fllp-F op with Clear Octal D-Type EdgeTI Tri~gered Flip-Flop wit Clear Quad D-Type Flip-Flop Signetlcs with Multiplexed Dual Inputs Octal Transparent Latch TI Octal D-Type EdgeTl Triggered Flip-Flop, Three State Octal D-Type Flip-Flop TI with Enable J-K Master-Slave FlipNational Flop (AND-OR Inputs) National J-K Master-Slave FlipFlop (AND Inputs) Dual J-K Master-Slave National Flip-Flop Dual D-Type EdgeNational Triggered Flip-Flop Dual J-K Master-Slave National Flip-Flop Fairchild, Signetics Dual Flip-Flop Dual J-K Negative Edge- Signetics Triggered Flip-Flop Dual J-K Negative Edge- Signetics Triggered Flip-Flop Separate Preset and Clock AMD, Fairchild Hex D-Type Flip-Flop AMD, Fairchild Quad D-Type Flip-Flop Dual "0" Master Slave Motorola Flip-Flop Hex "0" Master Slave Motorola Flip-Flop Motorola Dual J-K Master-Slave Flip-Flop Dual "0" Master Slave Motorola Flip-Flop
Quad 2-lnput NAND Gate Dual 4-lnput NAND Gate Triple 3-lnput NAND Gate Triple 3-lnput AND Gate Quad-2-lnput AND Gate Dual 4-lnput AND Gate Quad 2-lnput NAND Gate Quad-2-lnput NAND Gate, O/C Quad 2-Ir'lput NAND Gate, O/C Quad 2-lnput AND Gate
Motorola, National, RCA,SSS Motorola, National, RCA, SSS Motorola, National, RCA, SSS Motorola, RCA Motorola, RCA, SSS Motorola, RCA Fairchild, Motorola, National, Signetics, TI Motorola, National, TI Motorola, National, TI
Fairchild, Motorola, National . Quad 2-lnput AND Gate, Fairchild, Motorola O/C Fairchild, Motorola Triple 3-lnput NAND National, Signetics, TI Gate Triple 3-lnput NAND TI Gate, O/C Fairchild, Motorola, Dual 4-lnput NAND National,Signetics, TI Gate Signetics Quad 2-lnput NAND Gate, O/C Fairchild, Motorola, 8·lnput NAND Gate National, TI Fairchild, Motorola, TI Quad 2-lnput NAND Gate Motorola, TI Quad 2-lnput NAND Gate,O/C
BASED ON QPL·38510-54, 20 SEPTEMBER 1982
362
© IC MASTER 1983
MILITARY PARTS DIRECTORY GATES, AND/NAND Device
M3851D/
54HOB Special 54HI0
15501 15504 02303
54Hll 54H20
15502 02302
54H21 54H22
15503 02307
54H30 54LSOO
02301 30001
54LS03
30002
54LSOB
31004
54LSlO
30005
54LS11
31001
54LS12
30006
54LS15
31002
54LS20
30007
54LS21
31003
54LS22
3000B
54LS26
32102
54LS30
30009
54LS3B
30203
54LOO
02004
54L03
02006
54L10
02003
GATES, AND-ORI AND-OR-INVERT (cant) .
~onQ Source
Description Quad 2-lnput AND Gate Quad 2-1 nput AND Gate Triple 3-1 nput NAND Gate Triple 3-lnput AND Gate Dual 4-1 nput NAND Gate Dual 4-lnput AND Gate Dual 4-lnput NAND Gate,O/e B-Input NAND Gate Quad 2-lnput NAND Gate
Motorola Motorola Fairchi Id, Motorola, TI Motorola Fairchild, Motorola, TI
Motorola
Fairchild, Motorola, TI Fairchild, Motorola, National, Signetics, TI
Fairchild, Motorola, National, TI Fairchild, Motorola, National, Raytheon, Signetics, TI NAND Fairchild, Motorola, National, Signetics, TI AND Gate Fairchild, Motorola, National, Raytheon, TI Motorola, National, NAND· Signetics, TI Motorola, National, TI AND
Quad 2-lnput NAND Gate,O/e Quad 2-lnput AND Gate Triple 3-lnput Gate Triple 3-lnput
Triple 3-lnput Gate,O/e Triple 3-lnput Gate,O/e Dual 4-lnput NAND Gate Dual 4-lnput AND Gate
5454 54H50
00504 04001
54H51 54H53
04002 04003
54H54 54H55
04004 04005
54lS51
30401
54LS54
30402
2-2-2-2-lnput AOI Gate, Expandable 2-2-2-2-lnput AOI Gate 2-2-lnput AOI Gate, Expandable Dual 2-2-lnput AOI Gate 2-2·2-3-lnput AOI Gate, Expandable 2-2-2-3-lnput AOI Gate 4-4-lnput AOI Gate, Expandable Dual 2-2-lnput AOI Gate 2-2-2-3-lnput AOI Gate
54S51 54S64
07401 07402
2-2-lnput AOI Gate 4-2-3-2-lnput AOI Gate
/
4030A 4070B 4077B
54B6
05303 17203 17204 00701
54lB6
02601 30502
54lS266
30303
Dual 4-lnput NAND Gate,O/e
Fairchild, Motorola, National, TI
54SB6
07501
Quad 2-lnput NAND o/e to 15V B-Input NAND Gate
Motorola, TI 10507
06005
Fairchild, Motorola, National, TI
Quad 2-lnput NAND Gate,O/e Quad 2-lnput NAND Gate
Motorola, National, TI
Quad 2-lnput NAND Gate,O/e Triple 3-lnput NAND Gate
National
Dual 4-lnput NAND Gate National B-1 nput NAND Gate
National
54S00
07001
Fairchild,Signetics, TI
54S03
07002
54S0B 54S09
OB003 OB004
Quad 2-lnput NAND Gate Quad 2-lnput NAND Gate,O/C Quad 2-lnput AND Gate
54S10
07005
54S11
OB001
54S20
07006
Dual 4-lnput NAND Gate Fairchild, TI
54S22
07007
Dual 4-lnput NAND Gate,O/C
TI
B Input NAND Gate
TI
Motorola Motorola Motorola Motorola Fairchild, Motorola, National, Raytheon, TI Fairchild, Motorola, National, Raytheon, TI Fairchild, Signetics Fairchild·
RCA, SSS
Motorola, National, Signetics, TI Fairchild, Motorola, National, Signetics, TI Signetics Motorola
05201
4001A
05202
Dual 3-lnput NOR Gate· plus Inverter Quad-2-lnput NOR Gate
4002A
05203
Dual 4-lnput NOR Gate
4025A'
05204
Motorola, National, ReA, SSS Motorola, National, ReA, SSS Triple 3-lnput NOR Gate Motorola, National, RCA, SSS RCA, SSS Quad 2-lnput OR Gate
4071B
17101 17102
4075B
17103
Dual 4-lnput OR Gate Triple 3-lnput OR Gate
TI
5402
00401
Quad 2-lnput NOR Gate
Fairchild, Signetics
5423
00402
Dual 4-lnput NOR Gate with Strobe, Expandable
5425
00403
5427 5432
00404 16101
54LS02
30301
Dual 4-lnput NOR Gate Motorola, TI with Strobe Triple 3-lnput NOR Gate Fairchild, Motorola, TI Signetics Quad 2-lnput OR Gate Quad 2-lnput NOR Gate Fairchild, Motorola, National, Signetics, TI
54lS27
30302
Triple 3-lnput NOR Gate Fairchild, Motorola, National, Raytheon, TI
54lS32
30501
Quad 2-lnput OR Gate
Fairchild, Motorola, National, Raytheon, Signetics, TI
Quad 2-lnput NOR Gate Quad 2-lnput NOR Gate
National Fai rch i Id, Signetics
54S133
07009
13-lnput NAND Gate
Fai rch i Id,Signetics
930
03001
Dual 4-lnput NAND Gate, Expandable, DTL
Fairchild
935 940
03002
DTl Hex Inverter
Fairchild
54102
03002
DTl Logic Gate
Fairchild
54S02
02701 07301
946
03004
Fairchild
10501
06001
962
03005
Fairchild
10502
06002
10504
06201
Motorola
10505
06003
10597
06202
Quad 2-lnput NAND Gate, DTl Triple 3-1 nput NAND Gate, DTL Quad 2-lnput NAND Gate Hex AND Gate
Motorola
10506
06004
10509
06006
GATES, AND;.OR/AND-OR-INVERT
Quad 2-lnput OR/NOR Gate Quad 2-lnput Gate (3 NOR, lOR/NOR)
RCA RCA Fairchild, Motorola, National, TI Motorola, TI
Motorola Motorola
2-3-2-lnput OR/NOR Gate 4-3-3 Input OR/NOR Gate 4-5-lnput OR/NOR Gate
Motorola
ReA
Motorola Motorola
4019A
05302
Quad AND-OR Select Gate
National, ReA, SSS
4019B
05352
SSS
4099B
40B5
17201
Quad and/or Select Gate Dual 2-Wide 2-lnput AOI
ReA
4043A
05103
8-Bit Addressable latch Quad NOR R/S latch
5475
01501
Complementary Output
SSS Motorola, Signetics
LATCHES 17601
40B6
17202
4-Wide 2-lnput AOI Gate, Expandable
ReA
5477
01502
Quad Bistable latch
Motorola
5450
00501
2-2-lnput AOI Gate, Expandable
Motorola, National, TI
54116
01503
Dua I 4-Bit latch with Clear
Signetics
Motorola, National, TI
54lS75 54LS259
31601
Signetics, TI Quad Bistable latch 8-Bit Addressable Latch TI
5451
00502
2-2-lnput AOI Gate, Expandable
::::J (!J
Motorola, National, SSS Motorola, ReA RCA Fairchild, Motorola, National, Signetics, TI National
4072B
Quad 2-lnput AND Fairchild Gate, O/C Triple 3-lnput NAND Fairchild, Signetics, TI Gate Triple 3-lnput AND Gate Fairch i Id,Signetics
Q)
~
Quad Exclusive OR Gate Quad Exclusive OR Gate Quad Exclusive OR Gate Quad 2-lnput Exclusive OR Gate Quad 2-1 nput Exclusive OR Gate Quad 2-lnput Exclusive OR Quad 2-lnput Exclusive NOR Gate, o/e Quad 2-lnput Exclusive OR Gate Triple 2-1 nput Exclusive OR/NOR Gate
4000A
National
02001
Motorola, National, TI Motorola
GATES, OR/NOR
National
02002
Motorola, National, TI
GATES, EXCLUSIVE OR/NOR
54LSB6
54130
0700B
00503
Fairchild, Motorola, National, Signetics, TI Fairchild, Motorola, National, Raytheon, TI
54120
54S30
M3851D/
5453
Motorola Fairc~ild,
Source
Description
Device
31603
BASED ON OPL-3851 0·54, 20 SEPTEMBER 1982
© IC MASTER 1983
363
c
.Q +-'
C,) Q)
Q)
C/}
MILITARY PARTS DIRECTORY MISCELLANEOUS (cont)
LATCHES (cont) Souree
Device
M38510/
54LS241
32402
Signetics, TI Motorola
54LS242 54LS243 54LS244
32801 32802 32403
Motorola
54LS245
32803
Fairchild, Motorola, National, Signetics
54lS132
31303
Fairchild, Motorola, National, Signetics Fairchild, Motorola, National, TI Fairchild, Motorola, National, Signetics, TI Fairchild, Motorola, National, Raytheon, TI
54LS280
32901
10524
06301
10525
06302
Description
Device
M38510/
54LS279 54LS373
31602 32502
8-Bit Latch, TransparTI ent D-Type, Three State
54LS375 9314
31604 01504
Quad Bistable Latch Quad Multifunction Latch
16·Channel Data Selector/Multiplexer 8·lnput Multiplexer
Quad set Reset Latch
Fairchild, Signetics, TI
MULTIPLEXERS
(I,)
"0
::s
54150
01401
54151
01406
54153
01403
54LS151
30901
(!J
54LS153
30902
c
54LS157
30903
+oJ
54LS158
30904
54LS251
30905
o
o
(I,) (I,)
(J) 54lS253
30908
54LS257
30906
54lS258
30907
54S151 54S153
07901 07902
54S157
07903
54S158
07904
9309
01404
9312
01402
54157, 9322
01405
Dual 4·Channel Data Selector/Multiplexer 8-lnput Multiplexer Dual 4·Channel Data Selector/Multiplexer Quad 2·lnput Multiplexer, Non-Inverting Quad 2·lnput Multiplexer, Inverting 8-lnput Multiplexer, Complemetary Input, Strobe, TS Dual 4-lnput Multi· plexer, TS Quad 2·lnput Multi· plexer, Non·lnverting, TS Quad 2·lnput Multi· plexer, Inverting, TS 8-lnput Multiplexer Dual 4·Channel Data Selector/Multiplexer Quad 2·lnput Multi· plexer, Non·lnverting Quad 2·lnput Multi· plexer, Inverting Dual4-lnput Multiplexer 8·Channel Data Selector/Multiplexer Quad 2-lnput Data Selector/Multiplexer (Non·lnverting)
Fairchild, Motorola, Raytheon, TI TI
Fairchild, Motorola, Signetics, TI Fairchild, Signetics, TI Fairchild, Signetics Fairchild, Signetics Fairchild, Signetics Fairchild, Signetics Fairchild, Motorola, Signetics Motorola Fairchild, Motorola, National, Signetics
4098B
17504
54121
01201
54122,
01202
54123
01203
54LS122
31403
54lS123
31401
54LS221
31402
9601 9602
01204 01205
15101
5414
15102
54132
15103
54180
01901
54LS13
31301
54LS14
31302
54LS240
BASED
364
32401
Motorola, Signetics, TI
TI Motorola Motorola
DG182
11101 11102
DG184 DG185
11103 11104
DG187 DG188
11105
DG190 DG191 DG300 DG302 DG303 DG304 DG305 DG306 DG307 4016A 4066A
11106 11107 11108 11601 11603 11604 11605 11606 11607 11608 05801 05802
2xSPST, 2xSPST, 2xDPST, 2xDPST,
JFET JFET JFET JFET
SPDT, JFET SPDT, JFET 2xSPDT, JFET 2xSPDT, JFET 2 x SPST, CMOS '
Siliconix Siliconix Siliconix Siliconix Siliconix Siliconix Intersil, Siliconix Intersil, Siliconix
2 x DPST, CMOS
Siliconix Siliconix
2 x SPDT, CMOS
Siliconix
2 x SPSTi CMOS SPDT, CMOS 2 x DPST, CMOS
Siliconix Siliconix
2 x SPDT, CMOS 4 x SPST, CMOS 4xSPST, CMOS
Siliconix Siliconix Motorola, SSS Motorola
D/A CONVERTERS 11302 11301
D/A Converter, 8·Bit D/A Converter, 8-Bit
PMI PMI
RCA
LINE DRIVERS AND RECEIVERS Fairchild, Motorola, Signetics Fairchild, Motorola
Fairchild, Motorola, Signetics
54S140
08101
55107
10401
55108
10402
55113
10405
55114, 9614 55115, 9615
10403
Motorola, TI
Motorola, TI
10404
Dual 4·1 nput Positive NAND Line Driver Differential Line Receiver Differential Line Receiver ' Dual Differential Line Driver, Three·State Dual Differential Line Driver Dual Differential Line Receiver
Fairchild, Signetics Fairchild, Motorola, TI TI
TI Fairchild, TI Fairchild, TI
Motorola, TI
Fairchild, Motorola Fairchild, Motorola
MISCELLANEOUS 5413
TI
INTERFACE
DAC·08 Dual Monostable Multi· vibrator, Retriggerable Monostable Multivibrator Retriggerable Mono· stable Multivibrator with Clear RetriggerablEi Mono· stable Multivibrator with Clear Dual Retriggerable Monostable Multi· vibrator with Clear Dual Retriggerable Monostable Multi· vibrator with Clear Dual Monostable Multi· vibrator, Schmitt Trigger Input One Shot Multivibrator Dual One Shot Multivibrator
Quad TTL to ECL OR/ NOR Translator Quad ECL to TTL Translator
TI TI Motorola, TI
ANALOG SWITCHES
DAC·08A
MULTIVIBRATORS
Octal Bus Transceiver, Three'State Quad 2·lnput NAND Schmitt Trigger 9·Bit Odd/Even Parity Generator Checker
Motorola, TI
\ DG181
Fairchild, Motorola, National, TI
Source
Description Octal Bus Driver, Schmitt Trigger, Non·lnverting Quad Bus Transceiver Quad Bus Transceiver Octal Bus Driver, Schmitt Trigger, Non·lnverting, Three , State
Dual 4·lnput NAND Schmitt Trigger Hex Schmitt Trigger, Inverting Quad 2-lnput NAND Schmitt Trigger 9-Bit Odd/Even Parity Generator/Checker Dual4·lnput NAND Schmitt Trigger Hex Schmitt Trigger, Inverting
,Motorola
Octal Bus Driver, Schmitt Trigger, Inverting
TI
LINEAR AMPLIFIERS lM101A
10103
Operational Amplifier
LM108A LM118 1558
10104 10107 10108
Operational Amplifier
741
10101
747
10102
LH2101A
10105
HA2500
12204
HA2510 HA2520
12205 12206
HA2600 HA2620
12202 12203
Motorola
Operational Amplifier Dual Operational Amplifier Operational Amplifier
Motorola, Signetics Motorola, National, Signetics Motorola, TI Motorola, Signetics, TI
Dual Operational Amplifier Dual Operational Amplifier Operational Amplifier Operational Amplifier Operational Amplifier Operational Amplifier Operational Amolifier
Fairchild, National, Raytheon, Signetics Fairchild, National National Fairchild Fairchild, National, Raytheon Fairchild, National, Raytheon Raytheon, Signetics Harris Harris Harris Harris Harris
ON QPL·3851 0-54, 20 SEPTEMBER 1982 © IC MASTER 1983
MILITARY PARTS DIRECTORY PROMs (cont)
AMPLIFIERS (cont) Description
Source
Device
M38510/
4136
11004
Quad Operational Amplifier
Fairchild, Raytheon
PM2108A
10106
Dual Operational Amplifier
PMI
lM124
11005
Quad Operational Amplifier
Fairchild
lM148
11001
Quad Operational Amplifier
Raytheon
PM155
11401
Operational Amplifier
PMI
PM155A
11404 11402
Operational Amplifier
PMI PMI PMI
PM156 PM156A
Device
M38510/
HM7642-2
20601
HM7643-2 HM7640-2
Source
Descripti on 1024x4,OC
Harris
20602
1024x4, TS
Harris
20801
512x8,OC
Harris
HM7641-2
20802
512x8, TS
Harris
93Z511
21004
2048x8, TS 45 nsec
Fairchild
4116 (200 ns)
24001
16384x1, TS
Mostek
4116 (250 ns)
24002
16384x1, TS
Mostek
2147H (85 ns)
23801
4096 xl, TS
Intel
RAMs
11405
Operational Amplifier Operational Amplifier
PM157
11403
Operational Amplifier
PMI
PM157A
11406
Operational Amplifier
PMI
4156
11003
Quad Operational Amplifier
Raytheon
2147H (70 ns)
23803
4096 x 1, IS
Intel
HA4741
11003
Quad Operational Amplifier
Harris
2147H (55 ns)
23805
4096 xl, TS
Intel
2147H (45 ns)
23807
4096 x 1, TS
Intel
2148H
23806
RAM, 1024x4, TS
Intel
COMPARATORS 111
10304
Voltage Comparator
Fairchild, Raytheon, National
931415
23103
RAM, 1024x1-Bit, OC
Fairchild
139
11201
Quad Voltage Comparator
Raytheon
93425
23102
RAM, 1024x1-Bit, TS
Fairchild
931425
23104
RAM, 1024x1-Bit, TS
Fairchild
93425
23106
RAM, 1024x1-Bit, TS
Fairchild
93425A
23108
RAM, 1024xl-Bit, TS
Fairchild
931422
23112
RAM, 256x4, T.S
Fairchild
93l422A
23115
RAM, 256x4, T.S
Fairchild
Motorola, National, RCA Motorola, National, RCA
710
10301
Voltage Comparator
Fairchild
lH2111
10305
Dual Voltage Comparator
Raytheon
TIMERS
I 555
10901
Timer
I
TRANSISTOR ARRAYS 10802
Transistor Array
4006A
05701
18-Bit Static S.R.
4014A
05702
18-Bit Static S.R. (Synchronous)
4015A
05703
Dual 4·Bit Static S.R.
Motorola, National, RCA, SSS
4021A
05704
8·Bit Static S.R. Asynchronous
Motorola, National, RCA, SSS
lM723
10201
Voltage Regulator
Fairchild
lM109
10701
Voltage Regulator
Fairchild
4031A
05705
64-Bit Static S.R.
National, RCA
7812
10707
Voltage Regulator
Fairchild
54195
02801
4·Bit Parallel Access S.R.
National
5495
00901
4·Bit Parallel Access S.R.
Motorola, National
5496
00902
5·Bit S.R.
Motorola, National, Signetics
54164
00903
8·Bit Serial-I n Parallel·Out S.R.
National, Signetics
8·Bit Parallel-Serial S.R. 4·Bit Universal S.R.
Motorola
7805
10706
Voltage Regulator
Fairchild
78M12
10703
Voltage Regulator
78M15
Voltage Regulator
Fairchild Fairchild
7815
10704 10708
Voltage Regulator
Fairchild
7824
10709
Voltage Regulator
Fairchild
79M05
11501
Voltage Regulator
7905
Voltage Regulator
54165
00904
7912
11505 11506
Fairchild Fairchild
Voltage Regulator
Fairchild
54194
00905
7915
11507
Voltage Regulator
Fairchild
79M12
11502 11503
Voltage Regulator Voltage Regulator
Fairchi Id
54195
00906
4·Bit Parallel Access S.R.
Motorola
54lS95
30603
4·Bit Parallel Access S.R.
Fairchild, Signetics, TI
54lS96
. 30604
Fairchild
MEMORY· 20701
32x8,OC
Signetics
32x8, TS
Signetics
82S123
20702
82S115
20803
512x8, TS PROM
Signetics
82S126
20301
256x4,OC
Signetics
82S129
20302
256x4, TS
Signetics
82S185
20902
82S130
20401
2048x4 PROM PROM, 512x4, OC
82S131
20402
PROM, 512x4, TS
Signetics Signetics Signetics
82S137 82S141
20602
1024x4, TS
Signetics
20802
512x8, TS
Signetics
82S181
20904
1024x8, TS
Signetics
82S191
21002
2048x8, TS
Signetics
82S2708 HM7602·2
20905 20701
1024x8, TS 32x8,OC
~ignetics
32x8, TS
HM7603·2
o ...... u Q) Q)
C/)
Harris
20702 HPROM512 20101 HM7610·2 20301
64x8 PROM
Harris Harris
256x4,OC
Harris
HM7611-2
20302
256x4, TS
Harris
HM7620·2 HM7621-2
20401 20402
PROM, 512x4, OC PROM, 512x4, TS
Harris Harris
Motorola, National, Signetics
5·Bit S.R .
Signetics, TI
54lS164
30605
8·Bit Serial In, Parallel Out, S.R.
Motorola, Signetics, TI
54lS165
30608
8·Bit Parallel load S.R., Complementary Outputs
Motorola
54lS166
30609
8·Bit Parallel-In, Serial·Out S.R.
Motorola, TI
54lS194
30601
4·Bit Universal Bidirectional S.R.
Motorola, TI
54lS195
30602
4·Bit Parallel In, Parallel Out, S.R.
Signetics, TI
54lS295
30606
4·Bit Parallel In, Paraliel Out, Right! left S.R.
Signetics, TI
54lS395
30607
4·Bit Paraliel In. Paraliel Out. Cascadable S.R.
Signetics, TI
54lS670
31901
4x4 Register File, TS
Motoro!a
9300
15901
Universal 4·Bit S.R.
Motorola
9328
15902
Dual 8·Bit S.R.
Motorola
PROMs 82S23
C
SHIFT REGISTERS
Fairchild
VOLTAGE REGULATORS
79M15
::J
CJ
. Fairchild, Signetics
1f-5"-'5:....:6'_____ _-=1.::.o~90:....:2'_____ __=D:. .: u:. : a.:. . 1T.:.:.i.:. :.m:. : e. :. . r_ _ _ _~Si,gnetics 558 10903 Quad Timer Signetics
13045
Q)
"0
MICROPROCESSORS 8080A
42001
Microprocessor
Intel
8086
53001
Microprocessor
Intel
BASED ON QPl-3851 0-54, 20 SEPTEMBER 1982
© IC MASTER 1983
Last Page This Section. Next Page 401.
365
ABBREVIATIONS OF COMPANY NAMES Action Ins AD ADT Adapt Sci Advent Alphatron AMA AMD AMI Amperex Analogic Analog Sys APC Apex APM ApplSys APT Aptek Array Tech AWl
Action Instruments Analog Devices Advanced Digital Technology Adaptive Science COfp. Advent Products, Inc. Alphatron American Automation Advanced Micro Devices American Microsystems, Inc. Amperex Electronic Corp. Analogic Analog Systems Applied Micro Circuits Apex Microtechnology Applied Microsystems Corp. Applied Systems Corp. Applied Microtechnology Aptek Microsystems Array Technology Analog West
Bedford Burr·Brown
Bedford Computer Systems Inc. Burr·Brown Research
CAE Cal Devices Cent Data Cermetek CGRS Cherry CIC Citel Comlinear CMA Comark Comdial Comp Auto Compas Cont Logic Control Sys CreMicro Cromemco CSG Cubit Curtis Cybernetic Cybersys Cybertek
Computer Aided Engineering California Devices Central Data Corp. Cermetek CGRS Microtech Inc. Cherry Semiconductor Custom Integrated Circuits Citel, Inc. Com linear Corporation Custom MOS Arrays Comark Corp. Comdial Semiconductor Computer Automation Com pas Microsystems Control Logic Inc. Control Systems Microsystems Div. Creative Micro Systems Cromemco, Inc. Commodore Semiconductor Group Cubit Inc. Curtis Electro Devices, Inc. Cybernetic Micro Systems Cybersystems Cybertek Inc.
Data General Data I/O Data Trans Datel Datricon DDC DEC Delco DGM Digelec Digitek Dionics Dist Comp Divers Tech
Data General Data I/O Data Translation Datel·lntersil Datricon Corporation Data Devices Corporation Digital Equipment Corporation Delco Electronics Digital Microsystems Digelec Corp. Digitek, Inc. Dionics Inc. Distributed Computer Systems Diversified Technology
E·HI Elind EL Instr EMM Emulogic Epson ETI Micro Exar
E·H International, Inc. Elind Elettronica Industriale E & L Instruments EMM Emulogic Inc. Epson America, Inc. HI Micro Exar Integrated Systems
Fairchild Ferranti Fujitsu A Fujitsu
Fairchild Ferranti Electric Fujitsu America Fujitsu Microelectronics, Inc.
GI GMS GTE Micro
General Instrument General Microsystems GTE Microcircuits
Harris Heurikon Hilevel Hitachi Holt HP Hughes
Harris Semiconductor Heurikon Corp. Hilevel Technology, Inc. Hitachi America, ltd. Holt Inc. Hewlett·Packard Hughes Aircraft, Solid State Products Hybrid Systems Hycom Incorporated
Hybrid Sys Hycom
IMS Inconix Ind Tech Inmos IntCirEng IntCirSys IntCompSys IntCyber Int Micro Int Tech Intech/FMI Intel Interdesign Intersil Intronics IPI ITT
Integrated Device Technology International Microcircuits, Inc. International Microelectronic Products Industrial Micro·systems Inc. Inconix Corporation Inductive Technology Inmos Integrated Circuit Engineering Integrated Circuit Systems Integrated Computer Systems International Cybernetics International Microsystems Integrated Technology Corp. Intech/Function Modules Inc. Intel Interdesign Intersil Intronics Integrated Photomatrix Inc. ITT Semiconductors
Kinetic Sys Kontron
Kinetic Systems Kontron Electronics
Lambda Laserdyne LSI Comp LSI Logic
Lambda Semiconductor Laserdyne LSI Computer Systems LSI Logic Corporation
Master Logic Matrix Matrox MCC Micrel Micro Eng Micro Innov Micropac Micro Net Micro Pwr Micro Sci Micro Tech Micro·Link Micron MilerTron Miller Mitel Mitsubishi MMI Monosil MonSys Mostek Motorola MRC Murray
Master Logic Corporation Matrix Corp. Matrox Electronic Systems Microcomputer Control Micrel Micro Circuit Engineering Micro Innovators M:cropac Industries Micro Networks Micro Power Systems Micro Sciences Corp. Microcircuits Technology Micro·Link Corporation Micron Technology MilerTronics Miller Technology Mitel Semiconductor Mitsubishi Electronics Monolithic Memories, Inc. Monosil Monolithic Systems Corp. Mostek Motorola Semiconductor MRC Systems Murray Consulting
National NCR
National Semiconductor NCR Corp., Microelectronics Division NEC / Electronic Arrays Division NEC / Electron Division NEC/ Microcomputer Division Nitron Nortek
IDT IMI IMP
NEC·EA NEC Electron NEC Micro Nitron Nortek
OAE Octagon OEI Ohio Sci OKI Omnibyte Oscar
Oliver Advanced Engineering Octagon Systems Corp. Optical Electronics Inc. Ohio Scientific OKI Semiconductor Omnibyte Corp. I. S. Oscar Assoc.
Panasonic PC/M Percom Phoenix Pico Design Polycore Plessey PMI PragDes PREMA Pro·Log
Panasonic Pacific / Cyber Metrix Percom Data Co. Phoenix Digital Corp. Pico Design Polycore Electronics Plessy Semiconductors Precision Monolithics, Inc. Pragmatic Design Inc. PREMA GmbH Pro·Log Corp.
Quay
Quay Corp.
Raytheon RCA RCI Data RElMS Reticon RIFA Rockwell RTC
Raytheon Semiconductor RCA Solid State Division RCI Data Relational Memory Systems Reticon RFIA Rockwell, Microelectronic Devices Riehl Time Corporation
Sank en Sanyo SEEQ Semi Proc Siemens Signetics SGS Sharp Silicon G Siliconix Silicon Sys Siltronics SMC Solarise Solitron Sprague SSM SSS Stag Struc. Des. Stynetic Sunrise Sunshine Supertex Symtek Synapse Synertek Sys Innov
Sanken Electric Sanyo SEEQ Technology, Inc. Semi Processes Siemens Signetics SGS·ATES Semiconductor Sharp Silicon General Siliconix Silicon Systems Inc. Siltronics Standard Microsystems Corp. Solarise Enterprises Solitron Devices Sprague Electric Company Solid State Micro Technology for Music Solid State Scientific Stag Microsystems Structured Design Inc. Stynetic Systems Sunrise Electronics Sunshine Semiconductor Supertex Inc. Symtek Corp. Synapse Corp. Synertek Systems Innovations
Tau Zero Tektronix Telaris Teledyne C Teledyne P Teledyne S Telefunken Telephonics Telmos Teltone TI Thomson·CSF TMX Topanga Toshiba Trans·Data TRW
Tau Zero Inc. Tektronix (See Laserdyne) Teledyne Crystalonics Teledyne Philbrick Teledyne Semiconductor Telefunken Telephonics LSI Telmos Teltone Corporation Texas Instruments Thompson·CSF Components Corp. TMX Topanga Data Systems Toshiba America Trans·Data TRW·LSI Products
Unitrode Universal
Unitrode Universal Semiconductor, Inc.
Vantage VTI Votrax
Vantage Data Products VLSI Technology, Inc. Votrax
Weitek Western Wintek
Weitek Corporation Western Digital Wintek Corp.
Xicor Xycom
Xicor, Inc. Xycom
Zendex Zilog Zymos
Zendex Corp. Zilog Zymos Corporation ©
Ie MASTER 1983
MICRO
•
PO\NER SYSTEMS
. Mill-tary Ie's
, ,' ....
Note: See other MPS parts in Interface and Linear Sections.
MICRO POWER SYSTEMS - HIGH RELIABILITY (HI-REL) Micro Power Systems has established standard procedures for manufacturing, screening, qualification, and quality conformance, and is incorporating the requirements of both MILSTD883 and MILQ-9858. Devices meeting Class B screening requirements of MILSTD-883 are available as standard catalog items. Requests for devices with other special requirements are invited. MPS standard "/883B" parts designate devices which have been subjected to 100% screening in
accordance with Method 5004 of MILSTD-883, Class B. Quality Conformance Testing (Groups A, B, C, D) in accordance with Method 5005 of MILSTD-'B83 is available on special order. Additionally, a complete line of monolithic dual transistors, both field effect and bipolar types, screened to the requirements of MILS-19500, MIL STD-750, and MIlrSTD-202 are also available as standard catalog items.
en
E
a> ......
en
~
en L-
a>
;: o
a...
o
L-
1000/0 SCREENING PROCEDURE
(,)
~
MILITARY PROGRAMS MIL-STD-883 METHOD/COND.
SCREEN 1. Internal Visual
2. 3. 4. 5.
Stabilization Bake Temperature Cycling Constant Acceleration Seal: (A) Fine (B) Gross 6. Initial Electrical 7. Bum-In Test
8. Final Electrical 100% go-no-go 9. External Visual 10. Lot Acceptance
2010 Condo B. 1080 Condo C (24 hrs. min.) 1010 Condo C 2001 Condo E; Y1 plane 1014 Condo A or B 1014 Condo C MPS Specifications 1015 Condo A or B 168' hrs. @ +125°C Subgroups AI, A2, A3, A7, Functional tests per Table 1 2009 Sample Inspection Table 1, Group A Elect. Tests
o Space Shuttle o LAMPS CIt Cruise Missile o AWACS o NEARTIP • ALQl19, ALQ131 , o IR Maverick • QF100/A300 Airbus • HG480/280 o Alpha Jet
The following MPS parts are available for "Hi-ReI" Military Applications: Digital-to-Analog Converters MP370 MP377-18 MP562 MP3140 MP5520 MPDAC100 MP7520 MP7521 MP7522 MP7523 MP7524
MP7530 MP7531 MP7533 MP7541 MP7614 MP7616 MP7621 MP7622 MP7623 MP9377-16
Analog-to-Digital Converters MP7138 MP7550 MP7570
Precision Voltage References
Analog Multiplexers* MP7501 MP7502 MP7503 MP7506 MP7507 MP7508DI MP7509DI
MP5010 MP5532/REF 01 MP5531/REF 02
Precision Operational Amplifiers MP5501/0P 01 MP5502/0P 02 MP5505/0P 05
MP5507 lOP 07 MP5508/0P 08 MP5509/0P 09 MP551010P 10
MP5511/0P 11 MP5512/0P 12 MP5524/0P 24
Analog Switches*
MP5527 lOP 27 MP5534/0P 34
MP5537 lOP 37
MP7510DI MP7511DI MP7512DI MP200DI MP201DI
MP7574 MP7581
*Note: Dielectrically isolated Multiplexers and switches are indicated by "DI" suffix.
INA.
MICRO
~POWER
SYSTEMS
©
Ie MASTER 1983
3100 Alfred Street Santa Clara, CA 95050 (408) 727-5350
401
NATIONAL SEMICONDUCTOR MIL-AERO National Semiconductor offers six basic categories of Military/Aerospace Products. Our support of military standardization is demonstrated in the number of MIL-M-38510 qualified devices we offer. To provide devices of comparable quality and reliability where no MIL-M-38510 specifications exist, we offer a complete line of 883B/RETSTM devices, tested to the most compliant in-house screening program in the industry. The heart of this program is the RETS (Rei Electrical Test Specification) a fully documented and controlled electrical test specification. Our customers can tell exactly what we test. None of our competitors provide this level of visibility. To meet the more extensive reliability needs of the space community, we offer MIL-M-38510 Class S devices and 883S/RETSTM devices, many of them radiation hardened. We have the products and the screening most major programs need. Let us show how we can meet your needs. ~
o ...... o
::J 'U
NATIONAL SEMICONDUCTOR RELIABILITY SCREENING FLOWS
c: o
JM38510 Class S
o E Q)
en C\l
c: o
...... C\l
Z
883SIRETS™ Monolithic
883S/RETS Hybrid
JM38510 Class B
883B/RETSTM
883BIRETS™
Hybrid
X
Line Certification
X
Wafer Lot Acceptance
X
X
SEM only
On Shore Assembly
X
X
from seal onward
X
Assembly Die·Shear
X
X
X
X
100% Non-Destructive Bond Pull
X
X
X
Destructive Bond Pull Sample
X
X
X
X
X
X
2010A
2010A
2017
2010B
2010B
2017
Internal Visual
X
X
Stabilization Bake, 1008C
X
X
X
X
X
X
Temperature Cycle, 1010C
X
X
X
X
X
X
Constant Acceleration, 2001E
X
X
relaxed for some packages
X
X
X
Fine Leak, 1014B
optional
optional
optional
X
X
X
Cross Leak, 1014C
optional
optional
optional
X
X
X
some devices
PIND,2020
X
X
Serialization
X
X
X
Controlled Electrical Test Specifications
X
X
X
X
X
X
X
X
X
optional
optional
optional
240 hrs
240 hrs
240 hrs
160 hrs
160 hrs
160 hrs
X
X
X
Interim Electricals, 25°C Burn-in, 125°C, 1015* PDA~
10%*
5%
5%
X
Drift Measurement (A's)
X
X
X
Fine Leak, 1014B
X
X
X
optional
optional
optional
Cross Leak, 1014C
X
X
X
optici'nal
optional
optional
Final Electricals (3 temp DC, 25°C AC)
X
X
X
X
X
X
X-Ray, 2012
X
X
X
X
X
X
X
X
X
every lot
every lot
every lot
every lot
every lot
not required
not required
not required
every 90 days
every 90 days
every 6 months per package
ever/6 months per package
every 6 months per package
every 6 months per package
every 6 months per package
every lot every 90 days for quality
X
X
X
X
X
Group A, 5005 Table I Group B, 5005 Table 11* * Group C, 5005, Table III
Note: hybrids use Method 5008 for Quality
Group 0, 5005, Table IV External Visual, 2009
X
* CMOS devices receive 2 static burn-ins of 24 hours each and a dynamic burn-in of 240 hours with PDA's of 5% on the statics (combined) and
5% on the dynamic.
* * For lot definitions, see MI L-M-3851 O. * * * Some devices are tested to other conditions. I
402
@
Ie MASTER 1983
NATIONAL SEMICONDUCTOR MILITARY/AEROSPACE PRODUCTS (X Available, F Future, S Submitted for Qualification)
=
883B ADC0800 ADC0808 ADC0816 ADC1210 ADC1211 AF100-1 AF100-2 AF120 AHOO14 AHOO15 AHOO19 AH0126 AH0129 AH0133 AH0134 AH0139 AH0140 AH0141 AH0142 AH0143 AH0144 AH0145 AH0146 AH0151 AH0152 AH0153 AH0154 AH0161 AH0162 AH0163 AH0164 AH2114 AM3705 CD4000 CD4001 CD4002 CD4006 CD4007 CD4008 CD4009 CD4010 CD4011 CD4012 CD4013 CD4014 CD4015 CD4016 CD4017 CD4018 CD4019 CD4020 CD4021 CD4022 CD4023 CD4024 CD4025 CD4027 CD4028 CD4029 . CD4030 CD4031 CD4034 CD4035 CD4040 CD4041 CD4042 CD4043 CD4044 CD4046 CD4047 CD4048 CD4049 CD4050 CD4051 CD4052 CD4053 CD4060 CD4066 CD4069 CD4070 CD4071 CD4072 CD4073 CD4075 CD4076 CD4081 CD4082 CD4089 CD4093 CD4099 CD40106 CD40160 CD40161 CD40162 CD40163 CD40174
@
38510B
X X X X X X X X X X X X X X X X X X X X X X X X X X X X
x
X X
X X X X F
X X X X X F X X X X X X X F X X F X X
F
F
X X
F F F F F F F F F
X
X X X X X X X X X
385105
X X X X X X X X X X X X X X X X X X X X
x
X X X X F X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
8835
=
RAD HARD
F F F
F
Ie MASTER 1983
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X F X X X X X X X X X
F F F F F
F F F F F F F F F F F F F F F F F F F
F
F F
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
F F F F F F F F F
X X X X X X X X X
F F F
X
F
X
X
=
883B CD40175 CD40192 CD40193 CD40195 CD4503 CD4507 CD4510 CD4511 CD4512 CD4514 CD4515 CD4516 CD4518 CD4519 CD4520 CD4522 CD4526 CD4527 CD4528 CD4529 CD4543 CD4584 CD4723 CD4724 COP320C COP402L COP498 COP499 DAC0800 DAC0808 D'AC1020 DAC1021 DAC1022 DAC1200 DAC1201 DAC1202 DAC1203 DAC1220 DAC1221 DAC1222 DAC1285 DAC1286 DHOOO6 DHOOO8 DHOO11 DHOO34 DHOO35 DM2502 DM2503 DM2504 DM5400 DM5401 DM5402 DM5403 DM5404 DM5405 DM5406 DM5407 DM5408 DM5409 DM5410 DM5411 DM5413 DM5414 DM5416 DM5417 DM5420 DM5423 DM5425 DM5426 DM5427 DM5430 DM5432 DM5437 DM5438 DM5440 DM5441A DM5442 DM5445 DM5446A DM5447A DM5448 DM5450 DM5451 DM5453 DM5454 DM5460 DM5470 DM5472 DM5473 DM5474 DM5475 DM5476 DM5483 DM5485 DM5486
X X X X X X X X X X X X X X X X X X
38510B
F F
x
X X X X X F F F F X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
8835
X X X X X F X X F F F X X X X F F X F F F F X X
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X X
F F
X X X
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F F F F
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X X X
X X X X X X X X X
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X X X X
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
X
X
X X X X X X X X X X X X X X X X X
X X X X X X X X X X X X X X X X X
X X X X X X X X X X
S
883B DM5490A DM5492A DM5493A DM5495 DM5496 DM54107 DM54109 DM54121 DM54123 DM54125 DM54126 DM54132 DM54142 DM54145 DM54147 DM54148 DM54150 DM54151A DM54153 DM54154 DM54155 DM54156 DM54157 DM54160A DM54161A DM54162A DM54163A DM54164 DM54165 DM54166 DM54173 DM54174 DM54175 DM54176 DM54177 DM54180 DM54181 DM54184 DM54185A DM54190 DM54191 DM54192 DM54193 DM54194 DM54195 DM54196 DM54197 DM54198 DM54199 DM54251 DM54284 DM54285 DM54365 DM54366 DM54367 DM54368 DM54LOO DM54L01 DM54L02 DM54L03 DM54L04 DM54L05 DM54L08 DM54L09 DM54L10 DM54L11 DM54L20 DM54L26 DM54L30 DM54L32 DM54L42A DM54L51 DM54L54 DM54L55 DM54L71 DM54L72 DM54L73 DM54L74 DM54L75 DM54L78 DM54L85 DM54L86 DM54L90 DM54L91 DM54L93 DM54L95 DM54L98 DM54L123A DM54L154A DM54L157A DM54L164A DM54L165A DM54L192 DM54L 193 DM54LSOO DM54LS01
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
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X X
X X
X X X X X X
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403
NATIONAL SEMICONDUCTOR MILITARY/AEROSPACE PRODUCTS (X = Available, F = Future, S = Submitted for Qualification) 8838
~
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DM54LS02 DM54LS03 DM54LS04 DM54LS05 DM54LS08 DM54LS09 DM54LS10 DM54LS11 DM54LS12 DM54LS13 DM54LS14 DM54LS15 DM54LS20 DM54LS21 DM54LS22 DM54LS26 DM54LS27 DM54LS30 DM54LS32 DM54LS37 DM54LS38 DM54LS40 DM54LS42 DM54LS47 DM54LS48 DM54LS49 DM54LS51 DM54LS54 DM54LS55 DM54LS73 DM54LS74 DM54LS75 DM54LS76 DM54LS77 DM54LS78 DM54LS83 DM54LS85 DM54LS86 DM54LS90 DM54LS93 DM54LS107 DM54LS109 DM54LS112 DM54LS113 DM54LS114 DM54LS122 DM54LS123 DM54LS125 DM54LS126 DM54LS132 DM54LS138 DM54LS139 DM54LS151 DM54LS153 DM54LS154 DM54LS155 DM54LS156 DM54LS157 DM54LS158 DM54LS160 DM54LS161 DM54LS162 DM54LS163 DM54LS164 DM54LS168 DM54LS169 DM54LS170 DM54LS173 DM54LS174 DM54LS175 DM54LS190 DM54LS191 DM54LS192 DM54LS193 DM54LS194 DM54LS196 DM54LS197 DM54LS240 DM54LS241 DM54LS242 DM54LS243 DM54LS244 DM54LS247 DM54LS248 DM54LS249 DM54LS251 DM54LS253 DM54LS257 DM54LS258 DM54LS266 DM54LS279 DM54LS283 DM54LS352 DM54LS353 DM54LS365 DM54LS366 DM54LS367 DM54LS368 DM54LS373 DM54LS374 DM54LS386 DM54LS670 DM54S00
404
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
x X
x X X X X
x X
385108
883S
385105
X
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
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X X X X X X X X X X
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883C
385108
883S
385105
X X X X X X X X X
F F F F F F F F F F F F
X
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X X X X X X X X X X X X X X X X
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883C DM7214 DM7219 DM7220 DM7223 DM7280 DM7281 DM7288 DM7290 DM7291 DM7511 DM7520 DM7542 DM7544 DM7546 DM7551 DM7552 DM7553 DM7554 DM7555 DM7556 DM7560 DM7563 DM7570 DM7590 DM75L11 DM75L 12 DM75L51 DM75L52 DM75L54 DM75L60 DM75L63 DM7613 DM76L13 DM76L24 DM76L25 DM76L70 DM76L75 DM76L76 DM76L90 DM76L93 DM76LS52 DM76LS62 DM76S75 DM77S184 DM77S185 DM77S190 DM77S191 DM77S295 DM77S296 DM7853 DM7875A DM7875B DM9024 DM9300 DM9301 DM9309 DM9310 DM9312 DM9316 DM9318 DM9322 DM9334 DM9601 DM9602 DP7303 DP7304 DP7307 DP7308 DP7310 DP7311 DS0025 DS0026 DS0056 DS1603 DS1611 DS1612 DS1613 DS1614 DS1631 DS1632 DS1633 DS1634 DS1647 DS1648 DS1671 DS1674 DS1678 DS1686 DS1687 DS1691 DS1692 DS16149 DS16179 DS26LS31 DS26LS32 DS26LS33 DS26S10 DS26S11 DS55107 DS55108 DS55113 DS55114
385108
X
385105
RAD HARD
X X X X X X X X X X X X X X X X X X X X
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
x x X X X
x X X X X X X X X X
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F X X X X X X X X X X X X X X X X X X X X X
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F F F F
X X X X X X X X X
F F X X X X X X X X X X X X X X X X X
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© Ie MASTER 1983
NATIONAL SEMICONDUCTOR MILITARY/AEROSPACE PRODUCTS (X = Available, F = Future, S = Submitted for Qualification) 0855115 0855121 0855122 0855180 0855182 0855183 0555325 0855450 0855451 0855452 0855453 0855454 0855460 0855461 0855462 0555463 0855464 0855493 0855494 087800 087803 087811 087812 087819 087820A 087830 087831 087832 087833 087834 087835 087836 087837 087838 087839 087856 087858 087880 087889 0878C20 0878C120 0878L 12 0878L8120 088T26A 088T28 IOM2901A IOM2901A-1 IOM2909A IOM2911A IDM29750 IDM29751 IDM29760 IDM29761 IOM29803 IOM29811 IDM29901 IDM29903 IDM29908 IN58048 IN88049 IN880C48 IN88080A IN882C06 IN882L805 LF111 LF151 LF151A LF153 LF155 LF155A LF156 LF156A LF157 LF157A LF198 LFl1201 LFl1202 LFl1331 LFl1332 LFl1333 LFl1508 LHOOO2 LHOOO3 LHOO04 LHOO05 LHOO05A LH0020 LH0021 LH0022 LH0023 LH0024 LH0032 LH0033 LH0036 LH0037 LH0038 LH0041 LH0042 LH0043 LH0044 LH0044A
©
883B
38510B
BB3S
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X X X X X X X X X X X X X X X X X X X X X X
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Ie MASTER 1983
X X X X X X
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RAD HARD
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X X X X X X X X X X X X X X X
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X X X X X X X X X X X X X X X
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883B LM1558 LM1596 LM4250 MF10 MHOO07 MHOO09 MHOO12 MHOO13 MM2114 MM2147 MM2708' MM2716 MM4723 MM4724 MM5290 MM5298 MM54COO MM54C02 MM54C04 MM54C08 MM54C10 MM54C14 MM54C20 MM54C30 MM54C32 MM54C42 MM54C48 MM54C73 MM54C74 MM54C76 MM54C83 MM54C85 MM54C86 MM54C89 MM54C90 MM54C93 MM54C95 MM54C107 MM54C150 MM54C154 MM54C157 MM54C160 MM54C161 MM54C162 MM54C163 MM54C164 MM54C165 MM54C173 MM54C174 MM54C175 MM54C192 MM54C193 MM54C195 MM54C200 MM54C201 MM54C204 MM54C221 MM54C240 MM54C244 MM54C373 MM54C374 MM54C901 MM54C902 MM54C903 MM54C904 MM54C905 MM54C906 MM54C907 MM54C908 MM54C909 MM54C910 MM54C914 MM54C915 MM54C920 MM54C921 MM54C922 MM54C923 MM54C929 MM54C930 MM54C941 MM54C948 MM54C949 MM70C95 MM70C96 MM70C97 MM70C98 MM72C19 MM78C29 MM78C30 N8C800 N8C810 N8C830 NSC831 NS80C48 NS80C49 NMC6504 NMC6514 MM82PC08 MM82PC12
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r----------------------------
nell ~f~~~
RCA MIL-STD-883 Slash-Series CMOS IC's RCA high-reliability slash-series CMOS products include both CD4000-series digital logic types and CDP1800-series microprocessor and memory-system types. The CD4000series parts are provided to three screening levels-/1 S, 13, and 13W-that correspond to MIL-STD-883, Method 5004, Classes Sand 8 requirements. The CDP1800-series parts are supplied to levels 13 and 13W. Equivalent aerospace level screening may be negotiated on a custom basis. RCA also
supplies high--reliability chips. These chips are provided to two screening levels, IS (or IR for LSI types) and 1M. RCA CD4000-series level 11 S packaged devices and IS chips are also available in radiation-hardened versions. These parts are processed to either 105 or 106 rads(Si) and are identified by addition of a " Z" or a "J" suffix letter, respectively, to the device type number (see nomenclature diagram below).
1 x 10" rads(Si)/second
© Ie MASTER 1983
~-------------------------Rcn
SOlid_ State
RCA High-Reliability IC's Emulating and Programmable Integrated Circuit (EPIC) 8-Bit Slice Microcomputer Family (GP Series) Nomenclature Guide G P Type No.
GP001ADL GP201ACL GP301ADL GP302ADL QP501ADL GP504ADL GP505ADL GP507ADL
Description
CMOS 8-bit general-processor unit (CPU) CMOS 1024 X 4 RAM CMOS 4096-bit mask-programmabie static ROM CMOS 4096-bit mask-programmabie static ROM Emulating controller Address select unit Register select unit Interrupt control unit
000
A
No. of Leads
48 18 32
C
Try : L
3
W
z
« U
High-Rei Designator Package Designator
a:
L=Leadless D=DIC
-
32 48 48 48 48
Rad Hard Designator
-
, Product Designator GPfor "General Processor"
Voltage Designator c=s V, 0=10 V Iteration Designator Part Number 1st Digit
2nd, 3rd Digit
o Processor
Specific
2 RAM
Part
3 ROM
Number
4 EPROM SilO, Misc.
RCA MIL-STD-883 Slash-Series Linear IC's The RCA CA3000 slash-series of high-reliability linear integrated circuits includes a broad range of types for use in satellites and other aerospace, military, and critical industrial applications in which maintenance is extremely difficult. These integrated circuits are processed and screened in accordance with MIL-STD-883, Method 5004 format. The RCA CA3000 slash-series types are supplied to three
screening levels (/1, /3, and /3W) that meet the electrical, mechanical, and environmental test methods and procedures established for microelectronics in MIL-STD-883. RCA CA3000-series Ie products listed below are commercial products that can be supplied to standard RCA screening levels or to specialized customer requirements on a custom basis.
CA3000-Series Linear IC's and MOS/FET's Type No. CA101A CA723 CA741 CA747 CA748 CA1558 CA3000 CA3001 CA3002 CA3004 CA3006 CA3015A CA3018A CA3019 CA3020A CA3026 CA3028S CA3039 CA3045 CA3049 CA3058 CA3078 CA3080 CA3081 CA3082 CA3085
Description Operational Amplifiers Voltage Regulators Operational Amplifiers Dual Operational Amplifiers Operational Amplifiers Dual Operational Amplifiers Differential Amplifiers Differential Amplifiers Differential Amplifiers Differential Amplifiers (RF) Differential Amplifiers (RF) Operational Amplifiers Transistor Arrays Diode Arrays Wide-Sand Power Amplifiers Dual Differential Amplifier Arrays Differential Amplifiers (RF) Diode Arrays Transistor Arrays Dual Differential Amplifier Arrays Zero-Voltage Switches Micropower Operational Amplifiers Variable Operational Amplifiers Transistor Arrays Transistor Arrays Voltage Regulators
No. of Leads 8 10 8 10 8 8 10 12 10 12 12 12 12 10 12 12 8 12 14 12 14 8 8 16 16 8
Type No. CA3085A CA3085S CA3094 CA3094A CA3094S CA3100 CA3118 CA3118A CA3130 CA3130A CA3140 CA3140A CA3160 CA3160A CA3260T CA3260AT CA3290
Description Voltage Regulators Voltage Regulators Programmable Power Switch/ Amplifier Programmable Power Switch/ Amplifier Programmable Power Switch/ Amplifier SiMOS Operational Amplifiers Transistor Arrays Transistor Arrays SiMOS Operational Amplifiers SiMOS Operational Amplifiers SiMOS Operational Amplifiers SiMOS Operational Amplifiers SiMOS Operational Amplifiers SiMOS Operational Amplifiers SiMOS Operational Amplifier SiMOS Operational Amplifier SiMOS Dual Voltage Comparators
No. of Leads 8 8 8 8 8 8 12 12 8 8 8 8 8 8 8 8 8
MOS/FET's HR3N187 HR3N200
Dual-Gate MOS Field-Effect Transistor Dual-Gate MOS Field-Effect Transistor
4 4
Note: High-reliability versions of most commercially available CA3000-series linear IC's not listed above can also be supplied on a custom basis.
©
Ie MASTER 1983
409
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE MILITARY PRODUCTS/ PROCESS LEVELS The Signetics MIL 38510/883 Program is organized to provide a broad selection of processing options, structured around the most commonly requested customer flows .. The program is designed to provide our customers: • Fully compliant 883B flows on all products.
en CJ +:: CD
• Standard processing flows to help minimize the need for custom specs.
JAN CASE OUTLINE AND LEAD FINISH PB CB EB JB DB FB RB GC IC VB
C/)
•
The followi;1g explains the different processing options available to you. Special device marking clearly distinguishes the type of screening performed. Refer to Tables 2, 3, 4 and 5.
JAN .QUALIFIED (JS and JB) JAN Qualified product is designed to give you the optimum in quality and reliability. The JAN processing level is offered as the result of the government's product standardization programs, and is monitored by the Defense Electronic Supply Center (DESC), through the use of industry-wide procedures and specifications. JAN Qualified products are manufactured, processed and tested in a government certified facility to Mil-M-38510, and appropriate device slash sheet specifications. Design documentation, lot sampling plans, electrical test data and qualification data for each specific part type has been approved by the Defense Electronic Supply Center (DESC) and products appear on the DESC Qualified Products List (QPL 38510).
10-PIN
8-PIN
14-PIN
16-PIN
18-PIN
20-PIN
24-PIN
-
-
FE
-
-
-
-
-F
-
-
-
-
-
-W
H
-
-
-F
F
--
-
-
~
W
--
-
F
--
--
H
-
'"""':
-
F -
-
--
-
-
All productl lilted are allo available In Ole form.
Table 1 MILITARY PACKAGE AVAILABILITY
Cost savings realized by using standard processing flows in lieu of custom flows.
• Better delivery lead times by minimizing spec negotiation time, plus allow customers to buy product off-the-shelf or in various stages of production rather than waiting for devices started specifically to custom specs.
CERAMIC
8-PIN
--.
r::::: 0)
SIGNETICS MILITARY PACKAGE TYPES METAL CAN
RB
JB
JS
883B
JAN Qualified 54 54LS 54S 82 8T 93XX 96XX Analog Bipolar Memory Microprocessor
X X X
-
X X X X X X X X X X
X X X
-
-X -
X X
-
Table 2 MILITARY SUMMARY
In addition to .the common specs used throughout the industry for processing and testing, JAN Qualified products also possess a requirement for a standard marking used throughout the IC industry. By implementing this space-oriented government standardization program, Signetics complies with the trend of reducing the numerous similar Source Control Drawings (SCD's). This standardized trend results in a single complete and comprehensive specification, single product flow, and a single administrative effort-for both the aerospace community and for Signetics. This effort will also result in a single lower price. Because the list of Signetics' qualified products will change periodically, you may wish to contact your nearest Signetics' Sales Office or refer to the Products Qualified under Military SpeCification from DESC for our current update.
a
Quality conformance inspection testing, per - JAN Class S orders will be quoted with unit MIL-STD-883, Method 5005, is performed price only (similar to present Class B proaccording to Mil-M-38510 as follows: grams). There will be no lot charges for SEM inspection, electrical testing, or Group B or • Group A; each sublot. D qualification. All additional charges are . amortized in the unit price. • Group B; one sublot for each package type every week. Package types currently qualified are: 1) Cerdip-ceramic dual-in-line • Group C; one sublot for each microcircuit 2) Cerpac-ceramic flat pack group every 13 weeks. 3) Metal can packages • Group D; one sublot for each package Government Source Inspection (GSI) is a type every 26 weeks. required portion of the JAN 38510 Class S specification. No alterations to this specifiNOTE: This category of part conforms to cation may be instituted. Therefore, the only Quality Level B-1 (Tro = 3.0) of MILHDBK-2170.
customer source inspection option is at . pre-ship (verification only). Additional program data options (such as wafer lot acceptance, attributes, Group B, D, and others) are available upon request for a . nominal fee.
MIL-STD-883, LEVEL B Processing to this option is ideal when no . JAN slash sheets are released on devices required. Product is' processed to MIL-STD883 Method 5004, and is 100% electrically tested to Signetics data sheets. Generic quality conformance inspection testing, per MIL-STD-883, Method 5005, is performed as follows: • Group A; each sublot. • Group B; one sublot for each package type every week. • Group C; one sublot for each microcircuit group every 52 weeks (JAN data is applicable). • Group D; one sublot for each package type every 52 weeks. NOTE: This category of part conforms to Quality Level B (Tro = 1.0) of MILHDBK-217D. Copies of generic data, as defined above, are available to thos customers who require this data specifically on their purchase orders.
Signetics
410
@
IC MASTER 1983
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE -
PROCESS LEVEL AND MARKETING
PRE-CAP VISUAL
BURNIN
FUNCTIONAL TEST
DC/AC
DC/AC
@25° C
@TEMP
JS/JS JM38510XXXXX RS SXXXX883S
2010, Condo S
Yes
100%
100%
2010, Condo S
Yes
100%
100%
QPL
OFFSHORE
100%
Yes
No
100%
No
Yes
en
()
+-'
Q)
JAN Class S Product Inventory
c
.Ql (J)
Wafer Lot 24 Wafers
~
Wafer Lot Acceptance (Includes S EM and GSI)
# Wafers Required for
Purchase Order
Ship Purchase Order
+Inventory Overbuild The Signetics' JAN Class S inventory program will reduce delivery time and shipment delinquencies. As continuing orders from customers are processed to this specification, inventories will be established for products in the ferm of pre-qualified wafers and finished parts. As the program matures, this will allow immediate delivery of JAN Class S parts.
---I=1
L...-_ _ _
Field Sale,
Wafer Bank: 1 or 2 Wafers (Wafer Lot Accepted)
-
Balance to Finished Goods Inventory
Balance to Support JAN Class "B" Production
1-1.....-___. . • Agency Certification • Wafer Lot Acceptance (GSI) • Baseline Flow • Traceability to Silicon
Jan Class S Product Flow
• Agency Certification • Tightened Lot Control (Ref: Class B) • Wirebond and Die Sheer Monitor • Condition "A" Precap (GSI) • 100% NonDestructive Bond Pull
Extended Burn-In (240 Hours) • Tightened PDA's (Ref: Class B) • Catastrophic Failure Analysis Requirements • GSI
Signetics © Ie MASTER 1983
411
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE
PROCESSING LEVELS DESCRIPTION OF REQUIREMENTS AND SCREENS General Mil-M-38510 1. Pre-Certification A. Product Assurance Program B. Manufacturer's Certification
en o
:;= Q)
MIL-M-38510 AND MIL-STD-883 REQUIREMENTS, METHODS AND TEST CONDITIONS
REQUIREMENT
CLASS S
JAN QUALIFIED (JB)
883B (RB)
The Manufacturer shall establish and implement a Products Assurance Program Plan and provide for a manufacturer survey by the qualifying act ivity, Para. 3.4.1.1
-
X
X
N/A
c::
2. Certification
Received after manufacturer has completed a successful survey, Para. 3.4.1.2
-
X
X
N/A
en
3. Device Qualification
Device qualification shall consist of subjecting the desired device to groups A, B, C & D of method 5005, Para. 3.4.1.2
-
X
X
N/A
4. Traceability
Traceability maintained back to a production lot Para. 3.4.6
-
X
X
X
5. Country of Origin Devices must be fl1anufactured, assembled, and tested within the U.S. or its territories, Para. 3.2.1
-
X
X
N/A
C>
Screening Per Method 5004 of MII-Std-883 6. Internal Visual (Precap)
2010, Condo A or B
100%
XA
XB
XB
7. Stabilization Bake
1008, Condo C Min; (24 Hrs @ 150°C)
100%
X
X
X
8. Temperature. Cycling
1010, condo C; (10 cycles, -65°C to +150°C)
1005
X
X
X
9. Constant Acceleration
2001, Condo E; (30kg in VI Plane)
100%
X
X
X
There is no test method for this screen; it is intended only for the removal of "Catastrophic Failures" defined as "Missing Leads, Broken Packages or Lids Off,"
100%
X
X
X
Condo A or B (5.0 x 10-8 CC/Sec) Condo C Min.
100% 100%
X X
X X
X X
12. Interim Electricals (Pre Burn-In)
Per applicable device specification
100%
X
Optional
Optional
13. Burn-In
1015, Condo as specified (160 hrs. Min at 125°C)
100%
240 hrs.
X
X
14. Final Electricals
Per applicable Device Specification
100%
Slash Sheet
Data Sheet
Sub Group 1
100% Read & Record X
X
X
Sub Group 2
X
X
\X
Sub Group 3
X
X
X
10. Visual Inspection
11. Seal (Hermeticity) A. Fine B. Gross
I
A. Static Tests @25°C B. Static Tests @ +125°C C. Static Tests @-55°C
Table 5 REQUIREMENTS AND SCREENING FLOWS FOR STANDARD PRODUCTS
Signetics 412
@
Ie MASTER 1983
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE
PROCESSING LEVELS DESCRIPTION OF REQUIREMENTS AND SCREENS
D. Dynamic Test @25°C E. Functional Test @25°C F. Switching Test @25°C
MIL-M-38510 AND MIL-STD-883 REQUIREMENTS, METHODS AND TEST CONDITIONS
S
JAN QUALIFIED (JB)
883B (RB)
Sub Group 4 (for Linear Products mainly)
X
X
X
Sub Group 7
X
X
X
Sub Group 9
X
X
X
10% 3% Funct'l
5%
X
X
100%
As Req'd
JM385101
SXXXX883B 883B
REQUIREMENT
CLASS
en
(,.)
+-'
15. Percent Defective Allowable (PDA)
A PDA of 10% is a normal requirement applied against the static tests @25°C (A-1). This is controlled by the slash sheets for JB products. For RB 10% is standard.
16. Marking
Fungus Inhibiting Paint
XXXX Slash
(])
C Ol C/)
Sheet # 17. X-Ray
2012
18. External Visual
2009
100%
N/A
N/A
100%
X
X
X
Quality Conformance Inspection per Method 5005 of MII-Std 883
19. Group A
Electrical Tests-Final Electricals (#14 above) repeated on a sample basis. (Sub Groups 1 thru 12 as specified.)
Each sublot
X
X
X
20. Group B
Package functional and constructional related test I.E. package dimensions, resistance to solvents, internal visual &mechanical, bond strength & solderability.
Every week per pkg. type
Each sublot
X
X
21. Group C
Die related tests I.E. 1,000 hr. operating life, temperature cycling, & constant acceleration.
Every 13 weeks per J-lcircuit group
N/A
X
Generic
22. Group D
Every Package related tests I.E. physcial dimensions, lead fatigue, thermal shock, temperature cycle, 26 weeks moisture resistance, mechanical shock, vibration, per package type variable frequency, constant acceleration & salt atmosphere.
X
X
Generic
Table 5 REQUIREMENTS AND SCREENING FLOWS FOR STANDARD PRODUCTS
(Cont'd)
Signetics © Ie MASTER 1983
413
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE LINEAR DEVICES PACKAGE DEVICE
en
(,)
+oJ
Q)
C
0>
en
DESCRIPTION
DIP
CAN
LF155 LF156 LF198 LH2101A LM101/A LM124 LM158 SE532 SE5512 SE5532A SE5534 SE5534A SE5537 SE5539 J.lA747
OPERATIONAL AMPLIFIERS JFET Op Amp JFET Op Amp Sample and Hold Amp Dual Op Amp Hi Perf Op Amp Quad Op Amp Dual Op Amp Dual Op Amp Dual Op Amp Dual Op Amp Lo Noise Op Amp Lo Noise Op Amp Sample and Hold Amp High Freq Op Amp Dual Op Amp
SE521 SE522 SE527 SE529 LH2111 LM111 LM119 LM139/A LM193/A
COMPARATORS Dual Differential Comparator Dual Differential Comparator Voltage Comparator Voltage Comparator Dual Voltage Comparator Voltage Comparator Dual Voltage Comparator Quad Voltage Comparator Dual Voltage Comparator
F F F F F F F F F
SE592 J.lA733
DIFFERENTIAL AMPLIFIERS Video Amplifier Video Amplifier
F F
H
SE564 SE567
PHASE LOCKED LOOPS Phase Locked Loop Tone Decoder PLL
F F
H H
SE555 SE556-1
TIMERS Timer Dual Timer
F, FE F
H
FE F F F FE FE FE FE FE FE FE F F
H H H H H H H H H H H
PACKAGE DEVICE
DESCRIPTION
DIP
DAC-08 SE5008 SE5009 SE5018 SE5019 SE5118 SE5119
D to A CONVERTERS 8-Bit Mult DAC 8-Bit Mult DAC 8-Bit Mult DAC 8-Bit J.lP-Comp DAC 8-Bit J..LP-Comp DAC 8-Bit J..LP-Comp DAC 8-Bit J..LP-Comp DAC
F F F F F F F
SE5560
SMPS CONTROL CIRCUITS SMPS Controller
F
CAN
H
JAN M-38S10 DEVICE H H H H
SE555 SE555 SE556-1 LH2101A LM101A LM101A LM124
SLASH SHEET 10903BC8 10903BPB 10902BCB 10105BEB 10103BCB 10103BPB 11005BCB
PKG
QUAL STATUS
F FE F F F FE F
QPL 1 QPL1 QPL 1 QPL1 QPL 1 QPL 1 1982
H NOTE F
=
Cerdlp
Signetics 414
© Ie MASTER 1983
OCTOBER 1982
MILITARY DIVISION
MILITARY PRODUCT GUIDE LINEAR INDUSTRY CROSS REFERENCE SIGNETICS
FAIRCHILD pA 111 pA139 pA733 pAF155/156 pAl0l pAl01A MC1556 pA747 MC1555 pA556
LMlll LM139 pA733 LF 55/156 LM10l LM101A MC1556 pA747 SE555 SE556-1
SIGNETICS
MOTOROLA MLMlll MC1733 LF155/56 MLM10l MLM101A MC1747 MC3556 MC1508
LMlll pA733 LF155/156 LM10l LM101A pA747 SE556-1 MC1508-8
SE529 LH2111 LMlll LMl19 LM139 LM193/193A pA733 LF155/156 LH2101A LM10l LM101A LM124 LM158 SE532 pA747 SE567 SE555
LM161 LH2111 LMlll LMl19 LM139 LM193 LM733 LF155/56 LH2101A LM101A LM10l LM124 LM158 LM1581 LM747 LM567 LM555
RAYTHEON
SIGNETICS
NATIONAL
LMlll LM139 RM733 LF155/5~/57
LM101 LM101A LM124 RM1556 RM747 RM555
SIGNETICS LM111 LM139 pA733 LF155/156 LM101 LM101A LM124 MC1556 pA747 SE555
en
.~
+""
Q)
C
.~
en
T.!. LMlll SN52733 LF155/56 SN52101A SN52555 SE556
SIGNETICS LMlll pA733 LF155/156 LM101A SE555 SE556-1
SIGNETICS
PMI
SE5008 & DAC-08
DAC-08
BIPOLAR LSI BASE
PACKAGE
8X371 8X372 8X374 8X376 8X382
I I I I I
Memory (RAM)
8X350
F
Microprocessors
3002 8X305
I I,W
1/0 Interface
Semicustom Circuits 8A 8A 8A 8A 8A 8A
1200 1260 1542 1664 1864 2176
I I I I,G,W I,G,W I,G,W
DESCRIPTION 8-Bit Bidirectional 1/0 Port for 8X300/8X305 8-Bit Bidirectional 1/0 Port for 8X300/8X305 8-Bit 1/0 Port with Parity for 8X305 8-Bit Bidirectional 1/0 Port for 8X300/8X305 4-ln/4-0ut 1/0 Port for 8X300/8X305 256X8 Bit Bipolar RAM for 8X300/8X305 2-Bit Central Processing Element 8-Bit MicrocontroHer ISL ISL ISL ISL ISL ISL
Gate Gate Gate Gate Gate Gate
Array Array Array Array Array Array
Sequencers
3001
I
Microprogram Control Unit
Special Purpose Circuits
8X310 8X360 8X60
I I F
Interrupt Control Coprocessor for 8X305 Memory Address Director for 8X305 FI FO RAM Controller
Development Hardware and Kits
I3X300KT1 EZ-PRO Programmer (1/0 Port)
Development Software
8X300AS1
8X305 Evaluation and Prototyping'Kit Development System for 8X300/8X305 available from American Automation Available from Data 1/0 or American Automation 8X300 Cross-assembler (MCCAP) FORTRAN Source Program
Signetics @
Ie MASTER 1983
415
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE LOGIC~5400 SERIES JAN QUALIFIED
DEVICE
en
(,)
0+-'
Q)
C C)
CI)
DESCRIPTION
5400 5404 5420 5426 5432 5473 5474 5475 5476 5477 5485 5493 5496 54121 54123 54126 54151 54153 54161 54163 54164 54165 54174 54175 54180 54190 54191 54193 54279 54365A 54366A 54367A 54368A 9309 NOTE 1 = QPLI
JM38510 SLASH SHEET
Quad 2-lnput NAND Gate Hex Inverter Dual 4-lnput NAND Gate Quad 2-lnput NAND Gate with o/c Quad 2-lnput OR Gate Dual J-K Master-Slave Flip-Flop Dual 0- Type Edge Triggered Flip-Flop Quad Bistable Latch Dual J-K Master-Slave Flip-Flop Quad Bistable Latch 4-Bit Magnitude Comparator 4-Bit Binary Counter 5-Bit Shift Register Monostable Multivibrator Retriggerable Monostable Multivibrator Quad 3-State Buffer 8-Line to 1-Line Mux Dual 4-Line to 1-Line Mux Synchronous 4-Bit Binary Counter Synchronous 4-Bit Binary Counter 8-Bit Parallel-Out Serial Shift Register Parallel-Load 8-Bit Shift Register Hex D-Type Flip-Flop with Clear Quad 0- Type Edge-Triggered Flip-Flop 8-Bit Odd/Even Parity Checker Synchronous Up/Down Counter (BCD) Synchronous Up/Down Counter (Binary) Synchronous 4-Bit Binary Up/Down Counter Quad S-R Latch Hex Buffer w/Common Enable (3-State) Hex Buffer w/Common Enable (3-State) Hex Buffer, 4-Bit and 2-Bit (3-State) Hex Buffer, 4-Bit and 2-Bit (3-State) Dual 4-1 nput Multiplexer 2
= QPLlI
•
/00104 /00105 /00102 /00805 /16101 /00202 /00205 /01501 /00204
/15001 /01302 /00902 /01201 /01203 /15302 /01406 /01403 /01306 /01304 /00903
DIP 1 1 1 1 1 1
FLATPACK 1 1 1 -
1 1
1
1
1
1 1
1
-
-
1 1
1 1 1 1 1 1 1 1 1 1 1
.
-
/01701 /01702 /01901
1 1 1
1 1 1
1
1 1 1 1 1 1 1
.
-
-
-
-
-
-
/01309
/16301 116302 116303 116304 101404
1
1
-
-
1 1 1 1 1
1
MIL-STD 883
DIP
FLATPACK
F F F F F F F F F F F F F F F
W W W W W W W W W W W W W W W W W W W W W W
F F F F F F F
W W W
F F F F F F F F F -
..
..
= In process
Signetics 416
© Ie MASTER 1983
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE LOGIC-54LS SERIES JAN QUALIFIED
DEVICE 54LSOO 54LS02 54LS04 54LS08 54LS10 54LS14 54LS20 54LS28 54LS32 54LS37 54LS42 54LS73 54LS74 54LS75 54LS83A 54LS85 54LS86 54LS90 54LS93 54LS95 54LS96 54LS107 54LS109 54LS112 54LS113 54LS125 54LS138 54LS139 54LS151 54LS153 54LS154 54LS157 54LS161A 54LS163A 54LS164 54LS173 54LS174 54LS175 54LS181 54LS190 54LS191
DESCRIPTION
JM38510 ,SLASH SHEET
DIP
FLATPACK
130001 130301 130003 131004 130005 131302 130007
1 1 1 1 1 1 1
1 1 1 1 1 1 1
-
-
1 1 1 1 1 1
1 1 1 1 1 1
-
-
1 1 1 1 1 1 1 1 1 1 1 1
.
1 1 1 1 1 1 1 1 1 1 1 1
-
-
1
1
-
-
1 1 1
1 . 1 1
-
-
1 1 1 1 1
1 1
Quad 2-lnput NAND Gate Quad 2-lnput NOR Gate Hex Inverter Quad 2-lnput AND Gate Triple 3-lnput NAND Gate Hex Schmitt Trigger Dual 4-lnput NAND Gate Quad 2-lnput NOR Buffer Quad 2-lnput OR Gate Quad 2-lnput NAND Buffer BCD-to-Decimal Decoder Dual J-K Master-Slave Flip-Flop Dual D-Type Edge-Triggered Flip-Flop Quad Bistable Latch 4-Bit Binary Full Adder 4-BitMagnitude Comparator Gate Quad 2-lnput Exclusive-OR Gate Decade Counter 4-Bit Binary Counter 4-Bit Left-Right Shift Register 5-Bit Shift Register Dual J-K Master-Slave Flip-Flop Dual J-K Positive Edge-Triggered Flip-Flop Dual J-K Negative Edge-Triggered Flip-Flop Dual J-K Negative Edge-Triggered Flip-Flop Quad Bus Buffer Gate w/3-State Outputs 3-to-8 Line DecoderlDemux Dual 2-to-4 Line DecoderlDemux 8-Line to 1-Line Mux Dual 4-Line to 1-Line Mux 4-Line to 16-Line DecoderlDemux Quad 2-lnput Data Selector (non-inv,) Synchronous 4-Bit Binary Counter Synchronous·4-Bit Binary Counter 8-Bit Parallel-Out Serial Shift Register Quad D-Type Flip-Flop (3-State) (8T10) Hex D-Type Flip-Flop with Clear Quad D-Type Edge-Triggered Flip-Flop 4-Bit Arithmetic Logic Unit Synchronous UplDown Counter (BCD) Synchronous UplDown Counter (Binary)
NOTE 1 = Level 1 Qualification LCC = Leadless Chip Carrier JEDEC standard 20-Pin
2 = Level 2 Qualification
130501 130202 130703 130101 130102 131601
131101 130502 131501 131502 130603 130604 130108 130109 130103 130104 132301 130701 130702 130901 130902
-
131504 131512 130605
130106 130107 130801 131513 131509
.
1 1
MIL-STD
883
DIP
LCC
F F F F F F F F F F F F F F F F F F F F F F F F F F F F
G G G G G
.
G
1
-
G -
-
G
-
G G
FLATPACK
W W W W W W W W W W W W W W W W W W W W W W W W W W W W
-
.
G
W
-
-
-
W W W W W W W W W W
F 1 F F
-
F F F F F F F F
-
-
• = In process
Signetics ©
Ie MASTER 1983
417
en
(.)
...... CD C
C')
CI)
MILITARY DIVISION
OCiTOBER 1982
MILITARV.PRODUCT GUIDE LOGIC-54LS SERIES (Cont'd) JAN QUALIFIED
DEVICE
en o +-'
Q)
C
0> U)
54LS192 54LS193 54LS194A 54LS195A 54LS197 54LS221 54LS240 54LS241 54LS242 54LS243 54LS244 54LS251 54LS253 54LS257A 54LS258A 54LS261 54LS266 54LS273 54LS283 54LS290 54LS293 54LS295B 54LS298 54LS363 54LS364 54LS365A 54LS367A 54LS368A 54LS373 54LS374 54LS375 54LS377 54LS378 54LS393 54LS395A 54LS490 54LS670
JM38510 SLASH SHEET
DESCRIPTION Synchronous Decade UplDown Counter Synchronous 4-Bit Binary UplDown Counter 4-Bit Bidirectional Universal Shift Register 4-Bit Parallel-Access Shift Register Presettable Binary Counter/Latch (8291) Dual Monostable Multivibrator Octal I nverter Buffer 3-State Octal Buffer 3-State Quad Inverting TCRS 3-State Quad TCRS 3-State Octal Buffer 3-State Data Selector/Mux with 3-State Outputs Dual 4-Line to 1-Line Data Selector/Mux Quad 2-Line to 1-Line Data Selector/Mux Quad 2-Line to 1-Line Data Selector/Mux 2X4 Parallel Binary Multiplier Quad Exclusive-NOR Gate Octal D Flip-Flop 4-Bit Adder Decade Counter 4-Bit Binary Counter 4-Bit Right-Shift Left-Shift Register Quad 2-:lnput Mux with Storage Octal Latch for MaS Interface (3-State) Octal Flip-Flop for MaS Interface (3-State) Hex Buffer w/Common Enable (3-State) Hex Buffer, 4-Bit and 2-Bit (3-State) Hex Buffer, 4-Bit and 2-Bit (3-State) Octal Transparent Latch (3-State) Octal D Flip-Flop (3-State) Quad Latch Octal D Flip-FlOp Clock Enable Hex.o Flip-Flop with Enable Dual Binary Ripple Counter 4-Bit Cascadeable Shift Register (3-State) Dual Decade Ripple Counter 4X4 Register File (3-State)
NOTE 1 = Level 1 Qualification LCC = Leadless Chip Carrier JEDEC standard 20-Pin
2 = Level 2 Qualification
131507 131508 130601 130602 132002
132401 132402 132801 132802 132403
130906 130907
130303 132501 131202 132003 132004 130606
DIP
FLATPACK
1 1
1 1
·
·
-
·· ···
-
·
·
l' 1
-
1 1
1 1
·
1 1
-
··
-
-
1 1 1
··
-
-
1 1 1 -
-
-
-
-
-
132201 132203 132204 132502 132503 131604
1 1 1 1 1 1 -
1
-
130607 132703 131901
1 1 1
1 1
1
-
-
-
-
1 1
1 1
·
·
MIL-STD 883
DIP
LCC
F F F F F
G G G -
·
F F F F F
· ··
F
F F F F F F F F F F F F F F F F F F ·F F 'F F
G
G
-
G
-
FLATPACK
W W W W W
·
-
W W
-
·
W
··
W W
W W W W W
-
-
W W W
G
-
-
-
-
-
W W W W W W
• = In process
Signetics 418
@
Ie MASTER 1983
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE LOGIC-54S SERIES JAN QUALIFIED
DEVICE 54S00 54S02 54S04 54S08 54S10 54S11 54S20 54S40 54S51 54S74 54S85 54S86 54S112 54S113 54S133 54S135 54S138 54S139 54S140 54S151 54S153 54S157 54S158 54S174 54S181 54S182 54S253 54S273 545258 54S26C 545280 545374
DESCRIPTION
JM38510 SLASH SHEET
DIP
107001 107301 107003 108003 107005 108001
1 1 1 1 1 1
Quad 2-lnput NAND Gate Quad 2-lnput NOR Gate Hex Inverter Quad 2-lnput AND Gate Triple 3-lnput NAND Gate Triple 3-lnput NAND Gate Dual 4-lnput NAND Gate Dual 4-lnput NAND Buffer Dual 2~Wide 2-lnput A01 Gate Dual. D-Type Edge-Triggered Flip-Flop 4-Bit Magnitude Comparator Quad 2-lnput Exclusive-OR Gate Dua, J-K Negative Edge-Triggered Flip-Flop Dual J-K Negative Edge-Triggered Flip-Flop 13-lnput NAND Gate Quad Exclusive-OR/NOR Gate 3-to-8 Line Decoder/Demux Dual 2-to-4 Line Decoder/Demux Dual 4-lnput NAND Line Driver 8-Line to 1-Line Mux Dual 4-Line to 1-Line Mux Quad 2-lnput Data Selector (non-inv.) Quad 2-lnput Data Selector (inv.) Hex D-Type Flip-Flop with Clear 4-Bit Arithmetic Logic Unit Look-Ahead Carry Generator Dual 4-Line to 1-Line Data Selector/Mux Octal D-Type Flip-Flop with Reset Quad 2-Line to 1-Line Data Selector/Mux Dual 5-lnput NOR Gate 9-Bit Odd/Even Parity Generator/Checker Octal D-Type Flip-Flop (3-5tate)
NOTE 1 = Levell Qualification LCC = Leadless Chip Carrier JEDEC standard 20-Pin
2
= Level 2 Qualification
107201 107401 107101 108201 107501 107102 107103 107009
.
1 1 1 1 1 1 2 1 1 1 1 1 1 1 -
FLATPACK 1 1 1 1 1 1 1 1 1 1 1 2 1
-
/07702 /08101 /07901 /07902 /07903 /07904 /07801 -
-
-
-
-
-
-
-
-
-
-
-
-
-
1 1 1 1 1 -
-
MIL-STD 883
DIP
LCC
F F F F F F F F F
G G G G -
F
F F F
F
-
G G -
F F F F
-
F
G
F F F F F
.
F F F F
-
-
-
-
FLATPACK W W W W W W W W W W W W W W W W W W W W W
..
W W -
-
• = In process
Signetics © Ie MASTER 1983
419
en (J ...... Q)
C 0)
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MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE LOGIC-ST INTERFACE SERIES MIL-STD 883 DEVICE 8T05 8T09 8T13 8T16 8T18 8T26A 8T28 8T30 8T38 8T80 8T90 8T97 8T98 8T126 8T127 8T128 8T129
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DESCRIPTION 7-Segment Decoder Display Driver (Active-Hi Outputs) Quad Bus Driver with 3-State Outputs Dual Line Driver Dual Communications EIA/MIL Receiver with Hysteresis Dual 2-lnput NAND (High Voltage to TTL Interface) Quad Bus Driver/Receiver (3-State OutP.uts) Quad Non-Inverting Bus Driver/Receiver (3-State Outputs) Dual TTLlDTL to MOS Transceiver/Port Controller Quad Bus Transceiver (Open Collector) (DM8838) Quad 2-lnput NAND Gate (High Voltage) Hex Inverter (High Voltage) High Speed Hex Buffers/Inverters (74367/DM8097) High Speed Hex Buffers/Inverters (74368/DM8098) Quad 3-State Transceivers Quad 3-State Transceivers Quad 3-State Transceivers Quad 3-State Transceivers
FLAT PACK
DIP
W W W W
F F F F F F F F F F F F F F F F
R
W
W W W R R
W W W W
LOGIC-S2XX SERIES MIL-STD 883 DEVICE 8202 8250 8266 8273 8280 8281
DESCRIPTION Buffer Register Binary-to-Octal Decoder 2-input 4-Bit Digital Multiplexer 10-Bit Serial-In Parallel-Out Shift Register BCD Decade Counter/Storage Element 4-Bit Binary Counter/Storage Element
DIP
FLAT PACK
F F F F F F
W W W W W W
Signetics 420
@
Ie MASTER 1983
OCTOBER 1982
MILITARY DIVISION
MILITARY PRODUCT GUIDE BIPOLAR MEMORY DEVICE
ORGANIZATION PACKAGE·
JAN M-38S10
OUTPUT NUMBER CIRCUIT OF PINS
PROMs
32X8 512X8 32X8 256X4 256X4 512X4 512X4 1024X4 512X8 512X8 1024X8 2048X4 1024X8 1024X8 2048X8
82S23 82S115 82S123 82S126 82S129 82S130 82S131 82S137 82S141 82S147 82S181 82S185 82S2708 82LS2708 82S191
F I F F F F F F,I F,r F F,I I F,I F I
R R W W R R R R R R R,G R R R R,G
OC TS TS
OC TS
OC TS TS TS TS TS TS TS TS TS
16 24 16 16 16 16 16 18 24 20 24 18 24 24 24
+
DEVICE
SLASH SHEET
PKG
QUAL STATUS
82S23 82S123 82S126 82S129 82S130 82S131 82S137 82S141 82S115 82S181 82S185 82S2708 82S 191 82S100
120701 120702 120301 120302 120401 120402 120602 120802 120803 120904 120902 120905 121002
F F F F F F F F F F I, F I
QPLI QPLI QPLI QPLI QPLI QPL.I QPLI QPL I QPL II QPLI QPLI QPL II QPL II Planned
I{Draft)
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Per OPL M38510-38 dated June 1982
FPLF
82S100 82S101 82S102 82S103 82S104 82S105 82S106 82S107 82S150 82S151 82S152 82S153 82S154 82S155 82S156 82S157 82S158 82S159
16X48X8 16X48X8 16X9 16X9 16X48X8 16X48X8 16X48X8 16X48X8 . 18X12 18X12 18X32X10 18X32X10 16X32X12 16X32X12 16X32X12 16X32X12 16X32X12 16X32X12
R,G R R R R R R R R R R R R R R R R R
TS
OC OC TS
OC TS
OC OC OC TS
OC TS
OC TS
OC TS
OC TS
28 28 28 28 28 28 28 28 20 20 20 20 20 20 20 20 20 20
RAMs
54S189 54S301 82S09 82S19 82S16 82S25 82S210 82S212 8X350
16X4 256X1 64X9 64X9 256X1 16X4 256X9 256X9 256X8
F F I I
F F I I r
R R R R R R R R
r
TS
OC OC OC TS
OC TS TS TS
16 16 28 28 16 16 24 22 22
OR = BeD Flat Pack F = Cerdip I = Ceramic Dip G = Leadless 28 PINS W = Ceramic Flat Pack
Signetics © Ie MASTER 1983
421
MILITARY DIVISION
OCTOBER 1982
MILITARY PRODUCT GUIDE BIPOLAR MEMORY CROSS REFERENCE AMD
2700/27L800 27808/27L808
27809/27L809 27510 27811 3101
00. ' (,)
CD s::::: .2>
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FAIRCHILD
93403 93417 93419 93421 93427 93431 . 93436 93441 93446 93448 93453 93457 93467 93451
--
HARRIS
0064 HM7602-2 HM7603-2 HM7608-2 HM7610-2 HM7611-2 HM7620-2 HM7621-2 HM7641-2 HM7643-2 HM7647-2 HM7681-2 HM7685-2 HM76161
SIGNE-TICS
82816 82823 828123 825126 828129 82825
SIGNETICS
82825 828126 82809 82816 828129 828130 828130 ' 828131 828131 828141 828137 828126 828129 828181 825191
INTEL
8282708 82825 82816 828126 825130 828136 828131 828141 828137 828181 825191
3106/A
3601 3602 3605 3622 3624 3625 3628 3636
INTER81L
SIGNETICS
MMI
SIGNETICS
2708' 3101
828126 828129 828130 828131 82523 825123 825141 825137 825181 8252708 82516 82525
5300-1 5301-1 5305-1 5306-1 5330 5331 5341 5353 5381 5385 5531 5560
SIGNETICS NATIONAL
5501 5523A 5533 5600 5603A 5604 5610 5623A 5624 5625 56526
SIGNETICS
MOTOROLA
SIGNETICS
4064 4256 5005
82825 82816 828126
82523 825129 825123 825126 825130 825131 825137 82525 825141 825181 828191
545188 545287 545288 545387 545570 545571 545573 86L99 875296 878181 875191
82825 82816 548301 82823 825126 828130 828123 828129 828131 828141 825137
82525 82823 828123 8282708 828126 828129 828130 828131 828141 828137 828115 828181 828185 828191
SIGNETICS
T.I.
SIGNETICS
82523 548189 825129 828123 548301 828126 828141 828137 828181
545188 548189 548287 548288 548301 545387 545474 545476 548478 NOTE
ParIs are pin for pin functional replacements except where noted .
Signetics 422
@
Ie MASTER 1983
OCTOBER 1982
MILITARY DIVISION
MILITARY PRODUCT GUIDE BIPOLAR MICROPROCESSORS AVAILABILITY DESCRIPTION
PRODUCT
3001 3002
8X300
*
Microprogram Control Unit Central Processing Element (2-bit slice) Interpreter / Microcontroller
DIP
FLAT PACK
I I I
R R
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Under development
(,)
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MICROPROCESSOR SUPPORT CIRCUITS
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AVAILABILITY DESCRIPTION
DIP
FLAT PACK
Retriggerable Monostable Multivibrator 8-Bit Odd / Even Parity Checker 4-Bit Bidirectional Shift Register 4-Bit Parallel-Access Shift Register High Speed Hex .3-State Buffer High Speed Hex 3-State Buffer High Speed Hex 3-State Buffer High Speed Hex 3-State Buffer INTERFACE Quad Bus Driver with 3-State Output Dual Line Driver Quad Bus Driver / Receiver (3-State) Quad Bus Non-Inverting Driver / Receiver (3-State) Programmable 8-Bit I/O Port (3-State), IV Byte Asynchronous Programmable 8-Bit I/O Port (Open Collector) High Speed Hex Buffer (3-State) High Speed Hex Buffer (3-State) High Speed Hex Inverter (3-State) Quad 3-State Transceivers Quad 3-State Transceivers Quad 3-Slate Transceivers Quad 3-State Transceivers
F F I I F F F F
R R
PRODUCT LOGIC 54123 54180 54LS194 54LS195 54LS365 54LS366 54LS367 54LS368
8T09 8T13 8T26A 8T28 8T32 8T35 8T95 8T97 8T98 8T126 8T127 8T128 8T129
*
en
W W W W
F F F F I I
W W W W
F F F F F F F
R R R
W W W W
Under development
Signetics © Ie MASTER 1983
423
STATIC RANDOM ACCESS MEMORIES Military Part Number
. Organization
Access Time Ins I
(TA = ·5.5°C to +125°CI
Maximum Current ImAI Standby Operating
----
Package Type INote 11
Power Supply IVoltsl
Number 01 Pins 18 18 18 18 18 18 18 18 18
C. C. C. C. C. C. C. C. C.
SYM2114A-3 SYM2114A-4 SYM2114A-5 SYM2148H-3 SYM2148H SYM2148H-6 SYM2149H-3 SYM2149H SYM2149H-6
1024 x 4 1024 x 4 1024 x 4 1024 x 4 1024 x 4 1024 x 4 1024 x 4 1024 x 4 1024 x 4
150 200 250 55 70 85 55 70 85
70 70 70 150 150 150 150 150 150
30 30 30
----
+5 +5 +5 ·5 ·5 ·5 ·5 ·5 ·5
SYM2147-3 SYM2147 SYM2147-6
4096 x 1 4096 x 1 4096 x 1
55 70 85
180 180 180
30 30 30
·5 ·5 ·5
18 18 18
C. D. F C. D. F C. D. F
SYM2128-3 SYM2128-4 SYM2129-3 SYM2129-4
2048 2048 2048 2048
x8 x8 x8 x8
150 200 150 200
100 100 100 100
30 30
·5 ·5 ·5 ·5
24 24 24 24
C,D,K C,D, K C, 0, K C, 0, K
16,384 x 1 4096 x 4 4096 x 4
70 70 70
+5 +5 +5
24 24 24
C, 0, K C, 0, K C, 0, K
SYM2167[2j SYM2168[2j SYM2169[2j
--Note 3 Note 3
Note 3 Note 3 Note 3
-
D. D. D. D. D. D. D. D. D.
F F F F F F F F F
READ ONLY MEMORIES (ROMs) Military (TA = ·55°C to +125°CI SYM3316 SYM3316A
2048 x 8 2048 x 8
100 100
150 150
SYM2332 SYM2333
4096 x 8 4096 x 8
450 450
100 100
SYM2364 SYM2364A SYM2365 SYM2365A
8192 8192 8192 8192
x8 x8 x8 x8
450 450 450 450
100 100 100 100
16,384 x 8 16,384 x 8 16,384 x 8 16,384 x 8
450 300 450 300
100 100 100 100
SYM23128 SYM23128-3 SYM23128A SYM23128A·3
-30
---12
-12
10 10
+5 +5
24 24
82S191 82S191
C. 0 C. 0
+5 +5
24 24
TMS2532 2732/A
C. 0 C. 0
+5 +5 +5 +5
24 24 28 28
TMS2564 TMS2564 2764 2764
C,D,K C,D,K C,D,K C, D,K
+5 +5 +5 +5
28 28 28 28
27128 27128 27128 27128
C, 0, C, 0, C, 0, C,D,
K K K K
Notes: 1. C = Ceramic, 0 = Cerdip, F = Flatpack, P= Plastic, K = Leadless Chip Carrier. 2. Advanced Information. 3. Not Available.
Swertek SYNERTEK INC. • A SUBSIDIARY OF HONEYWELL, 3001 STENDER WAY, SANTA CLARA, CA 95054 TELEPHONE (408) 988-5600 • TWX: 910-388-0135
424
©
Ie MASTER 1983
Svnertek. ..
SYM2114A Military 1024 x 4 Static Random Access Memory Extended Temperature Range (-55° C t9 +125° C)
Features •
Totally TTL Compatible: All Inputs, Outputs, and Power Supply
• • •
Common Data I/O 400 mV Noise Immunity High Density 18 Pin Package
150ns Maximum Access Low Operating Power -385 mW Max. • No Clocks or Strobes Required .• Identical Cycle and Access Times • •
•
~
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Single +5V Supply
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Description The SYM2114A is a 4096- Bit static Ra ndom Access Memory organized 1024 words by 4-bits and is fabricated using Synertek's N-channel Silicon-Gate MOS technology. It is designed using fully DC stable (static) circuitry in both the memory array and the decoding and therefore requires no clock or refreshing to operate. Address setup times are not required and the data is read out nondestructively with the same polarity as the input data. Common Input/Output pins are provided to simplify design of the bus oriented systems, and can drive 1 TIL load.
The SYM2114A is designed for memory applications where high performance, low cost, large bit storage, and simple interfacing are important design objectives. It is totally TIL compatible in all respects: inputs, outputs, and the single +5V supply. A separate Chip Select (CS) input allows easy selection of an individual device when outputs are or-tied. The SYM2114A is packaged in an l8-pin DIP for the highest possible density and is fabricated with N-channel, Ion Implanted, Silicon-Gate technology - a technology providing excellent performance characteristics as well as iJ1lproved protection against contamination.
SYM2147 Military 4096 x 1 Static Random Access Memory Extended Temperature Range (-55°C to +125°C) Features • • • •
55 ns Maximum Access No Clocks or Strobes Required Automatic C1: Power Down Identical Cycle and Access Times
•
Single +5V Supply (±10%)
• • • •
Totally TTL Compatible All I nputs and Outputs Separate Data Input and Output High Density l8-Pin Package Three-State Output
Description The Synertek SYM2l47 is a 4096-8it Static Random Access Memory organized 4096 words by l-bit and is fabricated using Synertek's new N-Channel Silicon-Gate HMOS technology. It is designed using fully static circuitry, therefore requiring no clock or refreshing to operate. Address set-up times are not required and the data is read out nondestructively with the same polarity as the input data. Separate data input and output pins provide maximum design flexibility. The three-state output facilitates memory expansion by allowing the outputs to be OR-tied to other devices.
© Ie MASTER 1983
The SYM2l47 offers an automatic power down feature. Power down is controlled by the Chip Enable input. When Chip Enable(CE) goes high, thus de-selecting the SYM2l47, the device will automatically power down and remain in a standby power mode as long as CE remains high. This unique feature provides system level power savings as much as 80%. The SYM2l47 is packaged in an l8-pin DIP for the highest possible density. The device is fully TIL compatible and has a single +5V power supply.
425
Svnertek.
SYM2148H/SYM2149H Military 1024 x 4 StaticRandom Access Memory
IF
Extended Temperature Range (-55° C to +125° C) Features • • • • •
55 ns Maximum Access No Clocks or Strobes Required Automatic CE Power Down (SYM2148H) Fast Chip Select Access Time: 25 ns Max. (SYM2149H) Identical Cycle and Access Times
• Single +5V Supply (±1'0%) • Industry Standard 2114 Pinou.t • Totally TTL Compatible All Inputs and Outputs • Common Data Input and Output • High Density 18-Pin Package • Three-State Output
Description The Synertek SYM2148H/SYM2149H are 4096-Bit Static Random Access MemorTes organized 1024 words by 4 bits and are fabricated using Synertek's new N-Channel Silicon Gate technology. They are designed using fully static circuitry, therefore requiring no clock or refreshing to operate. Address set-up times are not required and the data is read out nondestructively with the same polarity as the input data. Common data input and output pins provide maximum design flexibility. The three-state output facilitates memory expansion by allowing the outputs to be OR-tied to other devices.
The SYM2149H offers a chip select access that is faster than its address access. In a typical application, the address access begins as soon as the address is valid. At this time, t~e high order addresses are decoded and the desired memory is then selected. With the faster chip select access, this decode time will not add to the overall access time thus significantly improving system performance.
The SYM2148H offers an automatic power down feature. Power down is controlled by the Chip Enable input. When Chip Enable (CE) goes high, thus de-selecting the SYM2148H,
The SYM2148H/SYM2149H is packaged in an 18-pin DIP for . the highest possible density. The device is fully TTL compatible and has a single +5V power supply.
the device will automatically power down and remain in a standby power mode as long as CE remains high. This unique feature provides system level power savings as much as 85%.
Block Diagram
Pin Configuration
~----------------~
-GND
As A6 A7
-Vee.
ROW SELECT
MEMORY ARRAY 64 ROWS 64 COLUMNS
As
SYM2148H/SYM2149H A9
A6
Vee
As
A7 As Ag
A4 A3
I/O,
Ao A,
1/0 2
A2
1/ 0 3
CE/CS
GND
110 1
COLUMN 1/0 CIRCUITS
1/0 2 1/0 3 1/0 4
11 0 4 WE
WE -+-----i
426
© Ie MASTER 1983
Svnertek.
SYM2128/SYM2129 Military 2048 x 8 Static Random Access Memory
~
Extended Temperature Range ( -55°C to +125°C) Features • • • • •
150 nsec Maximum Access Time Fully Static Operation: No Clocks or Strobes Required Fast Chip Select Access Time: 60 ns Max. (SYM2129) Automatic CE Power Down (SYM2128) Identical Cycle and Access Times
• Single +5V Supply (±1 0%) • Pin Compatible with 2716 16K EPROM • Totally TTL Compatible: All Inputs and Outputs • Common Data Input and Output • Three-State Output • JEDEC Approved Pinout
Descri ption The Synertek SYM2128/SYM2129 are 16,384 bit static Random Access Memories organized 2048 words by eight bits and are fabricated using Synertek's new scaled n-channel silicon gate technology. They are designed using fully static circuitry, therefore requiring no clock or refreshing to operate. The common data input and three-state. output pins optimize compatibility with systems utilizing a bidirectional data bus. The SYM2128 offers an automatic power down feature under the control of the chip enable (CE) input. When CE goes high, thus deselecting the chip, the device will automatically power down and remain in a standby power mode as long as CE remains high. This featu·re provides significant system level power savings.
Pin Configuration
The SYM2129 offers a chip select access that is faster than its address access. In a typical application, the address access begins as soon as the address is valid. At this time, the high order addresses are decoded and the desired memory is then selected. With the faster chip select access, this decode time will not add to the overall access time thus significantly improving system performance. The SYM2128/SYM2129 are configured in the JEDEC approved pinout for 24 pin byte organized memories and are pin compatible with 16K ROMs, EPROMs and EEPROMs. This offers the user the flexibility of being able to switch between RAM, ROM, EPROM, or EEPROM as his needs dictate with a minimum of board changes.
Block Diagram
SYM2128/SYM2129
A7
Vee
As A5
Aa Ag
AO A3 A5 A6 A7 As
ROW ADDRESS DECODER DRIVER
16.384
BIT ARRAY (128)( 128)
A9
A4
WE
A3
DE
A2
AlO
A1
CS
Ao
I/0a
1/0 1
1/0 7
1/0 2
1/0 6
WE
1/0 3
1/0 5
CS
GND
1/0 4
Al A2
A4 AlO
COLUMN ADDRESS DECODER DRIVER
1/01 1/0 2 1/03
1./0 4 .1/0 5 110 6 1/0 7 I/0s
BE----OII
© Ie MASTER 1983
OUTPUT ENABLE
427
SYM2167
Svnertek.
'j
Military 16,384 x1 Static Random Access Memory
ADVANCED INFORMATION OCTOBER 1982
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.
Extended Temperature Range (-55°C to +125°C)
Features
•
• 70 ns Maximum Access • No Clocks or Strobes Required • Automatic CE Power Down • Identical Cycle and Access Times • Single +5V Supply
• • • •
Available in Ceramic (C), Cerdip (D), Flat Pack (F) and Leadless Chip Carrier (K) Totally TTL Compatible All Inputs and Outputs Separate Data Input and Output High Density 20 Pin Package Three-State Output
Description The Synertek SY2167 is a 16,384-Bit Static Random Access Memory organized 16,384 words by 1-bit and is fabricated using Synertek's new M-Channel Double Polysilicon Gate HMOS technology. It is designed using fully static circuitry, therefore requiring no clock or refreshing to operate. Address set-up times are not required and the data is read out nondestructively with the same polarity 'as the input data. Separate data input and output pins provide maximum design flexibility. The three-state output facilitates memory expansion by allowing the outputs to be OR-tied to other devices.
The SY2167 offers an automatic power down feature. Power .down is controlled by the Chip Enable input. When Chip Enable (CE) goes high, thus de-selecting the SY2167, the device will automatically power down and remain in a standby power mode as long as CE remains high. This unique feature . provides system level power savings as much as 80%. The SY2167 is packaged in a 20-pin DIP for the highest possible density. The device is fully TIL compatible and has a single +5V power supply.
Block Diagram
Pin Configuration
--vee --GND
Vee
AO Al
2
A13
A2
3
A12
A3 A4
4
An
5
AlO
A5
6
Ag
A6
7
As
DO
8
A7
WE
9
DIN
10
CE
GND
MEMORY ARRAY 128 ROWS 128 COLUMNS
Ag
DOUl
WE
428
@
Ie MASTER 1983
SYM2168/SYM2169 Military 4096 x 4 Static Random Access Memory
Advanced Information
Extended Temperature Range (-55°C to +125°C)
October 1982 Features o
70 ns Maximum Access Time
•
o
No Clocks or Strobes Required
o
o
Fast Chip Select Access Time: 50 ns Max. (SY2169) Automatic CE Power Down (SY2168) Identical Cycle and Access Times
• • o
Single +5V Supply (±1 0%) JEDEC Standard Pinout o Totally TIL Compatible All Inputs and Outputs • Common Data Input andOutput • High Density 20-Pin Package o Three-State Output
Available in Ceramic (C), Cerdip (D), Flatpack (F) and Leadless Chip Carrier (K)
Description The Synertek SY2168/SY2169 is a 16,384-Bit Static Random Access Memories organized 4096 words by 4 bits and are fabricated using Synertek's scaled n-channel double poly silicon gate technology. They are designed using fully static circuitry, therefore requiring no clock or refreshing to operate. Address set-up times are not required and the data is read out non-destructively with the same polarity as the input data. Common data input and output pins provide maximum design flexibility. The three-state output facilitates memory expansion by allowing the outputs to be OR-tied to other devices. The SY2168 offers an automatic power down feature. Power down is controlled by the Chip Enable input. When Chip Enable (CE) goes high, thus de-selecting the SY2168, the device will automatically power down and remain in a standby power mode as long as CE remains high. This unique feature provides system level power savings as much as 85%.
The SY2169 offers a chip select access that is faster than its address access. In a typical application, the address access begins as soon as the address is valid. At this time, the high order addresses are decoded and the desired memory is then selected. With the faster chip select access, this decode time will not add to the overall access time thus significantly improving system performance. Both parts are packaged in a 20-pin DIP for the highest possible density. Both devices are fully TIL compatible and have a single +5V power supply.
Block Diagram - - Vee
- - GNO
AS
Pin Configuration
ROW SELECT
MEMORY ARRAY 64 ROWS 64 COLUMNS
Ag
AlO
SYM2168/SYM2169
A7
Vcc
A6 As
As Ag
A4
A,o
A3
Al1 I/O,
Ao A, A2 CE/CS
GND
COLUMN 1/0 CIRCUITS
1/02 1/03 1/04
CE/~ ----~-""
WE WE
©
Ie MASTER 1983
429
Svnertek.
SYM2316B 2048 x 8 Static Read Only Memory
Pj
Features • • • • •
Access Time 200/300/450 ns (max) 2048 x 8 Bit Organization Single +5 Volt Supply Totally Static Operation JEDEC Approved Pinout
• • • • •
Completely TTL Compatible Three-State Outputs for Wire-OR Expansion Three Programmable Chip Selects Pin Compatible with 2116 EPROM Replacement for Two 2708s
Description The SY2316B high performance Read Only Memories are organized 2048 words by8 bits with access times from 200 to 450 ns. The ROMs are designed to be compatible with all microprocessor and similar applications where high performance. large bit storage ansi simple interfacing are important design considerations. This device offers TTL input and output levals with a minimum of 0.4 Volt noise immunity in conjunction with a +5 Volt power supply.
The SY2316B operates totally asynchronously. No clock input is required. The three programmable Chip Select inputs allow eight 16K ROMs to be OR-tied without external decoding. The device offers three-state output buffers for memory expansion. Designed to replace the 2716 EPROM. the SY2316B can eliminate the need to redesign printed circuit boards for volume mask programmed ROMs after prototyping with EPROMs.
SYM2332/SYM2333 Military 4096 x 8 Static Random Access Memory Extended Temperature Range (-55°C to +125°C) Features • • • • • •
SYM2333-273 EPROM Pin Compatible 4092 x 8 Bit Organizations Single +5 Volt Supply (±1 0%) Access Time - 450 ns (max.) Totally Static Operation Completely TTL Compatible
• • • •
SYM2332-2532 EPROM Pin Compatible Three-State Outputs for Wire-OR Expansion Two Programmable Chip Selects EPROMS Accepted as Program Data Inputs
Description The SYM2332 and. SYM2333 high performance read only memories are organized 4096 words by 8 bits with access times of less than 450 ns. They are designed to be compatible with all microprocessor and similar applications where high performance. large bit storage and simple interfacing are important design considerations. These devices offer TTL input and output levels with a minimum of 0.4 Volt noise immunity in conjunction with a +5 Volt power supply.
430
The SYM2332 and SYM2333 operate totally asynchronously. No clock input is required. The two programmable Chip Select inputs allow four 32K ROMs to be OR-tied without external decoding. Both devices offer three-state output buffers for memory expansion. Designed to replace 32K EPROMs. the SYM2332 and SYM2333 can eliminate the need to redesign printed circuit boards for volume mask programmed ROMs after prototyping with EPROMs.
©
Ie MASTER 1983
Svnertek. w-:
SYM2364/SYM2364A Military 8192 x 8 Static Random Access Memory Extended Temperature Range (-55°C to +125°C)
Features • • • • • •
2564 EPROM Pin Compatible 8192 x 8 Bit Organization Single +5 Volt Supply Access Time - 450 ns (max) Totally Static Operation Completely TTL Compatible
• 24 Pin JEDEC Approved Pinout • SYM2364A - Automatic Power Down (CE) • SYM2364 _ Non Power Down Version - Programmable Chip Select • Three State Outputs for Wire-OR Expansion" • EPROMs Accepted as Program Data Input
Description The SYM2364 and SYM2364A high performance Read Only Memories are organized 8192 words by 8 bits with an access time of 450. ns. The ROMs are designed to be compatible with all microprocessor and similar applications where high performance, large bit storage and simple interfacing are important design considerations. Both ROMs conform to the JEDEC approved pinout for 24 pin 64'K ROMs. The SYM2364 offers the simplest operation (no power down:) Its programmable chip select allows two 64K ROMs to be OR-tied without external decoding.
The SYM2364A offers an automatic power down feature. Power down is controlled by the Chip Enable (CE) inpu,t. When CE goes high, the device will automatically power down and remain in 'a low power standby mode as long as CE remains high. This unique feature provides system level power savings as much as 90%. ' Both the SYM2364 and SYM2364A are pin compatible with the 2564 EPROM thus eliminating' the need to redesign printed circuit boards for volume mask programmed ROMs after prototyping with EPROMs.
SYM2365/SYM2365A Military 8192 x 8 Static Random Access Memory Extended Temperature Range (-55°C to +125°C) Features • • • • • • •
2764 EPROM Pin Compatible 8192 x 8 Bit Organization Single +5 Volt Supply Access Time - 450 ns (max) Totally Static Operation Completely,TTL Compatible 28 PinJEDEC Approved Pinout
• SYM2365A - Automatic Power Down (CE) - Output Enable Function (OE) - Two Programmable Chip Selects • SYM2365 - Non. Power Down Version - Four Programmable Chip Selects' • Three State Outputs for Wire-OR Expansion • EPROMs Accepted as Program Data Input
Description The SYM2365 and SYM2365A high performance Read Only Memories are organized 8192 words by 8 bits with an access time of 450 ns. The ROMs are designed to be compatible with all microprocessor and similar applications where high performance, large bit storage and simple interfacing are important design considerations. Both ROMs conform to the JEDEC approved pinout for 28 pin 64K ROMs. The SYM2365 offers the simplest operation (no power down.) Its four programmable chip selects allow up to sixteen 64K ROMs to be OR-tied without external decoding. The SYM2365A offers an automatic power down feature. Power down is controlled by the Chip Enable (CE) input.
© Ie MASTER 1983
When CE goes high, the device will automatically power down and remain in a low power standby mode as long as CE remains high. This unique feature provides 'system level power savings as much as 90%. An additional feature of the SYM2365A is the Output Enable (OE) function. This eliminates bus contention in multiple bus microprocessor . systems. The two programmable chip selects allow up to four 64K ROMs to be OR-tied without external, decoding, Both the SYM2365 and SYM2365A are pin compatible with the 2764 EPROM thus eliminating the need to redesign printed circuit boards for volume mask programmed ROMs' after prototyping with EPROMs.
431
Synertek.
SYM3316/SYM3316A 2048 x 8 High Speed Read Only Memory Extended Temperature Range (-55°C to +125°C)
Features ~
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• Access Time - lOOns (max.) • Single +5 Volt Supply (± 10%) • Contact Programming • Four Week Prototype Turnaround • Completely TIL Compatible • Totally Static Operation
• •
SYM 3316A - AutomCJtic Power Down (GE) Pin Compatible with 16K Bipolar PROMs Replaces 3636 or 825191 • Three-State Outputs for Wire-OR Expansion • Three Programmable Chip Selects (two on SYM 3316A) • 16K Bipolar PROMs Accepted as Program Data Inputs
Description The SYM 3316 and SYM3316A are high speed 16,384 bit static mask programmable Read Only Memories organized 2048 words by 8 bits. Designed to be pin compatible with 16K bipolar PROMs, they eliminate the need to redesign printed circuit boards for volume production after prototyping with PROMs.
power savings of as much as 80%. The two programmable chip selects (CS) allow as many as four ROMs to be OR-tied without external decoding. The SYM3316 offers somewhat simpler operation than the SYM3316A. It's three programmable chip selects allow up to eight ROMs to be OR-tied without external decoding.
The SYM3316A offers an automatic power down feature. Power down is controlled by the Chip Enable (CE) input. When CE goes high, the device will automatically power down and remain in a standby power mode as long as CE remains high. This unique feature provides system level
Both devices are fabricated using Synertek's scaled high performance N-channel MOS technology. This, combined with innovative design techniques, provides the high performance and "ease-of-use features associated with static memories.
Pin Configurqtions
Block Diagram
SYM3316
Vee
GND
!
r
SYM3316A
A7
Vee
A7
Vee
AI
As
AI
As
As
A,
As
A,
A4
A10
A4
A10
, A3
CS1
A3
CE
As
Az
CSz
Az
CS1
A7
A1
CS3
A1
CSz
As
Ao
De
Ao
De
A,
01
07
01
07
Oz
O.
Oz
06
03
Os
03
05
GND
04
GND
04
A3
A.c As 16,384 BIT ROM CELL ARRAY
Ao
432
A1
Az
A10
CS1 CSz CS3
@
CE
Ie MASTER 1983
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TEXAS INSTRUMENTS MILITARY PRODUCTS
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Texas Instruments Military program offers high reliability integrated circuits covering a complete product spectrum. The program is designed to meet and support Military processing requirements. Processing to JM-38510 (JANB) and MIL-Standard-883 Class B assures the user of quality products and reliable performance.
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C1009JM TDC1010JM MPY-8HJM MPY-12HJM MPY-16HJM MPY-24HJM HD15530 828101 828100 PAL10H8 PAL12H6 PAL14H4 PAL16H2 PAL16C1 PAL10L8 PAL12L6 PAL14L4 PAL16L2 28001 28002 28001A 28002A 8086
AMax85°C • Max 100°C • • Faster access time
®Flat pack only #DIPonly
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
436
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TEXAS INSTRUMENTS MILITARY PRODUCTS ADVANCED LOW POWER SCHOTTKY TTL
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54ALSOOA
Quadruple 2-lnput NAND Gates
54ALS02
Quadruple 2-lnput NOR Gates
54ALS03A
Quadruple 2-lnput NAND Gates with OIC Output
54ALS04
HEX Inverter
54ALS05
HEX Inverter With OIC Output
54ALS08
Quadruple 2-lnput And Gate
54ALS09
Quadruple 2-lnput And Gate With OIC Output
54ALS10
Triple 3-lnput NAND Gates
54ALS11
Triple 3-lnput AND Gates
54ALS12
Triple 3-lnput NAND Gates with OIC Output
54ALS15
Triple 3-lnput AND Gates With OIC Output
54ALS20A
Dual 4-lnput NAND Gates
54ALS21
Dual 4-lnput AND Gates
54ALS22A
Dual4-lnput NAND Gates With OIC Output
54ALS27
Triple 3-lnput NOR Gates
54ALS28
Triple 3-lnput NOR Buffers
54ALS30
8-lnput NAND Gates
54ALS32 54ALS33 ·54ALS37 54ALS38 54ALS74 54ALS109 54ALS112A 54ALS114A 54ALS240 54ALS241 54ALS244 54ALS245 54ALS573 54ALS574 54ALS576 54ALS580 54ALS874·
Quadruple 2-lnput OR Gates Quadruple 2-lnput NOR Buffers With O/C Output Quadruple 2-lnput NAND Buffers Quadruple 2-lnput NAND Buffers with O/C Output Dual D-Type Flip-Flop With PRESET And CLEAR Dual J-K Flip-Flop (Positive Edge Triggered) Dual J-K Flip-Flop (Negative Edge Triggered) Dual J-K Flip-Flop Octal Buffers/Line Drivers/Line Receivers Octal Buffers/Line Drivers/Line Receivers Octal Buffers/Line Drivers/Line Receivers Octal Bus Tranceivers Octal D-Type Transparent Latches Octal D-Type Edge-Triggered Flip-Flops .Octal D-Type Flip-Flop With Inverted Outputs Octal D-Type Latches With Inverted Outputs Dual 4-Bit D-Type Flip-Flop
LOGIC PRODUCT SPECTRUM CROSS REFERENCE AND NOMENCLATURE LOGIC PRODUCT SPECTRUM* TTL FAMILY
EXAMPLE:
CHIP CARRIER
DUAL-IN-L1NE (J)
FLAT-PACK (W)
54
X
X
54H
X
X
54L
X
X
54LS
X
X
X
X
54S
X
X
X
X
(FH)
(FK) )
LOGIC NOMENCLATURE SNJ· 54LSOO
1. PREFIX---'----T ..... Must contain three or four letters SNJ-MIL-STD-883B. JEDEC Standard 101 JANB-JM 38510/JANB Qualified* 2. CIRCUIT DESIGNATOR - - - - - - - - - ' Must contain four to nine digits
54ALS
X
X
X
54-Standard TTL Circuits
54AS
X
X
X
54H-High Speed TTL
*SNJ Processing Level
54L-Low-Power TTL 54L5-Low-Power Schottky TTL
LOGIC CROSS REFERENCE GUIDE MANUFACTURER TI Motorola
PREFIX
DUAL-IN-L1NE
FLAT PACK
SNJ XXXX
J
W
54XXBXBJC
L
F
545-Schottky TTL 54AL5-Advanced Low-power Schottky TTL 54A5-Advanced Schottky TTL
National
OM XXXX
J 883B
W883B
Signetics
S XXXX
F883B
W883B
Fairchild
XXXX
DMOB
FMQB
SNXXXX
DMB
FMB
AMD
FH
TEXAS
3.PACKAGETYPE------~--------------------------~
Must contain one or two letters J, W, FH, FK *Where devices are qualified under military specification MIL-M-38510
INSTRUMENTS
INCORPORATED
POST OFFICE BOX 225012- DALLAS. TEXAS 75265
© Ie MASTER 1983
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256 x 4
JBP18S030MJ JBP18SA030MJ JBP24S10MJ JBP24SA10MJ
NATIONAL DM54S288J DM54S188J DM54S287J DM54S387J
256 x 8
JBP28L22MJ
DM54S471J
512 x 8
JBP28S42MJ
DM54S472J
S82S147F
512 x 8
JBP28S46MJ
DM54S474J
S825141F
1024 x 4
JBP24S41MJ
DM54S573J
1024 x 8
JBP28S86MJ
2048 x 4
JBP24S81MJ
32 x 8
SIGNETICS S82S123F S82S23F S82S129F S82S126F
INTEL M3621 M3601
MMI 5331-1J 5330-1J 5301-1J 5300-1J
HARRIS HM7603-8 HM7602-8 HM7611-8 HM7610-8
INTERSIL IM5610MJ IM5600MJ IM5623MJ IM5603MJ
AMD 27S19DMB 27S18DMB 27S21DMB 27S20DMB
FAIRCHILD
RAYTHEON
93427DMQB 93417DMQB
29661DMB 29660DMB
5309-1J
MOTOROLA
en ......
29601DMB
C
5349-1J
HM7649-8
M3624
5341-1J
HM7641-8
S82S137F
M3625
5353-1J
DM77S181J
S82S181F
M3628
5381-1J
DM77S185J
S82S185F
27S29DMB IM5625MJ
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29621DMB
E
27531DMB
93448DMQB
29625DMB
MCM7641
HM7643-8
27S33DMB
93453DMQB
29641DMB
MCM7643
HM7681-8
27S181DMB
93451DMQB
29631DMB
MCM7681
HM7685-8
27S185DMB
29651DMB
MCM7685
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JBP28S156MJ
DM77S191J
S82S191F
HM76161-8
M3636
27S191DMB
93511DMQB
~
29681DMB
..
Note: This IS a functional cross-reference National, Signetics and MMI use "8838" suffix to indicate military processing to MIL-STD-8838.
BIPOLAR MEMORY NOMENCLATURE JBP
PREFIX
T
These two digits comprise the series designation 23 S 86M J
L
PACKAGE TYPE J . FH/FKlFE
JBP-MI L-STD-883B JEDEC Standard 101 JANB-JM 38510/JANB Qualified, Note 1
GENERIC PROGRAMMING FAMILY - - - - - " 1-Single Level 3--0xide Isolated 2-Double Level 4-Other
TEMPERATURE RANGE No Designator E M
OUTPUT WORD WIDTH-------------J 4 OR 8 OUTPUTTYPE----------------' = Standard Three-State = Low-Power Three-State = Power-Down Three-State BIT COMPLEXITY = Registered Three-State 03 = 256 Bits D = Power-Down and Registered Three-State 1 = 1,024 Bits T = Latched Three-State 2 = 2,048 Bits SA = Standard Open-Collector 4 =. 4,096 Bits LA = Low-Power Open-Collector 8 = 8,192 Bits PA = Power-Down Open-Collector 16 = 16,384 Bits RA = Registered Open-Collector 32 =' 32, 768 Bits DA = Power-Down and Registered Open-Collector TA = Latched Open-Collector S L P R
= Ceramic Dual-in-Line = Ceramic Chip Carrier
L..----PACKAGE SIZE* Row Spacing Inches (Millimeters) No. of 0.300 0.400 Pins (7,62) (10,16) 16 0 18 1 20 2 22 3 4 24 5 28 40
O°C to 70°C - 40°C to 85°C - 55°C to 125°C
0.600 (15,24)
6 7 8
:j:Package-size deSignation is not applicable with chip carrier (PH,FK,or FE), and should be . replaced with the letter X for this package type.
Note 1: Where devices are qualified under Military specification MIL-M-38510
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
©
Ie MASTER 1983
441
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TEXAS INSTRUMENTS MILITARY PRODUCTS MOS MEMORY PRODUCTS SELECTION GUIDE AND NOMENCLATURE RAMS
..J 1
MAX. ACCESS TIME. (ns)
M,S,E,L M,S,E,L
1
200,250,450 200,250,450
4164 1 S,E,L 4416tt M,S,E,L
1
DEVICE 2114 4016
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1
1
TEMP.
ORGANIZATION SRAM 1
1K 2K DRAM 150 ,200,250 I 64K 16K 150,200,250 1
1
PACKAGE TYPE CHIP CARRIER C-DIP
xx 48
1
18 Pin ~~~~ 18 Pad ~rw 24 Pin JD 32 Pad FE
x1 x 4
1
16 Pin ~JD~ 28/18 Pad tE/FGl 18 Pin JD 28/18 Pad FE/FG
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TEMP. M,S,E,L M,S,E,L M,S,E,L M,S,E,L M,S,E,L M,S,E,L
DEVICE 2516 2532 25L32 2564 2708 27L08
EPROMS· MAX. ACCESS ORGANITIME (ns) ZATION 2K x 8 350,450 4K x 8 350,450 4K x 8 450 8K x 8 450 . 350,450 1K x 8 1K x 8 350,450
PACKAGE TYPE C-DIP CHIP CARRIER 24 Pin 32 Pad FE 24 Pin Jl 32 Pad FE 24 Pin J 32 Pad FE 28 Pin !JD) 32 Pad FE 24 Pin Jl 32 Pad FE 24 Pin J 32 Pad FE
t
tS temperature range only ttFuture product
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SMJ XXXX-XXJX MKB XXXX MXXXXB MCM XXXX BXBA
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MM XXXX XXl883 XXXX DMB XXXX DMQB
TI MOSTEK INTEL MOTOROLA
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NATIONAL AMD FAIRCHILD
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MOS MEMORY NOMENCLATURE
~ 1 E.XApMREPFLIEX: ____________________T_SM_J__-----'J2564 Must contain three letters SMJ-MIL STD-883B, JEDEC Standard 101
- 45
2. CIRCUIT DESIGNATOR Must contain four or five characters All standard types have four digits All low-power versions have five characters Examples: Standard 32K EPROM-2532 Low-power 32K EPROM-25L32
lJD
TL..----------4.
TEMPERATURE RANGE Must contain one letter only M--55 to 125°C· E--40 to 85°C S-- 55 to 100°C L- 0 to 70°C I
' - - - - - - - - - 5. PACKAGE TYPE Must contain one or two letters J, JD, FE, FG
3. ACCESS TIMt---------------------~ Device types are available with various speeds MEMORY MODULE
The high speed, 256K-bit, Dynamic Random Access Memory module is fabricated using state-of-the-art SMOS N-channel technology for very high performance combined with low cost and improved reliability. This new technology permits operation from asingle + 5 volt power supply which reduces system power supply and decoupling requirements making board layout easier. EXAMPLE: 1. PREFIX Must contain three letters SMJ-M Il:STD-883
The module features four 64K DRAMs in Leadless Ceramic Chip Carriers mounted on top of a standard 600-mil, 28 pin dual-in-line substrate package.
MEMORY MODULE NOMENCLATURE 4 -15 4164 SMJ 4
T
I
S
TL.._____ 4. TEMPERATURE RANGE Must contain one letter only S--55 to 100°C E--40 to 85°C L- Oto 70°C
2. WORD WIDTH--------------~ Must contain one digit only 1,2,4,8
L..-_ _ _ _ _ _
3. DEVICES PER UNIT-.- - - - - - - - - - - - - - - - ' Must contain one digit only 2,4,8
5. ACCESS TIME Device types are available with various speeds
L . . - - - - - - - - - - - 6 . CIRCUIT DESIGNATOR Must contain at least four digits
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
442
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Ie MASTER 1983
TEXAS INSTRUMENTS MILITARY PRODUCTS
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MEMORY MODEL DIMENSIONAL OUTLINE
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SBP 9989 MICROPROCESSOR
PRODUCT FEATURES
• 4.4-MHz clock rate, single phase, 50% duty cycle • Designed-in support for advanced multiprocessor system architecture • 16 bit data and address bus • Serial 110 via Communications Register Unit (CRU) • 16 prioritized hardware interrupts/16 software interrupts • 9900 Family instruction set including signed multiply (MPY) and signed divide (DIV). • Direct access to 128K bytes of memory (via new output in MPEN) • Operation over full MIL-TEMP range (- 55°C to 125°C) • Radiation tolerance characteristics of 12L Technology
9989 MICROPROCESSOR NOMENCLATURE EXAMPLE: SBP 9989 T 1. P R E F I X - - - - - - - - -...... Must contain three or four letters SBP-Military Designator JAN B-JM38510/JANB Qualifiedt
N
2. CIRCUIT DESIGNATOR - - - - - - - - - - - ' Must contain four digits 9989-advanced 4.4MHz 16 bit processor 3. TEMPERATURE R A N G E - - - - - - - - - - - - - - I Must contain one letter only N- - 55°C to 125°C 4. PACKAGE TYPE - - - - - - - - - - - - - - - - - - ' Must contain two letters-J, FK tFuture product
PACKAGES AVAILABLE PACKAGE TYPE J. JG JD W.WC U FH FK ' FE FG
DESCRIPTION Ceramic Dip Side Braze Ceramic Dip Ceramic Flat-Pack Ceramic Flat-Pack Single Layer Square Chip Carrier (JEDEC Pin Out) Three Layer Square Chip Carrier (JEDEC Pin Out) Three Layer Rectangular Chip Carrier (28- and 32-Pad) Three Layer Rectangular Chip Carrier (18- and 20-Pad)
PACKAGE TYPE J JG JD W WC U FH FK FE FG
DIGITAL
LINEAR INTERFACE
BIPOLAR MEMORY
MOS MEMORY
X
X X
X
X
X
X X X X X
X
X X
X X X
X X
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
443
INTRODUCTION TODIGITAL The Master Selection Guide provides sufficient information for making initial product selections. All devices that appear in this section, both in ·the initial selection guide and the data pages, are included in all other indexes. The first two pages of the digital section present performance comparisons of the major digital families. These are followed by lists of the devices in each family arranged into functional groups (arithmetic, buffers/ inverters, etc.). The initial selection lists are followed by the device data pages provided by the manufacturers. Page number references to these data pages are given with the initial selection listings. Some digital circuits-calculator, watch chips, and electronic organ circuits~not included in this section are covered in detail in the Linear-Consumer section. Digital circuits not included in one of the major logic families are listed in the heading Digital-Other Devices.
Page Number Index-Digital Devices
Arithmetic Functions Buffers
Inverters
CMOS 449 450 450
Counters Binary Decade Miscellaneous Decoders
Drivers Flip-Flops D-Type
J-K Gates AND NAND AND-OR AND-OR-Invert OR
This section is not complicated by reference to paCkage styles; the package style suffixes are usually deleted. For more information on each companies' suffixes, see the Part Number Guide. Throughout the Master Selection Guide, each full military temperature range (-55°C to 125°C) device is indicated by a dagger (t) before the manufacturer's name. Manufacturers' names are normally spelled out; however, a few are abbreviated and the abbreviations are explained on page 772.
NOR
467 469 470 470 467 469
472 472
467 467
472 472
478 480 482 482 484
455 456
467 469 470 471 467 469
472 472
485 487
456 457 457 457 458 458
467
472 472
470 469 471 471 469 469 470 471 470 470 471 470 468 470 470 471 468 470 469 470 469 471
472 472 472
488 489 492 492 493 493 494 494 495 495 496 497 500
459 459 459 460 461 462 462 462
Exclusive OR/NOR Latches Memories Multiplexers (Digital) Multivibrators Oscillators/Dividers Shift Registers
470 470
467 468 468 468
473 473 473 473 473
469 470 470 471
473
469 470 470 469 470 470 471
473 473
Transceivers, Bus
463 464
Translators Q)
Miscellaneous
'U ::J (!)
TTL 474 476 '477
451 452 453 453 454
OR/NOR Miscellaneous
ECl ECl ECl ECl HNll/ 10K 95K 100K III HTl 467 470 472 467 470 472 467 472
Digital-Special
501 503 505 505 510
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Detailed Product Information provided by:
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Advanced Micro Devices American Microsystems, Inc. Fairchild Harris Semiconductor LSI Computer Mitel Semiconductor Monolithic Memories, Inc. Motorola Semiconductor National Semiconductor
RCA Semi-Process Signetics TRW-LSI Products Texas Instruments Weitek
601 618 619 669 696
697 715 729 734
739 761 773 812 821 1036
The manufacturers listed above have provided detailed information on their latest and most significant products.
444
© Ie MASTER 1983
••
EINFUHRUNG DIGITALSCHALTUNGEN Der Master Selection Guide fur Digitalschaltungen enthalt aIle Informationen, die Sie fur die Erstauswahl Ihres Produkts benotigen. Die Bauteile, die in diesem Abschnitt erscheinen, sowohl im Selection Guide als auch auf den Datenblattern, sind in allen Master Indexes enthalten. Die ersten beiden Seiten des Digital-Teils beinhalten Leistungs-vergleiche der wichtigsten Digitalfamilien. Daran anschlie,Bend find en Sie ein Verzeichnis der Bauteile jeder Familie nach Funktionen (arithmetische Funktionen, Buffers/Inverters usw.). Diesen Listen folgen die Datenblatter der Hersteller. Der Master Selection· Guide verweist jeweils auf das entsprechende Datenblatt. Einige Digital-Schaltungen (Rechner, Uhren-Chips und elektronische Orgel-Schaltungen), die in diesem Teil nicht enthalten sind, werden ausfuhrlich im
Abschnitt Linear-Consumer behandelt. Digital-Schaltungen, die nicht in einer der grof3eren Logik-Familien enthalten sind, finden sich unter der Rubrik "Digital-Sonstige Bauteile" (Digital - Other Devices). Dieser Abschnitt wird nicht durch Hinweise auf Gehauseformen Kompliziert. Die entsprechenden Suffix wurden meistens weggelassen. Weitere Information uber die Suffixe jedes Herstellers erhalten Sie uber das Numerische Typenverzeichnis. 1m ganzen Master Selection Guide sind aIle Bauteile mit mil itarischem Temperaturebereich (-55° bis 125°C) durch ein Kreuz (t) vor dem Namen des Herstellers gekennzeichnet. Die N amen der Hersteller sind normalerweise ausgerschrieben; einige jedoch sind abgekurst. Die Abkurzungen werden auf S. 772 erklart.
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INTRODUCTION AUSYSTEME DIGITAL ,
'
Le Guide General de Selection fournit suffisamment de renseignements pour permettre des selections initiales de produits. Tous, les appareils enumeres' dans cette Section, a la fois dans Ie Premier Guide de Selection et Ie feuilles de donnees, apparaissent egalement dans tous les autres index. Les deux premieres pages de lei Section "Digital" pres en tent des comparaisons de performance entre les principaiesfamilles de systeme digital. Suivent ensuite des listes d' appareils de chaque famille, classes par groupes fonctionnels (arithmetique, registres, invertisseurs, etc.). Leslistes de premiere selection sont suivies par des feuilles de donnees parappareil, fournies .par Ies fabricants. Les references de numeros de pages de ces donnees sont communiquees dans les listes de premiere selection. Quelques circuits digitaux - calculatrices, circuits de montre, et circuits electroniques primaires - no si-
gnales dans cette Section, sont etudies en detail dansla Section "Lineaire". Les circuits digitaux non inclus dans l'une des familles princiaples de Legique, sont enum:eres dans la rub rique "Autres Systemes Digitaux" (Digital-Other Devices). Cette Section ne fait pas apparaltre les types de boitier. Les suffixes indiquant les types de boitier sont generalement omis. Pour obtenir des renseignements supplementaires sur les suffixes utilses par chaque societe, veuillez vous reporter au Guide des Numeros de Pieces. Dans, tout Ie Guide General de Selection chaque appareil possedant la variante complete de temperature imposee par I'Armee (-55°C 125°C) est indique par Ie symbole (t) inscrit devant Ie nom du fabric ant. Les noms des fabricants sont generalement ecrits en entier, il arrive cependant que certains soient abreges. Voir page 772 pour obtenir Ia signification de ces abreviations.
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© Ie MASTER 1'983
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INTRODUCCION A DIGITAL
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La Guia Maestra de Selecci6n provee suficiente informaci6n para hacer selecciones iniciales de producto. Todas las componentes que aparecen en esta secci6n, ya sea en la guia de selecci6n inicial 0 en las paginas de datos, estan incluidas en todos los otros indices.
integrados de relojes, y circuitos de organos electricos - no inclufdas en esta seccion son detalladas en la seccion de Consumidor-Lineal. Los circuitos digitales no incluidos entre las familias logicas mayores aparecen bajo el titulo Digital-Otras Componentes.
Las primeras dos paginas de la secci6n digital preseTlta comparaci6n de funcionamiento entre las familias digitales mayores. Estas estan sequidas por listas de las componentes correspondiente a cada familia y organizadas en grupos funcionales (aritmetico, separadores, invertidores, etc). Las listas de seleccion inicial estan sequidas por las paginas de datos, de las componentes proveidas por los fabricantes. Referencias del numero de la pagina a estaspaginas de datos estan dadas con las listas 'de seleccion incial. Algunos circuitos. digitales - calculadoras, circuitos
Esta seccion no es complicada por referencias al estilo constructivo; los sufijos que denotan estilo constructivo han sido generalmente omitidos. Para informacion adicional sobre sufijos de lascompailias, refierase a la Guia de Numero de Pieza. A 10 largo de la Guia de Selecci6n Maestra, cada intervalo completo de temperatura para uso militar (-55 0 a 125°C) de la componente aparece indicada por el signo fabricantes no son .generalmente deletreados; sin embargo, algunos aparecen abreviados y las abreviaturas son explicadas en la pagina 772.
Ie MASTER 1983
447
-:;' A
~ -~ l/j' ~
3
;/
jj 1
rtl.t'&:iJJV')~Jb~:jRVO:t7t?tV')f:{tt
~M~~~~~o*~Vj'~3;/~V')~l/j'~3;/jj1r~~ ~V')c7)~~~6~-~~~.~h~~6~~~tl~V')~~V')1;/
~ ~ j"A~ ~ A~ ~~1 ~o ~1~~h~l/~~3;/V').WV')2~~~~tl~~~~1~~
7 ~ I) - V')11:~gltl3(iJ\V') ~ ~\.A ~~ ?XV') ~~ ~i6~ Gtl--tV') 7 7 ~I) -i6\~Mg~ Jv- 7°W~?tm~:h ~~ ~ -t- ( 17IJ~tr7 I) A
Jv 7
0
j71 ~j', ~'~77/1;/~'-~···~~5J:5~)o --tV')?X~ (7)~~~6V')tl%}-ti-V')~~~~-~~~o
~V')~-~~
~ ~·~-::::>vt6~tl~V!7'~3 ;/jj1 r~V')~~~6~-~'~~< ~~"'F~~o j] JV::f-:;L
v - ~-
m,
V')~j'.~3;/~ii~ ~ V') tH*&tl
~~Jffi l~"'F~~o -:;' A~ - ~ v j' ~
3
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( - 55°C --- - 1 25°C) V') ~J1 ''i §til VL-::::>vt~~b~~o
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j-j]-l5tljffi*,AAat$1~tll~~~-ttlvo
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448
© Ie MASTER 1983
MASTER SELECTION GUIDE DIGITAL-CMOS Function
Source
Device
Line Function
Arithmetic Functions
Device
HD14581B MC14581BA MC14581BC CD40181B CD40181BE CD4057A HCC40181B HCF40181B 883/4581B SCL4581B
Adder, NBCD (natural binary coded decimal) MC145S0BA t Motorola MC14560BC Motorola Toshiba TC4560B
Adder. Triple Serial. Negative Logic, with Internal Carry HD14038B Hitachi MC14038BA t Motorola MC14038BC Motorola CD4038A (748) t RCA (748) CD4038AE RCA Look·Ahead Carry Block CD4038B (748) t RCA F4582BC CD4038BE RCA (748) 10 F4582BM HCC4038B tSGS HD14582B HCF4038B SGS MC14582BA CM4038A t SOlitron MC14582BC CM4038AE Solitron CD40182B TC4038B Toshiba CD40182BE Adder, Triple Serial, Positive Logic, with Internal Carry HCC40182 HD14032B Hitachi HCF40182 MC14032BA t Motorola 883/4582B MC14032BC Motorola SCL4582B MSM4032 OKI Magnitude Comparator 4-Bit CD4032A (748) 20 t RCA 54HC85 CD4032AE RCA (748) 74HC85 (748) CD4032B t RCA F40085BC (748) CD4032BE RCA F40085BM HCC4032B tSGS HD14585B HCF4032B SGS MC14585BA CM4032A t Solitron MC14585BC CM4032AE SOlitron MC54HC85 TC4032B Toshiba MC74HC85 Adder, 4-Bit, Full 54HC283 74HC283 F4008BC F4008BM HD14008B MC14008BA MC14008BC CD4008BC CD4008BM MM54C83 MM74C83 CD4008A CD4008AE CD4008B CD4008BE HCC4008B HCF4008B 883/4008B SCL4008B CM4008A CM4008AE TC4008B
t Fllrchlld Fllrchlld Fairchild t Fairchild Hitachi t Motorola Motorola National t National t National National t RCA RCA t RCA RCA tSGS SGS tSSS SSS t Solitron Solitron Toshiba
(667) (667) 30
74HC688
Data Path Switch F4704BC F4704BM
Fairchild t Fairchild
Equality Comparator, 8·Bit CD54HC688 CD74HC688
t RCA RCA
(739) (739)
Full Adder. Gated SP74HC80
SPI
(767)
Fairchild t Fairchild
t Military Temperature Range (- 55° to 125°C)
~
IC MASTER
1983
MM54C85 MM74C85 CD4063B CD4063BE CD4585B CD4585BE CD54HC85 CD74HC85 HCC4063B HCF4063B 883/4585B SCL4585B TC4063B TC4585B
(748) 40 (748) (748) Magnitude Comparator 8·Bit (748) 54HC688
Data Access Register (for memory address arithmetic) F4707BC Fairchild F4707BM t Fairchild
Logic Register Stack F4705BC F4705BM
Source
Line Function
Hitachi t Motorola Motorola t RCA RCA t RCA tSGS SGS tsss SSS Fairchild t Fairchild Hitachi t Motorola Motorola t RCA RCA tSGS SGS tSSS
t Fllrchlld Fllrchlld
Parity Generator/Checker. 9-Bit Odd/Even 54HC280 t Falrcblld 74HC280 Fllrcblld MC54HC280 t Motorola MC74HC280 Motorola 50 MM54HC280 t National National MM74HC280 CD54HC280 t RCA' CD74HC280 RCA SP74HC280 SPI Serial Multiplier, 8·Bit CD54HC384 CD74HC384
t RCA RCA
Nines Complementer MC14561BA MC14561BC TC4561B
t Motorola Motorola Toshiba
2's Complement Multiplier (16x16). Allows unsigned magnitude inputs as well (NMOS) WTL 1016 Weitek
2x2-Bit, Parallel Multiplier, Binary MC14554BA MC14554BC
(749) (749)
Source
Line
t Motorola Motorola
8x8 Bit Multiplier ADSP·l080K ADSP·l080T 8x8 Bit Multiplier/Accumulator . ADSP·l008K ADSP·l008T 70 16x16 Bit Multiplier ADSP·l016K . ADSP·l016T 16x16 Bit Multiplier/Accumulator ADSP·l0l0K ADSP·l0l0T
(749) (749)
AD tAD
(3185) (3185)
AD- (3183.3186) tAD (3183.3186) AD tAD
(3184,3186) (3184.3186)
AD tAD
(3182.3186) 130 (3182.3186)
Buffers Quad Gated, Three·State (inverted control) SP74HC126 SPI 80
SSS t Fllrcblld Fllrcblld Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t National National t RCA RCA t RCA RCA t RCA RCA tSGS SGS tSSS SSS Toshiba Toshiba
Device
2's Complement Multiplier (1Sx1S) with Accumulator SO (allows unsigned magnitude inputs as well)-NMOS WTL 1010 Weitek
Logic Unit 4-Bit
(667) (667)
Quad Gated, Three-State SP74HC125
SPI
Quad Low Impedance 883/4441UB SCL4441UB
tsss SSS
Quad True/Complement F4041BC F4041BM CD4041C CD4041M 90 CD4041A CD4041AE (748) CD4041UB (748) CD4041UBE (749) HCC4041UB (749) HCF4041UB (739) 883/4041UB (739) SCL4041UB CM4041A CM4041AE 100 Quad Three-State Non-Inverting TC5024 TC5025 Quad Three-State 54HC125 74HC125
(667) (667) (667) (667)
110 (739) (739) (771) (739) (739)
Fairchild t Fairchild National National t RCA RCA t RCA RCA tSGS SGS tSSS sss t Solitron Solitron
(748) 140 (748) (748) (748)
Q)
"0 150
:::J
CJ C
t
Fllrchll~
Fllrchlld
o
..... ()
(667) (667)
Q)
t National National
Hex High Voltage TC5064B TC5065B
Toshiba Toshiba
Hex (Inverting) Three·State 54HC366 54HC368 74HC366 120 74HC368
(768)
Toshiba Toshiba
Hex CMOS Compatible DS1630 DS3630
Hex (Inverting) Three-State, Strobed HD14502B MC14502BA MC14502BC CD4502B CD4502BE HCC4502B HCF4502B 883/4502B SCL4502B
(768)
Hitachi t Motorola Motorola t RCA RCA tSGS SGS tsss sss t Fllrcblld t Fllrchlld Fllrchlld Fllrchlld
Q)
en
160 (749) (749)
(667) (667). (667) (667) 170
• Typical Value Bold flcllndlclles Iddlllonil dill Is provided aD Ibl pigi Dolld.
449
Ie MASTER -DIGITAL-CMOS (Cont'd) Function
Device
Source
Line Function
Buffers (Cont'd)
Device
Source
Line Function
Hex Non-Inverting-Improved
'.' Q)
"0 ::l
CJ C
0 +oJ
() Q)
Q)
en '-
Q)
+oJ
en
CO ~
Hex (Inverting)-Improved 54HC4049 74HC4049 F4049BC F4049BM HD14049B MC14049UBA MC14049UBC CD4049UB MM54HC4049 MM74HC4049 CD4049A CD4049AE CD4049UB CD4049UBE CD54HC4049 CD54HC4099 CD74HC4049 HCC4049UB HCF4049UB 883/4049UB SCL4049UB' CM4049A CM4049AE TC4049B Hex Non-Inverting HD14010B CD4010A CD4010A CD4010AE 'CD4010B CD4010BE 883/4010B SCL4010B CM4010A CM4010AE TC4010B Hex Non-Inverting-Improved 54HC4050 74HC4050 F4050BC F4050BM HD14050B MC14050BA MC14050BC CD4050BC CD4050BM C04050A CD4050AE CD4050B CD4050BE CD54HC4050 CD74HC4050 HCC4050B HCF4050B 883/4050B SCL4050B CM4050A
Hitachi National t National t RCA RCA t RCA RCA tsss SSS t Salitron Salitron Tashiba
t Fairchild Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola National t National National t RCA RCA t RCA RCA t RCA RCA RCA tSGS SGS tSSS
(748) (748) (748) (748)
t National National
Hex Open Drain Active Pull Up MM54C907 MM74C907
t National National
Hex, TTL Input 54HCT07 74itCT07
20
70 Octal Buffer/Line Driver MM54C941 MM74C941 Octal
Hex TTL Inverting (CMOS to TTL) MM54C901 MM74C901
t Fairchild
(667) (667)
Fairchild t National National
(748) (748) (748) (748)
Hex Three-State, Inverting MM54HC366 MM54HC368 MM74HC366 MM74HC368 54HC365 54HC367 74HC365 74HC367 F40097BC F40097BM HD14503B MC14503BA MC14503BC MC54HC367 MC74HC367 CD4503BC CD4503BM MM54HC365 MM54HC367 MM70C95 MM70C97 MM74HC365 MM74HC367 MM80C95 MM80C97 CD4503BD CD4503BE CD54HC365 CD54HC366 CD54HC367 CD54HC368 CD74HC365 CD74HC366 CD74HC367 CD74HC368 TC40H367 TC5012B
t National t National National National
t Filrcblld t Falrcblld Fairchild Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t National t National t National t National National National National National t RCA RCA t RCA t RCA .t RCA t RCA RCA RCA RCA RCA Toshiba Toshiba
t Falrcblld (667) FaIrchild (667) Fairchild 50 t Fairchild Hitachi t Motorola Motorola National National (748) t RCA RCA (748) (748) t RCA RCA (748) 60 (740) t RCA Hex 54HC07 t RCA (740) 74HC07 tSGS MM54HC4050 SGS MM74HC4050 tsss SSS Octal Buffer/Level Translator, Inverting MM54HC4305 {Salitron -(Continued) MM74HC4305
MD54SC540 MD54SC541 MD74SC540 MD74SC541 HS74C540 HS74C541 M54C540 M54C541 S74C540 S74C541
7-Line High Voltage TC5066B TC5067B 80
100
t MIIII t MIIII MIIII MIIII Supertex Supertex t Supertex t Supertex Supertex Supertex
(702) (702) (702) (702)
140
Toshiba Toshiba
Hex Schmitt Trigger 54HC14 74HC14 Hex, TTL Input 54HCT04 74HCT04
150 (748) (748) (748) (748)
160
t Falrclllld Fairchild
(667) (667)
t Fairchild
(667) (667)
Falrcblld
Hex Unbuffered MC54HCU04 MC74HCU04
t Motorola Motorola
Hex Three-State (749) (749) 110 (740) (740) (740) Hex (740) (740) (740) (740) (740) 120 (667) (667)
Fairchild Falrcblld National National National National
(740) (740) (740) (740) 130
t National National
Dual Complementary Pair Plus Inverter F4007UBC Fairchild F4007UBM t Fairchild HD14007B Hitachi MC14007UBA t Motorola MC14007UBC Motorola CD4oo7C National CD4oo7M t National CD4007A t RCA (667) CD4007AE RCA 1(667) CD4007UB t RCA (667) 90 CD4007UBE RCA (667) HCC4oo7UB tSGS HCF4007UB SGS 883/4007UB tSss SCL4oo7UB SSS CM4007A t Solltron CM4007AE Solitron TC4007UB Toshiba
Hex Three-State 30
Line
Inverters
Hex TTL Non-Inverting (CMOS to TTL) MM54C902 t National MM74C902 National
Hitachi National (740,748) t RCA (740,748) 40 RCA (740,748). t RCA (740,748) RCA tSSS t Salitron Salitron Tashiba
Hex Open Drain Active Pull Down MM54C906 MM74C906
Hex PMOS Non-Inverting (PMOS to CMOS or TTL) MM54C904 t National MM74C904 National
(667) (667)
t Salitron Solitron Toshiba
SSS
Solitron Toshiba
10 Hex PMOS Inverting (PMOS to CMOS or TTL) MM54C903 t National MM74C903 National
SSS
t Military Temperature Range (- 55° to 125°C)
450
CM4050AE TC4050B
Source
Octal Buffer/Line Driver, Three State CD54HC540 t RCA CD54HC541 t RCA CD74HC540 RCA CD74HC541 RCA
(Cont'd) Hex (Inverting) HD14009B CD4009AC CD4009AM CD4009A CD4009AE CD4009U8 CD4009U8E 883/4009UB SCL4009UB CM4009A CM4009AE TC4009UB
Device
F40098BC F40098BM MM70C96 MM70C98 MM80C96 MM80C98
Fairchild
t Fairchild
F4069UBC F4069UBM HD14069B MC14069UBA MC14069UBC MC54HC04 MC74HC04 CD4069C CD4069M MM54C04 MM54HC04 MM74C04 MM74HC04 MM74PC04
~
170
t National t National National National Fairchild
t Fairchild Hitachi t Motorola Motorola t Motorola 180 Motorola National t National t National t National National National National (Continued)
• Typical Value Bold faci IndIcates addlllonal data II provl~ld on thl paal notld.
~
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-CMOS (Cont'd) Function
Source
Device
Line Function
Inverters (Cont'd) t RCA RCA t RCA RCA Sanyo SPI tSGS SGS tsss tSSS sss SSS t Solitron Solitron Toshiba Toshiba Toshiba
(Cont'd) (748) (748) (740) (740)
C054HC161 C074HC161 SP7.4HC161 HCC40161B HCF40161B 883/4161B SCL4161B TC40161B TCHOH161
(766)
10
Counters, J3inary Clock Generator with 4-Blt TC5018
Toshiba
Divide by 2, 8 or 16 MMS4C93 MM74C93
t National National
Divider with 4-Bit TC5027B
Toshiba
20
Presettable Up/Down 54HC193 54HC4516 54HC569 74HC193 74HC4516 74HC569 F40193BC F40193BM F4516BC F4516BM HD14516B MC14516BA MC14516BC MCS4HC193 MC74HC193 CD40193BC CD40193BM CD4516BC CD4516BM MM54C193 MMS4HC193 MM74C193 MM74HC193 C040193B C040193BE C04516B C045168E C054HC191 C054HC193 C074HC191 C074HC193 SP74HC193 HCC4516B HCF4516B 883/4193B 883/4516B SCL4193B SCL4516B TC40H193 TC4516B
Presettable Fully Synchronous, Synchronous Clear 54HC163 t Fairchild (668) Falrcblld (668) 74HC163 F40163BC Fairchild F40163BM t Fairchild HD14163B Hitachi MC14163BA t Motorola MC14163BC Motorola MCS4HC163 t Motorola MC74HCl63 Motorola 30 CD40163BC National CD40163BM t National MMS4C163 t National MMS4HCl63 t National MM74C163 National National MM74HC163 (749) C0401638 t RCA C0401638E RCA (749) (739) C054HC163 t RCA C074HC163 RCA (739) 40 (770) SP74HC163 SPI HCC40163 tSGS HCF40163 SGS . Presettable 8-Bit Down . 883/4163B tsss C0401038 SCL4163B sss C0401038E , TC40163B Toshiba HCC40103B r TC40H163 Toshiba HCF40103B Presettable Synchronous, Asynchronous Clear Programmable Divide-by-N, 4-Bit F40161BC Fairchild F4526BC F40161BM t Fairchild F4526BM HD14161B Hitachi 50 HD14526B MC14161BA t Motorola MC14526BA MC14161BC Motorola MC14526BC MCS4HC161 t Motorola CD4526BC MC74HC161 Motorola CD4526BM CD40161BC National 883/4526B CD40161BM t National SCL4526B MMS4C161 t National MMS4HC161 t National Dual Synchronous MM74C161 National F4520BC MM74HC161 National 60 F4520BM (749) C0401618 HD14520B t RCA C040161BE RCA (749) MC14520BA (Continued) t Military Temperature Range (- 55° to 125°C)
~
IC MASTER
1983
Source
Line Function
Presettable Synchronous, Asynchronous Clear
Hex C04069UB C04069UBE C054HC04 C074HC04 LC4069UB SP74HC04 HCC4069UB HCF4069UB 883/4069UB 883/4449UB SCL4069UB SCL4449UB CM4069A CM4069AE TC4069UB TC40HOO4 TC7404UB
Device
t RCA RCA SPI tSGS SGS tsss SSS Toshiba Toshiba t Fairchild
Line
(Cont'd) MC14520BC CD4520BC CD4520BM C04520B C04520BE HCC4520B HCF4520B 883/4520B SCL4520B CM4520B CM4520BE TC4520B
Motorola National t National t RCA RCA tSGS SGS tSSS SSS t Solitron Solitron Toshiba
Dual4-Bit
54HC393 74HC393 MMS4HC393 MM74HC393
t Fairchild Fairchild t National National
(668) (668)
Dual,4-Bit
C054HC393 C074HC393
t RCA RCA
(739) (739)
C054HC4520 C074HC4520
t RCA RCA
(739) (739)
4-Bit, Divide by 2 and by 5 SP74HC93
SPI
(768)
5,6,7,8,9-Stage TC5048
Toshiba
70
(668)
(665,668) t Fairchild (668) Fairchild (668) Falrcblld (668) Fairchild (668) Fairchild t Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National National t National t National t National National National (749) t RCA RCA (749) (749) t RCA (749) RCA (739) t RCA (739) t RCA RCA (739) RCA (739) SPI (770) tSGS SGS tsss tsss SSS sss Toshiba Toshiba
RCA tSGS SGS
Source
Dual Synchronous (Cont'd) (739) (739) (770)
t Falrcblld
t RCA
Device
80 Dual
7-Stage
90
100
8-Stage Synchronous 883/4404B 110 SCL4404B
(749) (749)
Fairchild t Fairchild Hitachi t Motorola Motorola National t National tsss sss
F4024BC F4024BM HDl4024B MC14024BA MC14024BC MCS4HC4024 MC74HC4024 CD4024BC CD4024BM C04024A C04024AE C04024B C04024BE C054HC4024 C074HC4024 HCC4024B HCF4024B 883/4024B SCL4024B CM4024A CM4024AE TC4024B
120
Fairchild t Fairchild Hitachi t Motorola (Continued)
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t RCA RCA t RCA RCA t RCA RCA tSGS SGS tsss SSS . t Solitron Solitron Toshiba
130 (749) (749)
140
(748) (748) (748) (748) (739) (739) Q)
"'C 170
::l
CJ C
0
..... ()
tSSS sss
Q) Q)
12 Stage
MMS4HC4040 MM74HC4040
t National National
12-Stage
54HC4040 74HC4040 F4040BM F404BC HD14040B MC14040BA MC14040BC MCS4HC4040 MC74HC4040 CD4040BC CD4040BM C04040A C04040AE C040408 C04040BE C054HC4040 C074HC4040 HCC4040B
(668) t Falrcblld Fairchild (668) t Fairchild Fairchild 180 Hitachi t Motorola Motorola Motorola Motorola National t National (748) t RCA (748) RCA (748) 190 t RCA RCA (748) (739) t RCA (739) RCA tSGS (Continued)
C/)
t
• Typical Value Bold .ace Indlcales addlllonal dala Is provided on Ibe pagl nDlld.
451
:10-
Q) ..... en
CCS
~
Ie MASTER DIGITAL-CMOS (Cont'd) Function
Device
Line Function
Source
Counters, Binary (Cont'd) (Cont'd)
12-Stage HC.F4040B . 883/4040B SCL4040B CM4040A CM4040AE TC4040B 14 Stage
MM54HC4020 MM54HC4060 MM74HC4020 MM74HC4060
14, 15, 16-Stage (with reset) TC5036
14-Stage with Oscillator MC14060B MC54HC4060 MC74HC4060 CD4060BC CD4060BM C04060A C04060AE C04060B C04060BE C054HC4060 C074HC4060 HCC4060B HCF4060B SCL4060B
Motorola t Motorola Motorola National t National t RCA RCA t RCA RCA t RCA RCA tSGS SGS SSS
~
"0 ::J
(9 C
0 +-'
()
Q) Q)
U) :I.-
Q) +-'
en
CO
~
Toshiba t Fairchild Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t RCA RCA t RCA RCA t RCA RCA tSGS SGS tsss SSS t Solitron Solitron Toshiba
~
Q)
t National t National National National
54HC40Z0 74HC40Z0 F4020BC F4020BM HD14020B MC14020BA MC14020BC MC54HC4020 MC74HC4020 CD4020BC CD4020BM C040Z0A C040Z0AE C040Z0B C04020BE C054HC4020 C074HC4020 HCC4020B HCF4020B 883/4020B SCL4020B CM4020A CM4020AE TC4020B
14-Stage
I i
SGS tsss SSS t Solitron Solitron Toshiba
(668) (668)
Device
Counter/LatchlDisplay Driver ICM7208 40 Divide by 2 and by 5 8P74HC90
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t RCA RCA t RCA RCA t RCA RCA tSGS SGS tsss
..
452
Device
Source
Presettable (Sets to 0 or 9, divides by 2, 5 or 10) MM74C90 National
80
SSS
8PI
MM54HC160 MM74C160 MM74HC160 C040160B C040160BE C054HC160 C074HC160 8P74HC160 HCC40160B HCF40160B 883/4160B SCL4160B TC40160B TC40H160
t National National National t RCA RCA t RCA RCA 8PI tSGS SGS tsss SSS Toshiba Toshiba
74HC192 F40192BC F40192BM F4510BC F4510BM HD14510B HCTR0200 MC14510BA MC14510BC MC54HC192 MC74HC192 CD40192BC CD40192BM CD4510BC CD4510BM MM54C192 MM54HC192 MM74C192 MM74HC192 C040192B C040192BE C04510B C04510BE C054HC192 C074HC192 8P74HC192 HCC40192B HCC4510B HCF40192B HCF4510B 883/4192B 883/4510B SCL4192B SCL4510B TC40H192 TC4510B
t Fllrchlld Fairchild Fairchild t Fairchild Fairchild t Fairchild Hitachi Hughes t Motorola Motorola t Motorola Motorola National t National National . t National t National t National National National t RCA RCA 1 t RCA RCA t RCA RCA 8PI tSGS tSGS SGS SGS tSSs tsss SSS SSS Toshiba Toshiba
(748) (748) (748) (748) 90 (739) Presettable Up/Down (739) 54HC192
Intersil
Line
Presettable (sets to 0 or 9, divides by 2, 5 or 10) MM54C90 t National
t Solitron Solitron Toshiba
Presettable Fully Synchronous, Synchronous Clear 54HC162 t Falrcblld Fairchild 74HC162 F40162BC Fairchild F40162BM t Fairchild HD14162B Hitachi MC14162BA t Motorola MC14162BC Motorola MC54HC162 t Motorola Counters, Decade Motorola MC74HC162 National CD40162BC Counter/Divider with 10 Decoded Outputs CD40162BM t National 54HC4017 t Fairchild (668) 50 MM54C162 t National 74HC4017 Fairchild (668) MM54HC162 t National MM54HC4017 t National MM74C162 National MM74HC4017 National MM74HC162 National Counter/Divider, 7 Segment Display Output and Display C04016ZB t RCA Enable C040Z6A (748) t RCA C040162BE RCA C04026AE RCA (748) C054HC162 t RCA . C04026B (748) t RCA C074HC162 RCA C04026BE (748) RCA 8P74HC162 8PI HCC4026B fSGS HCC40162B tSGS HCF4026B SGS HCF40162B SGS 883/4026AB 60 tsss 883/4162B tsss 883/4426AB tsss SCL4162B SSS SCL4026AB SSS TC40162B Toshiba SCL4426AB SSS (Continued) TC40H162 Toshiba t MIlitary Temperature Range (- 55 0 to 125 0 C)
Line Function
Counter/Divider, 7 Segment Display Output and Ripple Presettable Synchronous, Asynchronous Clear Blanking C04033A (748) t RCA 54HC160 t Fllrchlld C04033AE RCA (748) 74HC160 Fllrcblld C04033B (748) t RCA F40160BC Fairchild (748) C04033BE RCA F40160BM t Fairchild HCC4033B 70 tSGS HD14160 Hitachi HCF4033B SGS MC14160BA t Motorola 883/4033AB tsss MC14160BC Motorola 10 883/4433AB tsss MC54HC160 t Motorola SCL4033AB SSS MC74HC160 Motorola SCL4433AB SSS CD40160BC National CM4033A t Solitron CD40160BM t National CM4033AE Solitron MM54C160 t National
Counter/Divider, 10 Line Output F4017BC F4017BM HD14017B MC14017BA MC14017BC 20 MC54HC4017 MC74HC4017 CD4017BC (748) CD4017BM (748) C04017A (748) C04017AE (748) C04017B (739) C04017BE (739) C054HC4017 C074HC4017 30 HCC4017B HCF4017B 883/4017B SCL4017B CM4017A CM4017AE TC4017B
(748) (748) (748) (748) (739) (739)
Source
Counter/Divider, 7 Segment Display Output and Display Enable (Cont'd) CM4026A t Solitron CM4026AE Solitron
100 (768) (668) (668)
110
(749) (749) (739) (739) 120 (770)
Presettable, with Decoder/Driver TC5034
(668) 130 (668)
140
(749) (749) (739) (739) (769) 150
(668) (668)
160
170
(749) (749) (749) (749) (739) 180 (739) (770)
190
Toshiba
• TYPical Value Bald flCI Indlcatls additional dati Is proVldld an thl plgl notld.
~
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-CMOS (Cont'd) Function
Device
line Function
Source
'Counters, Decade (Cont'd) Presettable 2-Decade Down, BCD CD40102B CD40102BE HCC40102B HCF40102B
t RCA RCA tSGS SGS
Device
4- 112-Diglt, Programmable TC9122 (749) (749)
Source
line Function
Toshiba
4-Diglt, Multiplexed Output, Left Digit Counts to 2(Maximum count 1999.) MM74C928 National
Device
Source
Line
Phase Comparator and Programmable HD14568B Hitachi MC14568BA t Motorola Motorola MC14568BC
110
Presettable Divlde-by-N F4018BC Fairchild F4018BM t Fairchild Programmable Divlde-by-N, 4-Bit HD14018B Hitachi 60 Fairchild F4522BC MC14018BA t Motorola 4-Diglt Up/Down, Counter/Latch/Decoder Driver, LCD t Fairchild F4522BM MC14018BC Motorola IIltlolIl (735) MM74C945 Hitachi HD14522B CD4018BC National (735) MM74C947 IIltlolll MC14522BA t Motorola CD4018BM t National 4-Diglt Up/Down Counter/Latch/Display Driver Motorola MC14522BC (748) CD4018A t RCA ICM7217 Intersll 10 National CD4522BC (748) CD4018AE RCA ICM7217A Intersil CD4522BM t National (748) CD4018B t RCA ICM7217B Intersil 883/4522B (748) tsss CD4018BE RCA ICM7217C Intersil SCL452'2B SSS HCC4018B tSGS Intersi! ICM7227 HCF4018B SGS Up/Down Counter/Decoder/LatchlDriver (direct 7-segment Intersil ICM7227A 883/4018B tSSS (749) CD40110B driver) t RCA Intersll ICM7227B SCL4018B SSS (749) CD40110BE RCA 70 ICM7227C Intersil CM4018A tSOlitron Up/Down, Programmable 4-Decade, Decoder, Driver CM4018AE Solitron (668) 54HC4510 t Fllrclilld Sanyo LC7961 TC4018B Toshiba (668) Fllrcblld 74HC4510 4-Decade Divider Presettable Up/Down Binary or Decade Up/Down, Three-State RDD1D4 LSI Camp (696) Fairchild F4029BC (668) t F.lrclilld 54HC568 F4029BM t Fairchild 4-Decade Divlde-by-N (668) 74HC568 Filrelll" MC14029BA t Motorola (748) CD4059A t RCA Dual Synchronous Motorola MC14029BC (748) RCA CD4059AE Fairchild 20 F4518BC CD4029BC National 4-Decade, Multiplexed Output (The 926 gives carry at F4518BM t Fairchild CD4029BM t National National 6000.) MM74C925 Hitachi HD14518B (748) CD4029A tRCA MM74C926 National MC14518BA t Motorola (748) CD4029B t RCA 4-Decade Up/Down, with Timer Motorola MCl4518BC (748) RCA CD4029BE Toshiba TC5010 National CD4518BC HCC4029B tSGS CD4518BM t National TC5001 Toshiba 4-Decade HCF4029B SGS (749) CD4518B t RCA Toshiba TC5037 883/4029B tsss (749) RCA CD4518BE Toshiba 80 TC5051 SCL4029B SSS HCC4518B tSGS TC5052 Toshiba CM4029A tSOlitron 30 HCF4518B SGS Toshiba TC5053 CM4029AE SoUtron 883/4518B tsss Toshiba TC5054 TC4029B Toshiba SCL451RB sss 5-Decade, Multiplexed Output Programmable Divlde-by-N CM4518B tSolitron Hitachi Toshiba HD14534B TC5080 Solitron CM4518BE MC14534BA t Motorola See also CMOS Oscillators/Dividers and Digital-Special Toshiba TC4518B Motorola MC14534BC Binary/Decade with Two Reset Functions MM54HC390 t National Dual,4-Blt Toshiba 6-Digit TC5032 Toshiba TC5026B MM74HC390 National Dual Programmable Divide-by-N Binary/Decade (668) t Fllrcllll. Dual 54HC390 Counters, Miscellaneous Hitachi HD14022B (668) Filrelllld 74HC390 Hitachi HD14569B (739) 40 Divlde-by-8 Counter/Divider, Decoded Output CD54HC390 t RCA t Motorola MC14569BC F4022BC Fairchild (739) RCA CD74HC390 F4022BM t Fairchild 3- 112 Digit Counter to BCD Driver 90 Decoders MC14022BA t Motorola Hughes HCTR4010 Motorola MC14022BC Hughes HCTR6010 N-Blt (for I/O Interface) National CD4022BC HCMPl853 Hughes CM4102 t SOlitron CD4022BM t National Hughes HCMP1853C 3-Decade, Decoder, Driver (748) CD4022A t RCA HMMP1853 t Hughes Sanyo LC7960 (748) RCA CD4022AE HMMP1853C t Hughes 3-Decade Multiplexed Output (748) CD4022B t RCA (1468) RCA CDP1853 Fairchild F4553BC (748) RCA CD4022BE (1468) CDP1853C RCA F4553BM t Fairchild HCC4022B tSGS BCD-to-Decimal HD14533B Hitachi HCF4022B SGS (668) 54HC42 t Fllrclill. MC14553BA t Motorola 100 883/4022B tSss 73HC42 Fairchild Motorola 50 MC14553BC SCL4022B SSS Fairchild F4028BC 4- 112 Digit CounterlTlmer CM4022A tSolitron t Fairchild F4028BM ICM7236A Intersil Solitron CM4022AE HD14028B Hitachi Toshiba TC4022B 4- 1/2 Digit Up Counter MC14028BA t Motorola ICM7224 Intersi! Divlde-by-60, BCD Output (industrial time base generator) Motorola MC14028BC ICM7224A Intersi! HD14566B Hitachi t Motorola MC54HC42 Intersil ICM7225 t Motorola MC14566BA Motorola MC74HC42 Intersil ICM7225A Motorola MC14566BC . National CD4028BC 4-112 Digit Up-Down Counter/Latch/Decoder Driver, LCD CD4028BM t National Frequency Counter (735) MM74C946 N.tlolil Intersil ICM7216 MM54C42 t National (Continued) Intersil ICM7226 4-1/2 Digit Intersll ICM7236 t Military Temperature Range (- 55° to 125°C)
~
IC MASTER
1983
4-Digit, Multiplexed Output, Second Digit Counts to 6 (Maximum count 9599.) MM74C927 National
120
130
140
Q)
"'C
:J 150
(!J C
o
........
u
Q) Q)
(f)
160
170
• Typical Value Bold facl ladIClII.,ddlllolll dill II proyldl. 01 1111 pigi aoln.
453
Ie MASTER DIGITAL-CMOS (Cont'd) Function
Device
Source
Line Function
Decoders (Cont'd)" BCD-to-Decimal
C074HC139 SP74HC139 HS74C139 HS74C239 M54C139 M54C239 S74C139 S74C239 TC40H139
(Cont'd)
"
~
= r:~ Q)
"0 :J
C)
c: 0
....... ()
Q) Q)
C/) ~
Q)
....... C/)
CU
~
MM54HC42 MM74C42 MM74HC42 C04028A C04028AE C04028B C04028BE C054HC42 C074HC42 SP74HC42 HCC4028B HCF4028B 883/4028B SCl4028B CM4028A CM4028AE TC4028B TC40H042
Device
Source
Line Function
Dual2-line to 4-line Decoder/Demultiplexer
t National National National t RCA RCA t RCA RCA , t RCA RCA SPI tSGS SG~
tsss SSS j Solitron Solitron Toshiba Toshiba
BCD-to-7 Segment Decoder/Driver . MC14547BA MC14547BC
t Motorola Motorola
BCD-to-7-Segment HD14558B MC14558BA MC14558BC MM54C48 MM74C48 TC5002B
Hitachi tMotorola Motorola t National National Toshiba
Dual Binary to 1 of 4 Decoder/Demultiplexer (high) F4555BC Fairchild F4555BM t Fairchild HD14555B Hitachi MC14555BA t Motorola MC14555BC Motorola C04555B t RCA C04555BE RCA ,tSGS HCC4555B SGS ' HCF4555B 883/4555B tsss SCl4555B SSS TC4555B Toshiba Dual Binary to 1 of 4 Dec~der/DemUltiplexer (low) F4556BC Fairchild F4556BM t Fairchild MC14556BA t Motorola MC14556BC Motorola C04556B t RCA C04556BE RCA HCC4556B tSGS HCF4556B SGS 883/4556B tsss SCl4556B SSS TC4556B Toshiba
RCA SPI Supertex Supertex t Supertex t Supertex Supertex Supertex Toshiba
(Cont'd) (739) (769)
(748) (748) (748) (748) (739) 1 of 8 Strobed 883/4428B tsss (739) SCl4428B SSS (767) 10 3-line to 8-line Decoder/Demultiplexer 54HC138 t Fairchild (666) 74HC138 Fairchild (666) G74SC138 GTE Micro G74SC238 GTE Micro M054SC138 (697) t MUel M054SC238 (697) t Mltel M074SC138 Mltel (697) M074SC238 Mltel (697) MC54HC138 t Motorola MC74HC138 Motorola 20 MM54HC138 t National MM74HC138 National MM74PC138 National C054HC138 (739) t RCA C074HC138 RCA (739) ' COP1873C RCA (1467) SPI ' SP75HC138 HS74C138 Supertex HS74C238 Supertex M54C138 t Supertex M54C238 t Supertex S74C138 Supertex 30 S74C238 Supertex ' Toshiba TC40H138 (749) 3-line to 8-line Decoder/Demultiplexer with Input latches (749) G74SC137 GTE Micro
40
(749) (749)
G74SC237 M054SC137 M054SC237 M074SC137 M074SC237 MV74SC137 MV74SC237 HS74C137 HS74C237 M54C137 .'M54C237 S74C137 S74C237
Device
Source
GTE Micro t Mltel t MUel Mltel Mltel· Plessey Plessey Supertex Supertex t Supertex t Supertex Supertex Supertex .
C04514BE C04515B C04515BE C054HC4514 C074HC4514 HCC4514B HCC4515B HCF4514B HCF4515B 883/4514B 883/4515B SCl4514B SCl4515B CM4514B CM4514BE CM4515B CM4515BE TC4514B TC4515B
70
80
RCA t RCA' RCA t RCA RCA tSGS tSGS SGS SGS SSS tSSs ' SSS SSS Solitron Solitron t Solltron Solitron Toshiba Toshiba
454
(¢ont'd) (749) (749) (749) (739) (739)
140
150
4-line-to-16-line DecoderDemultiplexer 54HC154 t Fairchild 54HC4514 t Fairchild " 7~HC154 Fairchild 74HC4514 Fairchild MM54C154 t National 90 MM54HCl54 t National MM74Cl54 National MM74HCl54 National C054HC154 t RCA C074HC154 RCA 8 to 3-line Priority Encoder SP74HC148 10 to 4-line Priority Encoder MC54HC147 MC74HC147 100 SP74HC147 10-line-to-4-line Priority Encoder C054HC147 C074HC147
(697) (697) (697) (697)
(666) (666) (666) (666)
(739) 160 (739)
SPI
(769)
t Motorola Motorola SPI
(769)
t RCA
(739) (739)
RCA
Drivers Also See: Interface-Display Drivers, Memory and Peripheral Drivers 110 Bus, Bidirectional H06432-2 H06432-9
t Harris Harris
Bus, latching H06431-2 t Harris 4-Bit latch/4-to-,16-line Decoder (high) H06431-9 Hurl. , F4514BC Fairchild H06431A-2 Harris F4514BM t Fairchild H06431A-9 Harris F4515BC Fairchild Bus Separator/Driver F4515BM Dual2-line to 4-line Decoder/Demultiplexer t Fairchild H06433-2 t Harris 54HC139 t Fairchild (666) 50 HD14514B Hitachi H06433-9 Harris 74HC139 Fairchild (666) HD14515B Hitachi G74SC139 GTE Micro MC14514BA t Motorola 120 Fluorescent Display, 4-DigiU8 Segment G74SC239 GTE Micro MC14514BC Motorola COP470 National MD545C239 t Mitel MC14515BA t Motorola lCD, Dot Matrix M054SC139 (697) t Mltel MC14515BC Motorola HlCD0488 Hughes ,t Milel M054SC239 (697) MC54HC4514 t Motorola HlCD0538A Hughes M074SC139 Mllel (697) MC74HC4514 Motorola HlCD0539A Hughes M074SC239 Mllel (697) CD4514BC National HlCD0540 Hughes , MC54HC139 t Motorola CD4514BM ' t National HlCD0541 Hughes MC74HC139 Motorola 60 CD4515BC National HlCD0542 Hughes MM54HC139 t National CD4515BM t National HlCD0548 Hughes ' National , MM74HC139 MM54HC4514 t National 130 HlCD0550 Hughes MV74SC239 ' National Plessey MM74HC4514 HlCD0551 Hughes C054HC139 (739) t RCA C04514B (749) t RCA (Continued) (Continued) HlCD0607 Hughes
t Military Temperature Range (- 55° to 125°C)
Line
4-Bit latch/4-to-16-line Decoder (high)
. (1343) (1343) 170 (1343) (1343) (1343) (1343) (1343) (1343)
180
* TYPical Value , Bold facelndlcales addlllonal dall Is proylded an Ibe paue Rolld.
e IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-CMOS (Cont'd) Function
Device
Source
Drivers (Cont'd)
Line Function
Device
Source
Line Function
BCD-to-7 -Segment Latch/Decoder/Driver (Cont'd)
LCD, BCD-to-7-Segment Decoder/Driver with "Display Frequency Output" (748) C04055B t RCA (748) C04055BE RCA HCC4055B tSGS HCF4055B SGS Toshiba TC4055B LCD, BCD-to-7-Segment Decoder/Driver with Strobed· Latch Function (748) C04056B t RCA RCA (748) C04056BE HCC4056B 'tSGS HCF4056B SGS Toshiba TC4056B
MC74HC4511 CD4511BC CD4511BM MM54HC4511 MM54HC4543 MM74HC4511 MM74HC4543 C04511B C04511BE C054HC4511 C074HC4511 HCC4511B HCF4511B 883/4511B SCL4511B CM4511B CM4511BE TC4511B TC5022B TC5042B
Motorola National t National t National t National National National t RCA RCA t RCA RCA tSGS SGS tSSS SSS t Solitron Solitron Toshiba Toshiba Toshiba
Device
60 (749) (749) (739) (739)
~
IC MASTER
1983
Line
(Cont'd) HCF4013B 883/4013B SCL4013B CM4013A CM4013AE CM4013B CM4013BE TC4013B TC40H074
Quad Three-State 54HC173 74HC173 F4076BC F4076BM 10 HD14076B LCD, BCD-to-7-Segment Latch/Decoder/Driver MC14076BA Hitachi HD14543B MC14076BC 70 MC14543BA t Motorola MC54HC173 Motorola MC14543BC MC74HC173 MC54HC4543 t Motorola CD4076BC Motorola MC74HC4543 CD4076BM CD4543BC National MM54C173 Dual and Quad line Drivers-See Miscellaneous t National CD4543BM MM74C173 Dual High Voltage, Source 250 MA 883/4543B tSSS C04076B . MM74C908 National SCL4543B SSS C04076BE MM74C918 National Toshiba 20 TC4543B C054HC173 Hex Buffer/Driver, Three-State C074HC173 LCD, 4-Digit, Microprocessor Interlace (1344) H06495-2 t Harris HCC4076B ICM7211AM Intersi! H06495-9 Harris (1344) HCF4076B Intersil ICM7211M One-ot-Eight Decoder/Driver, Latcfied 883/4076B (749) C022105 RCA (1344) H06440-2 t Harris SCL4076B (749) C022105A RCA (1344) 80 H06440-9 Harris CM4076A LCD, 4-Digit Multiplex Input CM4076AE 4-Digit Display (stores segment and address data, drives Hughes HLCD0437 TC4076B 7-8 segment digits) LCD, 4-Digit, Multiplexed BCD to LCD Decoder/Driver, AC Nallonal (735) MM74C911 Quad 54HC175 Intersil ICM7211 Drive 6-Digit BCD Display (stores segment and address data, 74HC175 Intersil ICM7211A drives 7-8 segment digits) F40175BC (749) C022104 RCA Nallonal (735) MM74C912 F40175BM (749) C022104A RCA HD14175B 30 6-Digit Hex Display (stores segment and address data, Siliconix DF412 MC14175BA drives 7-segment digits) LCD, 4-Digit Serial Input (735) MC14175BC MM74C917 Nallonal HLCD0438A Hughes MC54HC175 7-Segment to BCD Converter/Driver (748) LCD,4-line C04054B t RCA MC74HC175 MM54C915 t National (748) C04054BE RCA CD40175B MM74C915 National HCC4054B tSGS MM54C175 HCF4054B SGS MM54HC175 Flip-Flops, D-Type TC4054B Toshiba MM74C175 LED, 4-Digit Multiplexed BCD or Binary to 7-Segment 54HC74 Dual t Fairchild (666) MM74HC175 Decoder/Driver (666) 74HC74 Fairchild C054HC175 Intersil ICM7212 Fairchild F4013BC C074HC175 Intersil ICM7212A SP74HC175 F4013BM t Fairchild LED, 4-Digit BCD or Binary to 7-Segment Decoder/Driver, TC40175B HD14013B Hitachi 90 Data and Digit Select Input Latches tor ~P Interlace TC40H175 MC14013BA t Motorola Intersil ICM7212AM Motorola MC14013BC F40174BC Hex 40 ICM7212M Intersil MC54HC74 t Motorola F40174BM LED, 4-Digit, 17-Segment Alphanumeric. Display with MC74HC74 Motorola HD14174B Memory, Decoder CD4013BC National MC14174BA MM74C956 National CD4013BM t National MC14174BC MM54C74 t National BCD (hexadecimal) to 7-Segment Latch/Decoder/Driver MC54HC174 Motorola MCl4495 MM54HC74 t National MC74HC174 MV4311 Plessey MM74C74 National CD40174BC 100 MM74HC74 National CD40174BM BCD-to-7-Segment Latch/Decoder/Driver National MM74PC74 MM54C174 F4511BC Fairchild (748) C04013A tRCA MM74C174 F4511BM t Fairchild (748) RCA C04013AE C040174B F4734BC t Fairchild (748) C04013B t RCA C040174BE Fairchild F4734BM (748) C04013BE RCA C054HC174 Hitachi HD14511B (739) C054HC74 C074HC174 t RCA MC14511BA t Motorola RCA (739) C074HC74 SP74HC174 MC14511BC Motorola 50 Sanyo HCC40174B LC4013B MC14513BA tMotorola (767) HCF40174B SP74HC74 SPI Motorola MC14513BC 883/4174B 110 HCC4013B MC54HC4511 t Motorola tSGS (Continued) (Continued) t Military Temperature Range (-55° to 125°C)
Source
Dual SGS tsss SSS t Solitron Solitron t Solitron Solitron Toshiba Toshiba
t
Fairchild Fairchild Fairchild t Fairchild Hitachi Motorola Motorola t Motorola Motorola National t National t National National t RCA RCA t RCA RCA tSGS SGS tSSS SSS t Solitron Solitron Toshiba
t
Fairchild Fairchild Fairchild t Fairchild Hitachi fMotorola Motorola t Motorola Motorola National t National t National National National t RCA RCA SPI Toshiba Toshiba
(665) 120 (665)
130
(748) (748) (739) (739)
140
I= ~
(666) (666)
150
Q)
"0
--:::J CJ
(739) (739) (770) 160
C
0 +-'
()
Q) Q)
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola t Motorola National 170 t National t National National (749) t RCA RCA (749) (739) t RCA (739) t RCA (770) SPI t SGS 180 SGS tSSS (Continued)
• Typical Value Bold faci Indica lis addlllonal dala Is provided on Ihe pagl noled.
455
CI) ~
Q) +-'
(J)
ctS
2
Ie
MASTER
DIGIT AL-CMOS (Cont'd) Function
Device
Source
line Function
Flip-Flops, 0-Type (Cont'd) Hex
Q)
"'0 ~
CJ C
0 -+oJ
() Q)
Q)
en to..
Q) -+oJ
(J)
CU
~
Source
line Function
Flip-Flops, J-K Type (Cont'd)
SCL4174B TC40174B TC40H174
Device
SSS Toshiba Toshiba
AND-Gated Master-Slave CD4095B CD4095BE CD4096B . CD4096BE HCF4095B HCC4095B HCC4096B HCF4096B
t RCA RCA t RCA RCA RCA tSGS tSGS SGS
Octal, TTL Input, Three-State MM54HC4304 MM74HC4304
t National National
Dual Negative Edge-Triggered, Separate Preset and Clock SP74HC113 (768) SPI
Octal, TTL Input, Three-State, Inverting MM54HC4303 t National MM74HC4303 National
Dual Negative Edge-Triggered with Preset and Clear MC54HC112 t Motorola MC74HC112 Motorola SPI SP74HC112 (768)
Octal Three-State, Non-Inverting 54HC374 54HC574 74HC374 74HC574 G74SC374 MD54SC374 MD54SC574 MD74SC374 MD74SC574 MC54HC374 MC54HC574 MC74HC374 MC74HC574 MM54C374 MM54HC374 MM54HC574 MM74C374 MM74HC374 MM74HC574 MV74SC374 MV74SC574 CD54HC374 CD54HC574 CD74HC374 CD74HC574 SP54SC374 SP54SC574 SP74SC374 SP74SC574 HS74C374 HS74C574 M54C374 M54C574 S74C374 S74C574
(666) t Fairchild (666) t Falrcblld Fairchild (666) 30 Fllrcblld (666) GTE Micro (710) t MIIII (710) t Mllel Mllel (710) MII,I (710) t Motorola t Motorola Motorola Motorola 40 t National t National t National National National National Plessey Plessey (739) t RCA (739) 50 t RCA RCA (739) RCA (739) tSPI tSPI SPI (761) SPI (761) Supertex Supertex t Supertex t Supertex 60 Supertex Supertex
Dual
t Military Temperature Range (-55° to 125°C)
456
70
tSGS SGS tsss SSS t SOlitron Solitron Toshiba Toshiba
130
Gates, AND Dual4-lnput
F4082BC F4082BM HD14082B MC14082BA MC14082BC CD4082BC CD4082BM CD4082B CD4082BE HCC4082B HCF4082B 883/4082B SCL4082B TC4082B TC40H021
Fairchild t Fairchild Hitachi t Motorola Motorola National t National t RCA RCA tSGS SGS tSSS SSS Toshiba Toshiba
F4073BC F4073BM HD14073B MC14073BA MC14073BC MC54HC11 MC74HC11 CD4073BC CD4073BM CD4073B CD4073BE CD54HCll CD74HCll SP74HCll HCC4073B HCF4073B 883/4073B SCL4073B CM4073A CM4073AE TC40H011
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t RCA RCA t RCA RCA SPI tSGS SGS tsss SSS t Solitron Salltron Toshiba
MC54HC107 MC54HC73 MC74HC107 MC74HC73 MM54C107 MM54C73 MM54HC107 MM74C107 MM74C73 MM74HC107 CD54HC107 CD54HC73 CD74HC107 CD74HC73 SP74HC107 SP74HC73 TC40H107 TC40H107A
t Motorola t Motorola Motorola Motorola t National t National t National National National National t RCA t RCA RCA RCA SPI SPI Toshiba Toshiba
54HC109 54HC112 54HC76 74HC109 74HC112 74HC76 F4027BC F4027BM HD14027B MC14027BA MC14027BC MC54HC109 MC54HC76 MC74HC109 MC74HC76 CD4027BC CD4027BM MM54C76 MM54HC109 MM54HCl12 MM54HC76 MM74C76 MM74HC109 MM74HCl12 MM74HC76 CD4027A CD4027AE CD4027B CD4027BE CD54HC109 CD54HC112 CD54HC76 CD74HC109 CD74HC112 CD74HC76 SP74HC109 SP74HC76
(666) t Fairchild (666) t Fairchild t Fllrcblld (666) Fairchild (666) Fairchild (666) Falrcblld (666) ,Fairchild t Fairchild 100 Hitachi t Motorola Motorola t Motorola Quad 2-lnput 54HC08 t Motorola 74HC08 Motorola F4081BC Motorola F4081BM National HD14081B t National MC14081BA t National 110 t National MC14081BC MC54HC08 t National t National MC74HC08 National CD4081BC National . CD4081BM National MM54C08 National MM54HC08 (748) MM74C08 t RCA RCA (748) MM74HC08 (748) 120 MM74PC08 t RCA RCA (748) CD4081B (739) CD4081BE t RCA (739) t RCA CD54HC08 (739) t RCA CD74HC08 RCA (739) LC4081B RCA (739) HCC4081B RCA (739) HCF4081B SPI (768) 883/4081B SPI (767) SCL4081B (Continued)
80
Triple 3-lnput (739) (739) (739) (739) (768) (767) 90
line
(Cont'd) HCC4027B HCF4027B 883/4027B SCL4027B CM4027A CM4027AE TC4027B TC7476B
(74B) (748) (748) (748)
(665) t Fairchild Fairchild . (665)
t Fairchild (666) 10 Dual wlo Preset t Fairchild (666) Fairchild (666) Falrcblld (666) t National t National National National (739) t RCA . (739) t RCA RCA (739) 20 RCA (739) Supertex Supertex t Supertex t Supertex Supertex Supertex
Source
Dual
Octal Edge-Triggered with Clear 54HC273 74HC273
Octal Three-State, Inverting 54HC534 54HC564 74HC534 74HC564 MM54HC534 MM54HC564 MM74HC534 MM74HC564 CD54HC534 CD54HC564 CD74HC534 CD74HC564 HS74C534 HS74C564 M54C534 M54C564 S74C534 S74C564
Device
140
(748) (748)
150
160 (748) (748) (740) (740) (766)
170
(665)' t Falrcblld Fairchild (665) Fairchild t Fairchild Hitachi t Motorola Motorola 180 t Motorola Motorola National t National t National t National National National National t RCA (748) 190 RCA (748) (740) t RCA RCA (740) Sanyo t SGS SGS tSSS SSS (Continued)
* Typical Value Bold faci Indlcalas additional data Is provided on tbe pagl noted.
e IC MASTER
1983
MASTER SELECTION GUIDE DIGI:T AL-CMOS (Cont'd) Function
Line Function
Source
Device
Gates, AND (Cont'd)
CD40Z3B CD40Z3BE CD40Z3UB CD40Z3UBE CD54HC10 CD74HC10 SP74HC10 HCC4023B HCF4023B 883/4023B SCl4023B CM4023A CM4023AE TC4023B TC40H010 TC7410B
(Cont'd)
t Solitron Solitron Toshiba Toshiba
Gates, NAND Dual2-lnput (Driver) CD40107B CD40107BE HCC40107B HCF40107B
t RCA RCA tSGS SGS
Dual4-lnput Expandable 883/4412B SCl4412B
tSSS SSS
Dual4-lnput
54HCZO 74HCZO F4012BC F4012BM HD14012B MC14012BA MC14012BC MC14012UBA MC14012UBC MC54HC20 MC74HC20 CD4012A CD4012BC CD4012BM MM54C20 MM74C20 CD401ZA CD401ZAE CD401ZB CD40UBE CD4012UB CD4012UBE CD54HCZO CD74HC20 SP74HCZO HCC4012B HCF4012B 883/4012B SCl4012B CM4012A CM4012AE TC4012B TC40H020 TC7420B
t
54HC10 74HC10 F4023BC F4023BM HD14023B MC14023BA MC14023BC MC14023UBA MC14023UBC MC54HC10 MC74HC10 CD4023BC CD4023BM MM54Cl0 MM54HC10 MM54HC20 MM74Cl0 MM74HC10 MM74HC20 CD40Z3A CD40Z3AE
t
Triple 3-lnput
Fairchild Falrcblld Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t Motorola Motorola National National t National t National National t RCA RCA t RCA RCA t RCA RCA t RCA RCA SPI tSGS SGS tSSS SSS t Solitron SOlitron Toshiba Toshiba Toshiba
t t t t
' t t
t t
t
IC MASTER
1983
10 (665) (665)
Quad 2-lnput (open drain) MC54HC03 MC74HC03 TC5029B TC5030B Quad 2-lnput
20
(748) (748) (748) (748) 30 (748) (748) (740) (740) (766)
40
(665) Fairchild (665) Fairchild Fairchild Fairchild Hitachi 50 Motorola Motorola Motorola Motorola Motorola Motorola National National National 8-lnput National 60 National National National National (748) RCA RCA (748) (Continued)
t Military Temperature Range (- 55° to 125°C)
(C)
(749) (749)
line Function
Source
Triple 3-lnput
Quad 2-lnput CM4081A CM4081AE TC4081B TC40HOO8
Device
t RCA RCA RCA RCA t RCA RCA SPI tSGS SGS tSSS SSS t Solitron Solitron Toshiba Toshiba Toshiba
t
(Cont'd) 8-lnput (748) (748) (748) (748) (740) 70 (740) (766)
80
t Motorola Motorola Toshiba Toshiba
54HCOO 74HCOO F4011BC F4011BM HD14011B MC14011BA MC14011BC MC14011UBA MC14011UBC MC54HCOO MC74HCOO CD4011AC CD4011AM CD4011BC CD4011BM ' MM54COO MM54HCOO MM74COO MM74HCOO MM74PCOO CD4011A CD4011AE CD4011B CD4011BE CD4011UB CD4011UBE CD54HCOO CD74HCOO lC4011B SP74HCOO HCC4011B HCF4011B 883/4011B 883/4011UB SCl4011B SCl4011UB CM4011A CM4011AE CM4011B CM4011BE TC4011B TC4011UB TC40HOOO TC7400B
t Fairchild
54HC30 74HC30 F4068BC F4068BM HD14068B MC14068BA MC14068BC
t Fairchild
Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t Motorola Motorola National t National National t National t National t National National National National RCA RCA t RCA RCA t RCA RCA t RCA RCA Sanyo SPI tSGS SGS tSSS tSSS SSS SSS t Solitron Solitron t Solitron Solitron Toshiba Toshiba Toshiba Toshiba
13-lnput (665) (665)
90
Device
54HC133 74HC133 MM54HC133 MM74HC133 CD54HC133 CD74HC133
(748) (748) (748) (748) (748) 110 (748) (740) (740)
F4019BC F4019BM HD14519B CD4019BC CD4019BM CD4019A CD4019AE CD4019B CD4019BE HCC4019B HCF4019B 883/4019B SCl4019B CM4019A CM4019AE TC4019B
2-Wide, 2-lnpuU2-Wide, 3-lnput MC54HC58 MC74HC58
(766)
t Motorola Motorola t National t National National National t RCA RCA t RCA RCA SPI tSGS SGS tSSS SSS t Solitron Solitron Toshiba
t
140
(748) (748) (740) (740) (767)
150
Fairchild Fairchild t National National t RCA RCA
(665) (665)
t
(748) (748)
(740) (740) 160
Gates, AND-OR
Quad Select 100
Line
(Cont'd) MC54HC30 MC74HC30 MM54C30 MM54HC30 MM74C30 MM74HC30 CD4068B CD4068BE CD54HC30 CD74HC30 SP74HC30 HCC4068B HCF4068B 883/4068B SCl4068B CM4068A CM4068AE TC4068B
Triple Bi-Phase Pairs , CD4037A CD4037AE CM4037A CM4037AE
(733) (733)
Source
RCA RCA t Solitron Solitron
Fairchild t Fairchild Hitachi National t National t RCA RCA t RCA RCA tSGS SGS tSSS SSS t Solitron Solitron Toshiba
(748) (748) (748) (748) Q)
"0 ::::l
(9 C 180
0 +-'
()
Q)
t Motorola Motorola
Q)
(f)
Gates, AND-OR-Invert
lo-
Q)
120
Dual 2-Wide 2-lnput F4085BC F4085BM HD14506B MC14506BA MC14506BC CD4085B CD4085BE HCC4085B HCF4085B (665) 130 883/4085B (665) SCl4085B TC4085B TC40H051
Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola (Continued)
2-Wide, 2-lnput/2-Wide, 3-lnput MC54HC51 MC74HC51
+-'
Fairchild Fairchild Hitachi t Motorola Motorola t RCA RCA tSGS SGS tSSS SSS Toshiba Toshiba
en
('Ij
2 (748) (748) 190
t Motorola Motorola
• Typical Value Bold face Indicates addillonal data Is provided on the page noted.
457
Ie
MASTER
DIGITAL-CMOS (Cont'd) Function
Device
Source
line Function
Gates, AND-OR-Invert (Cont'd) 4-Wide 2-lnput Expandable F4086BC F4086BM CD4086B CD4086BE HCC4086B HCF4086B 883/4086B SCL4086B TC4086B
Fairchild t Fairchild t RCA RCA tSGS SGS tsss SSS Toshiba
(748) (748)
Q)
"0 ::J
(9
Quad 2-lnput
C
0 +-'
()
Q) Q)
en 10....
Q) +-'
C/)
ctS
~
F4072BC F4072BM HD14072B MC14072BA MC14072BC CD4072BC CD4072BM CD4072B CD4072BE HCC4072B HCF4072B 883/4072B SCL4072B TC4072B
Fairchild t Fairchild Hitachi t Motorola Motorola National t National t RCA RCA tSGS SGS tSSS SSS Toshiba
F4075BC F4075BM HD14075B MC14075BA MC14075BC MC54HC4075 MC74HC4075 CD4075BC CD4075BM MM54HC266 MM74HC266 CD4075B CD4075BE HCC4075B HCF4075B 883/4075B SCL4075B TC4075B
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National t National t National National t RCA RCA tSGS SGS tSSS SSS Toshiba
54HC32 74HC32 F4071BC F4071BM HD14071B MC14071BA MC14071BC MC54HC32 MC74HC32 CD4071BC CD4071BM MM54C32 MM54HC32 MM74C32 . MM74HC32 CD4071B CD4071BE CD54HC32 CD74HC32 LC4071B SP74HC32 HCC4071B HCF4071B 883/4071B SCL4071B CM4071A
t Fairchild
Solitron Toshiba Toshiba
Dual3-lnput plus Inverter MC14000UBA MC14000UBC CD4000C CD4000M CD4000A CD4000AE CD4000B 10 CD4000BE CD4000UB CD4000UBE HCC4000B HCF4000B 883/4000B SCL4000B . CM4000A CM4000AE 20
Dual4-lnput
70
30
(748) (748)
40
t Motorola
(729) Motorola (729) National t National t RCA (407.748) RCA (407.748) RCA (407,748) Quad 2-lnput RCA (407.748) t RCA (407.748) RCA (407.748) 80 tSGS SGS tSSS SSS Solitron Solitron
F4002BC F4002BM HD14002B MC14002BA MC14002BC MC14002UBA MC14002UBC MC54HC4002 MC74HC4002 CD4002A CD4002BC CD4002BM MM54HC4002 MM74HC4002 CD4002A CD4002AE CD4002B CD4002BE CD4002UB CD4002UBE CD54HC4002 to74HC4002 HCC4002B HCF4oo2B 883/4002B SCL4002B CM4002A CM4002AE TC4002B
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola' Motorola t Motorola Motorola National National t National t National National t RCA RCA t RCA RCA t RCA RCA t RCA RCA t SGS SGS tSSS SSS t Solitron Solitron Toshiba
54HC27 74HC27 F4025BC F4025BM HD14025B MC14025BA MC14025BC MC14025UBA MC14025UBC MC54HC27 MC74HC27 CD4025A CD4025BC CD4025BM MM54HC27 MM74HC27 CD4025A CD4025AE CD4025B CD4025BE
t Fairchild Fairchild Fairchild
Device
Source
Triple 3-lnput
Gates, NOR
(665) Fairchild (665) Fairchild t Fairchild Hitachi f Motorola Motorola Triple 3-lnput t Motorola Motorola 50 National t National t National t National National National (748) t RCA RCA (748) (740) t RCA RCA (740) 60 Sanyo SPI ' (767) tSGS SGS tsss SSS t Solitron (Continued)
t Military Temperature Range (- 55° to 125°C)
458
(748) (748)
. line Function
Source
(Cont'd) CM4071AE TC4071B TC40H032
Gates, OR Dual4-lnput
Device
Quad 2-lnput
90
100 (748) (748) (748) (748) (748) (748) (740) (740) 110
(665) (665)
tFairch~d
Hitachi 120 t Motorola Motorola t Motorola Motorola t Motorola Motorola National National t National t National 130 National (748) t RCA RCA (748) (748) t RCA RCA (748) (Continued)
8-lnput
CD4025UB CD4025UBE CD54HC27 CD74HC27 SP74HC27 HCC4025B HCF4025B' 883/4025B SCL4025B CM4025A CM4025AE TC4025B TC40H027
t RCA
54HC02 74HC02 F4001BC F4001BM HD14001B MC14001BA MC14001BC MC14001UBA MC14001UBC MC54HC02 MC74HC02 CD4001A CD4001BC CD4001BM MM54C02 MM54HC02 MM74C02 MM74HC02 MM74PC02 CD400lA CD4001AE CD4001B CD4001BE CD4001UB CD4001UBE CD54HC02 CD74HC02 LC4001B SP74HC02 HCC4001B HCF4001B 883/4001B 883/4001UB SCL4001B SCL4001UB CM4oo1A CM4001AE CM4oo1B CM4001BE TC4001B TC4001UB TC40H002
t Fairchild
RCA
t RCA RCA SPI tSGS SGS tSSS SSS Solitron Solitron Toshiba Toshiba
F4078BC F4078BM HD14078B MC14078BA MC14078BC MC54HC407B MC74HC4078 . MM54HC4018 MM74HC4018 CD4078B CD4078BE HCC4078B HCF4078B 883/4078B SCL4078B 883/4402B CM4078A
line
(Cont'd) (748) (748) (740) (740) (766) 140
Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t Motorola Motorola National National t National t National t National National National National t RCA RCA t RCA RCA t RCA RCA t RCA RCA Sanyo SPI tSGS SGS tsss tsss SSS SSS t Solitron Solitron t Solitron SOlitron Toshiba Toshiba Toshiba
(665) (665) 150
160
(748) (748) (748) 170 (748) (748) (748) (740) (740) (766)
180
190
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t National National (748) 200 t RCA RCA (748) tSGS SGS tSss SSS t Solitron t Solitron (Continued)
• Typical Value Bold fac. Indlcales additional dall Is provided on lh. plge noled.
~
IC MASTER
1983
. MASTER SELECTION GUIDE DIGITAL-CMOS (Cont'd) Function
line Function
Source
Device
CM4078AE SCl4402B TC4078B
Solitron Solitron Toshiba
t
Fairchild Fairchild Fairchild t Fairchild Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola National National t National National t National t National t National National National t RCA RCA t RCA RCA t RCA RCA t RCA RCA SPI tSGS tSGS SGS SGS tSSS tSSS SSS SSS t Solitron Solitron t Solitron Solitron Toshiba
(665) (665)
Fairchild t Fairchild Hitachi t Motorola Motorola t Motorola Motorola t RCA RCA t RCA RCA SPI tSGS SGS tSSS SSS t Solitron Solitron
t Military Temperature Range (-55° to 125°C)
co IC MASTER
1983
t Motorola Motorola
Source
CM4042AE TC4042B
Solitron Toshiba
F4044BC F4044BM HD14044B MC14044BA MC14044BC CD4044A CD4044BC CD4044BM CD4044A CD4044A/B CD4044A1BE CD4044AE CD4044B HCC4044B HCF4044B 883/4044B SCl4044B . CM4044A TC4044B
Fairchild t Fairchild Hitachi t Motorola Motorola National National t National t RCA t RCA RCA RCA RCA tSGS SGS tSSS SSS t Solitron Toshiba
F4043BC F4043BM HD14043B MC14043BA MC14043BC CD4043A CD4043BC CD4043BM CD4043A CD4043AE C04043B CD4043BE HCC4043B HCF4043B 883/4043B SCl4043B CM4043A CM4043AE TC4043B
Fairchild t Fairchild Hitachi t Motorola Motorola National National t National t RCA RCA t RCA RCA tSGS SGS t SSS SSS t Solitron Solitron Toshiba
Line
Quad NAND R/S
Hex Function (Quad inverter plus 2-input NOR gate plus 2input NAND gate) Hitachi HD14572 MC14572A t Motorola Motorola MC14572C 8-lnput Expandable Multifunction 10 CD4048BC CD4048BM CD4048A CD4048AE CD4048B CD4048BE HCC4048B HCF4048B 883/4402B SCl4402B CM4048A 20 CM4048AE
National t National t RCA RCA t RCA RCA tSGS SGS tsss SSS t Solitron Solitron
70
(748) (748) (748) (748)
80 Quad NOR R/S
Latches (748) Dual 4-Bit Addressable (748) F4723BC (748) F4723BM CD4723BC (748) CD4723BM (748) (748) HD14508B Dual4-Bit (740) 30 MC14508BA MC14508BC (740) MC54HC77 (767) MC74HC77 MN1201 CD4508B CD4508BE HCC4508B HCF4058B 883/4508B SCl4508B 40 CM4508 TC4508B Quad, Bistable TC40H375 Quad Clocked D
Gates, Exclusive NOR F4077BC F4077BM HD14077B MC14077BA MC14077BC MC54HC266 MC74HC266 CD4071B CD4071BE CD54HC266 CD74HC266 SP74HC266 HCC4077B HCF4077B 883/4077B SCl4077B CM4077A CM4077AE
Device
Quad Clocked D
Triple (duaI4-input NAND and 2-input ORINOR) HD14501 Hitachi MC14501UBA t Motorola Motorola MC14501UBC
Gates, Exclusive OR
Quad
Line Function
(Cont'd) Dual 5-lnput Majority logic MC14530BA MC14530BC
(Cont'd)
8-lnput
.54HC86 74HC86 F4030BC F4030BM F4070BC f4070BM HD14070B MC14070BA MC14070BC MC54HC86 MC74HC86 CD4030A CD4070BC CD4070BM CD4507BC CD4507BM MM54C86 MM54HC86 MM74C86 MM74HC86 CD4030A CD4030AE CD4030B CD4030BE CD4070B CD4070BE CD54HC86 CD74HC86 SP74HC86 HCC4030B HCC4070B HCF4030B HCF4070B 883/4030B 883/4070B SCl4030B SCl4070B CM4030A CM4030AE CM4070A CM4070AE TC4030B
Source
Gates, Miscellaneous
Gates, NOR (Cont'd)
Quad
Device
50
(748) (748) (740) (740) (771)
60
54HC75 74HC75 F4042BC . F4042BM HD14042B MC14042BA MC14042BC MC54HC75 MC74HC75 CD4042BC CD4042BM MM54HC75 MM74HC75 CD4042A CD4042AE CD4042B CD4042BE HCC4042B HCF4042B 883/4042B SCl4042B CM4042A
Fairchild t Fairchild National National Hitachi t Motorola Motorola tMotorola Motorola Panasonic t RCA RCA tSGS SGS tSSS SSS Solitron Toshiba
90
(749) (749)
130
(748) (748) (748) (748) (748) 140
150
(748) (748) (748) (748)
160
Octal Transparent, D-Type, Three State 54HC373 t Fairchild (665) (665) 54HC573 t Fairchild (665) 74HC373 Fairchild 100 74HC573 Fairchild (665) G74SC373 GTE Micro Toshiba (710) 170 MD54SC373 t Mltal (710) MD54SC573 t Mltal Mltel (710) MD74SC573 t Fairchild (665) (665) MC54HC373 t Motorola Fairchild MC54HC573 t Motorola Fairchild MC74HC373 Motorola t Fairchild Motorola MC74HC573 Hitachi MM54HC373 t National t Motorola MM54HC573 t National Motorola MM74HC373 National 110 t Motorola 180 MM74HC573 National Motorola Plessey National MV74SC573 (739) CD54HC373 t National t RCA (739) CD54HC573 t RCA t National (739) CD74HC373 RCA National (739) CD74HC573 RCA (748) t RCA (748) SP54SC373 RCA tSPI SP54SC573 (748) tSPI t RCA (761) SP74SC373 SPI RCA (748) (761) SP74SC573 SPI 120 t SGS HS74C373 Supertex 190 SGS Supertex HS74C573 tSSS M54C373 t Supertex SSS M54C573 t Supertex t Solitron (Continued) (Continued)
• Typical Value Bold facelndlcalal addlllonal dala II provided on Iba paga nolad.
459
.......
t)
Q.) Q.)
(f)
Ie MASTER DIGITAL-CMOS (Cont'd) Function
Device
Source
Line Function
Latches (Cont'd) Octal Transparent, D-Type, Three State (Cont'd) S74C373 S74C573 TC40H373
I i
~
!
(1.)
"'0 :::J
(9 C
0
....... ()
Q) (1.)
C/) io-
(1.)
....... en
ro
~
Device
Source
Line Function
8-Blt Addressable (serial in, parallel out)
Supertex Supertex Toshiba
Octal Transparent, Three-State, Inverted Output 54HC533 t Fllrehlld 54HC563 t Fllrehlld 74HC533 Fllrchlld 74HC563 Fllrcblld MD54SC533 t Mltel MD54SC563 t Mltel MD74SC373 Mltel MD74SC533 Mltel MD74SC563 Mltel MC54HC533 t Motorola MC54HC563 t Motorola MC74HC533 Motorola MC74HC563 Motorola MM54HC533 t National MM54HC563 t National MM74HC533 National MM74HC563 National MV74SC533 Plessey MV74SC563 Plessey CD54HC533 t RCA CD54HC563 t RCA CD74HC533 RCA CD74HC563 RCA HS74C533 Supertex HS74C563 Supertex M54C533 t Supertex M54C563 t Supertex S74C533 Supertex S74C563 Supertex
CD74HC259 HCC4099B HCF4099B 883/4099B SCL4099B TC4099B TC40H259
RCA tSGS SGS tsss SSS Toshiba Toshiba
Device
Source
(Cont'd) (739)
(Cont'd) F4720M HD14537 MCM14537A MCM14537C . MM54C200 MM74C2OO CD40061 CD40061A CD4061A
(665) (665) 8-Bit, Counter, Incremented Input, Parallel Output, Three(665) State MC14597BA t Motorola 70 (665) MC14597BC Motorola 256 cBlt RAM (32x8) (710) HCMP1824 (710) Memories HCMP1824C (710) 10 HMMP1824 For additional information see Master Selection Guide(710) HMMP1824C Memory Sections. (710) CDP1824 16-Bit FIFO (4x4) CDP1824C CD40105B (749) t RCA 256-Bit RAM (64x4) CD40105BE RCA (749) MCM14552A HCC40105B tSGS MCM14552C HCF40105B SGS COP498 16-Bit Multiport Register File (4x4 read while write RAM) MM54C910 HD14580B Hitachi MM74C910 20 MC14580BA t Motorola 768-Bit RAM (64x12) MC14580BC Motorola IM6512 CD40108B (749) 80 t RCA IM6512M (739) CD40108BE RCA (749) (739) CD40208B (749) 1024-Bit PROM (256x4) t RCA (739) HM6611 CD402088E RCA (749) (739) HCC40208B tSGS 1024-Bit RAM (1024x1) HCF40208B SGS S23128 S4264 32-Blt RAM (binary addressing) CD4036A (3875) S6504 t RCA 30 CD4036AE RCA (3875) S6508 CM4036A t Salitron S6508A CM4036AE t SOlitron S6516 Octal, TTL Input, Three-State TC4036B Toshiba 90 S6528 MM54HC4302 t National S68B364 32-Bit RAM (direct word line addressing) MM74HC4302 National F4736BC CD4039A (3875) t RCA Octal, TTL Input, Three-State, Inverting F4736BM CD4039AE RCA (3875) MM54HC4301 t National HM6508 CM4039A t SOlitron MM74HC4301 National CM4039AE SOlitron HM6518 TC4039B Toshiba 8-Blt Addressable, Bidirectional Data Port (serialln/out and parailel out) 64-Bit FIFO (16x4) MCM6508 MC14599BA t Motorola F4703BC Fairchild MCM6518 MC14599BC Motorola F4703BM t Fairchild MM54C929 8-Bit Addressable Input, Parallel Output, Three-State 64-Bit Program Stack (16x4 LIFO) MM54C930 MC14598BA t Motorola F4706BC Fairchild MM74C929 MC14598BC Motorola 40 F4706BM t Fairchild MM74C930 8-Bit Addressable (serial in, parallel out) 64-Bit RAM (16x4) NMC6508 54HC259 t Fairchild (665) F4725BC Fairchild 100 NMC6516 74HC259 Fairchild (665) F4725BM t Fairchild NMC6518 F4724BC Fairchild MM54C89 t National CDP1821 F4724BM t Fairchild MM74C89 ' National SCM21C02 HD14099B Hitachi CD40114B (3874) t RCA TC5508 MC14099BA t Motorola CD40114BE RCA (3B74) 1024-Bit RAM (128x8) MC14099BC Motorola 64-Bit RAM (16x4 clocked RAM. three state output CDP1823 MC54HC259 t Motorola register) F4710BC Fairchild MC74HC259 Motorola 1024-Bit RAM (256x4) F4710BM t Fairchild CD4099BC National 50 S5101l 64-Bit RAM (64x1) CD4099BM t National F4721BC MCM14505A t Motorola CD4724BC National F4721BM f MCM14505C Motorola CD4724BM t National HM6551 256K Synchronous RAM Module MM54HC259 t National HM6641 Harris MM54HC77 t National HM6561 (669.1333,3783) 110 MM74HC259 National MM74HC77 CD4099B CD4099BE CD4724B CD4724BE CD54HC259
256-Bit RAM (256x1) National WD74HC200 (749) tHCA RCA (749) 256-Bit RAM (256x1) (749) 60 t RCA F4720AC RCA (749) F4720AM (739) t RCA F4720C (Continued)
t Military Temperature Range (- 55° to 125°C)
460
Western
Line
256-Blt RAM (256x1)
(3997)
fairchild
t Fairchild Fairchild (Continued)
HM6562 HM435101 HCMP1822C HMMP1822C MCM5101 MM54C920
t Fairchild Hitachi t Motorola Motorola t National National RCA t RCA t RCA
(3874) (3874) (3874)
Hughes Hughes t Hughes t Hughes t RCA t RCA
(3874) (3874)
120
t Motorola
130
Motorola National t National National Intersil
t Intersil t Harris AMI (3610) AMI AMI 140 AMI AMI AMI AMI AMI Fairchild t Fairchild' Harris (669.1333.3754) Harris (669.1333.3756) Motorola 150 Motorola t National t National National National National National National RCA (3874) SSS 160 Toshiba RCA
(3874)
AMI (3614) Fairchild Fairchild Hurls (669,1333.3758) Harris (669.1333.3760) Harris Hitachi Hughes 170 t Hughes Motorola t National (Continued)
• Typical Value BDl. rael Indicates addltloaal .ata Is provldld on t~1 paal lOtH.
~
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-CMOS (Cont'd) Function
Source
Device
Memories (Cont'd)
1024-Bit ROM (256x4) MCM14524A MCM14524C 2048-Bit ROM (256x8) F4735BC F4735BM
(Cont'd) t National National National National 16384-Bit ROM (2048x8) National G5316 NEC-Micro HCMP1835 (3874) t RCA HCMP1835C (3874) HCMP1836 t RCA HCMP1836C tsss HMMP1835 Toshiba 10 HMMP1835C HMMP1836 t Motorola (3840) HMMP1836C Motorola (3840) CDP1835 CDP1835C Fairchild SCM23C16 t Fairchild
4096-Bit RAM (1024x4) SRM2114 SRM6514 4096-Bit RAM (1024x4) G5114 HM4334 NMC6414 ItPD445l M8M5114 M8M5115 CDP1825 CDP1825C CM2114 TC5047A 4096-Bit RAM (4096x1) SRM6504 4096-Bit RAM (4096x1) HM4315 HM6147 NMC6504 M8M5104 TC5504 4096-Bit ROM (512x8) HCMP1831 HCMP1831C HCMP1832 HCMP1832C HMMP1831 HMMP1831C HMMP1832 HMMP1832C CDP1831 CDP1831C CDP1832 CDP1832C 8192-Bit ROM (1024x8) HCMP1833 HCMP1833C HCMP1834 HCMP1834C HMMP1833 HMMP1833C HMMP1834 HMMP1834C CDP1.833 CDP1833C CDP1834 CDP1834C 16384-Bit RAM M8M5128
t t t t t t t t
t t t t t t t t
1983
Source
Line Function
Device
Source
Line
Quad 2-lnput Data Selector, Three-State Epson Epson Epson Epson Epson Epson
60
CD40257BE CD54HC257 CD74HC257 8P74HC257 HCC40257B HCF40257B
RCA t RCA RCA 8PI tSGS SGS
GTE Micro Quad 2-lnput, Inverting, Three-State Hughes 8P74HC258 8PI Hughes 4-Bit AND/OR Selector Hughes F4519BC Fairchild Hughes F4519BM t Fairchild t Hughes HD14519 Hitachi 70 t Hughes MC14519BA t Motorola t Hughes MC14519BC Motorola t Hughes CD4519BC National (3876) t RCA CD4519BM t National (3876) t RCA 8-Channel 54HC151 t Fairchild SSS Fairchild 74HC151 MM54C151 t National Multiplexers (Digital) MM54HC151 t National Epson See also Interface-Analog Switches, Multiplexers MM74C151 National Epson DuaI4-Channel, Three-State MM74HC151 National (666) 54HC253 t Fairchild CD54HC151 t RCA GTE Micro Fairchild (666) 74HC253 CD74HC151 RCA Hitachi (3789) Toshiba TC40H151 Dual4-Channel National Fairchild F4539BC 8-Channel Data Selector NEC-Micro 20 80 F4539BM t Fairchild F4512BC Fairchild (3873) OKI HD14539B Hitachi F4512BM t Fairchild (3873) OKI MC14539BA t Motorola HD14512 Hitachi RCA Motorola MC14539BC MC14512A t Motorola RCA MC54HC153 t Motorola Motorola MC14512C Supertex Motorola MC74HC153 CD4512BC National Toshiba (769) 8P74HC153 8PI CD4512BM t National Toshiba TC40H153 CD4512B t RCA Toshiba TC4539B Epson CD4512BE RCA DuaI4-lnput, Three-State HCC4512B tSGS MC54HC253 t Motorola HCF4512B SGS Hitachi (3789) Motorola 90 MC74HC253 883/4512B tsss HltlChl (3789) MM54HC253 t National SCl4512B SSS National 30 MM74HC253 National TC4512B Toshiba (3873) OKI (771) 8P74HC253 8PI 8-Channel Differential Multiplexer/Demultiplexer Toshiba Dual4-lnput MM54HC153 t National MC14067BA t Motorola National MM74HC153 MC14067BC Motorola Hughes (740) CD54HC153 t RCA 8-Channel, Three-State Hughes (740) CD74HC153 RCA 54HC153 t Fairchild Hughes Quad 2-lnput Data Selector 54HC251 t Fairchild Hughes MC54HC157 t Motorola 54HC4512 t Fairchild Hughes Motorola MC74HC157 74HC153 Fairchild Hughes 100 MM54C157 t National 74HC251 Fairchild Hughes MM54HC157 t National Fairchild 74HC4512 40 Hughes MM54HC158 t National 8-lnput with latch, Three-State (3876) RCA National MM74C157 MM54HC354 t National (3876) RCA National MM74HC157 MM54HC356 t National RCA National MM74HC158 . National MM74HC354 8P74HC157 8PI (769) RCA MM74HC356 National Toshiba TC40H157 8-lnput, Three State Quad 2-lnput Data Selector, Inverting Hughes CD54HC354 t RCA MC54HC158 t Motorola Hughes CD54HC356 t RCA Motorola MC74HC158 Hughes CD74HC354 RCA (769) 110 8P74HC158 8PI Hughes CD74HC356 RCA TC40H158 Toshiba Hughes 8-lnput, Three-State Quad 2-lnput Data Selector, Three-State 50 Hughes MC54HC251 t Motorola 54HC257 t Fairchild (666) Hughes MC54HC354 t Motorola Fairchild (666) 74HC257 Hughes t Motorola MC54HC356 MC54HC257 t Motorola (3876) RCA Motorola MC74HC251 Motorola MC74HC257 (3876) RCA Motorola MC74HC354 MM54HC257 t National (3877) RCA MC74HC356 Motorola MM74HC257 National (3877) RCA CD54HC251 t RCA (749) CD40257B t RCA CD74HC251 RCA ' (3873) (Continued) OKI
t Military Temperature Range (- 55° to 125°C)
co IC MASTER
Device
16384-Bit ROM (2048x8) SRM2016C20 SRM2016C25 SRM2017C20 SRM2017C25 SRM2018C20 SRM2018C25
1024-Bit RAM (256x4) MM54C921 MM74C920 MM74C921 NMC6551 NMC6552 ItPD5101l CDP1822 CDP1822C SCM5101 TC5501
Line Function
(Cont'd) (749) (740) 120 .(740) (771)
(771)
130
(666) (666)
(740) (740) 140
(749) (749) 150
IC MASTER 1983
MASTER SELECTION GUIDE DIGITAl-ECl (Cont'd) Function
Line Function
Source
Device
10000 Series Memories (Cont'd)
MB7072E MB7072N MBM10422E MBM10422H MBM10422N HM2120 DM10422
Fujitsu Fujitsu Fujitsu Fujitsu Fujitsu Hitachi Nillonil
~PB10144
RAM (256x4)
F100415A
RAM (1024x1)
F10415 F10415A F10474C HM2110 HM2112 MCM10146 MCM10415A MCM10546 DM10415 10415 RAM (4096x1)
MBM10470A-15
RAM (4096x1)
Monostable
R110144 SN10144
DM10414
F10470 MBM10470A-20 HM2140 HM2142 DM10470 DM10470A DM10470L
NII/onll NII/ODII NII/ODII Fairchild
Multiplexers (Digital) F10174 F10574 MC10174 , MC10574 MC10H174 10174 SN10174
Quad 2 to 1 (Inverting with enable) F10159 F10559 MC10159 MC10559 10159 Quad 2 to 1 (non-inverting) F10158 F10558 MC10158 MC10558 10158 F10164 F10564 MC10164 MC10564 MC10Hl64 10164 SN10164
Fairchild t Fairchild Motorola t Motorola Motorola Signetics TI Fairchild
t Fairchild Motorola t Molorola . Signetlcs Fairchild t Fairchild Motorola t Motorola Signetics Fairchild
t Fairchild Motorola t Motorola Moloroll Signetics TI
t Military Temperature Range (- 55° to 125°C)
c
MC10198
F10000C
4-Bit Universal F10141 FlO541 MC10141 MC10541 MC10H141 10141
(3681) (3681) (3681) (3681) (3681)
Quad Differential line Receiver F10115 F10515 MC10115 MC10515 10115 60
10
Fairchild Fairchild
t Fairchild Motorola
t Motorola Motorola Signetics
8-lnput Priority Encoder F10165 F10565 MC10165 MC10565 10165
(730)
Translators
(3854)
(3855) Hex ECl to MST MC10191 (3855) MC10591 (3855) 30
IC MASTER 1983
Source
Quad Bus Receiver MC10129 10129
Motorola
Shift Registers 4-Bit
Device
9-Bit Parity Circuit (2 carry inputs) F10570 MC10170 12-Bit Parity Generator/Checker F10160 F10560 MC10160 MC10560 MC10H160 10160 70
line
Motorola Signetics Fairchild
t Fairchild Motorola
110
t Motorola Signetics Fairchild
t Fairchild Motorola
t Motorola Signetics
t Fairchild Motorola Fairchild
120
t Fairchild Motorola
t Motorola Moloroll Signetics
(730)
95000 Series Counters Binary
F95016
Fairchild
Decade
F95010
Fairchild
Flip-Flops, D-Type Dual Master-Slave F95231
Motorola
80
t Motorola
Fairchild
Flip-Flops, J-K Type F95029
F10480
8to 1
line Function
Dual ECl to MOSITTl Fllrcblld MC75358 Motorola (3615.3625) MC75368 Motorola Fllrcblld Triple ECl to NMOS (3615.3618) F10m Fairchild Fllrcblld Motorola MC10177 (3615.3618) Fllrcblld Quad Differential Receiver/MST to ECl (3615.3622) MC10190 Motorola Hllacbl (3789) MC10590 t Motorola Hllichl (3789) Quad ECl to TIL (differential input) Moloroll (3839) F10125 Fairchild Moloroll (3839) t Fairchild F10525 t Motorola 20 MC10.125 Motorola National MC10525 t Motorola Signetics Signetics 10125 (3681) FuJllsu Quad TIL to ECl ORINOR F10124 Fairchild Fllrcblld F10524 t Fairchild (3615.3621) MC10124 Motorola (3681) FaJllsu MC10524 t Motorola Hitachi 10124 Signetics Hitachi
RAM (16384x1)
Dual 4 to 1
Source
Multivibrators . (Cont'd) National NEC-Electron Raytheon TI
RAM (256x1)
Device
Fairchild
Miscellaneous Active Terminator F10014C F10014M Error Detection/Correction Circuit MC10163 MC10193 MC10563 MC10593 MC10905 Micro-Code Sequencer MC10904 40 Dual Simultaneous Bus Transceiver MC10194 MC10594 Triple Differential line Receiver F10114 F10116 F10514 F10516 MC10114 MC10116 MC10216 MC10514 50 MC10516 MC10616 MC10H116 (730) DM10116 10114 10116
Gates, OR Fairchild t Fairchild Motorola Motorola t Motorola t Motorola Motorola
Fairchild
Quad 2-lnput (3 OR, 1 ORINOR) F95103
Fairchild
130
Gates, NOR
Motorola Motorola t Motorola Fairchild Fairchild t Fairchild t Fairchild Motorola Motorola Motorola t Motorola t Motorola t Motorola Molorola National Signetics Signetics
Dual3-lnput 3-0utput (line driver) F95110
-+-'
() (J)
Dual3-lnput 3-0utput (line driver) F95111
FairChild
Triple 4-3-3 Input F95106
Fairchild
90 Quad 2-lnput (with enable) F95004 Quad 2-lnput (3 NOR, 1 OR/NOR) F95102
(J)
(f)
Fairchild FairChild
Gates, OR/NOR
100 (730)
Dual4-lnput (with enable) F95002
Fairchild
Dual 4-5 Input
Fairchild
F95109
Triple 2-lnput (with enable) F95003
FairChild
Triple 2-3-2 Input F95105
Fairchild
Quad 2-lnput (one input common) F95101
FairChild
140
* Typical Value Bold flCI Indlcilis Idd/llODl1 dill Is provldld aD Ibe paUl Dolld.
469
Ie MASTER DIGITAl-ECl (Cont'd) Function
Device
Source
Line FUnction
95000 Series Gates, OR/NOR (Cont'd)
Hex
Device
Source
Fl00151 100151
Fairchild Signetics
Line Function
(658)
Gates, AND-OR-Invert Gates, Exclusive OR/NOR Triple 2-lnput
F95107
Latches Dual D Clocked F95130
Fairchild
F95000 F95HOOC
Fairchild Signetics
(658) 30
5-Wide
Fl00118 100118
Fairchild Signetics
(658)
Triple 5-lnput Fairchild Fairchild
Translators Quad TIL to ECl ORINOR F95124
Fl00117 100117
Triple Differential Line Receiver F95116 Quad Differential Line Receiver F95115
~
S ~ r-'
\
Q)
Fairchild
(658)
2x8-Bit Recode Multiplier Fl00183
Fairchild
(658)
4-Bit Binary/Decade logic Unit Fl00181
Fairchild
(658)
6-Bit Adder
Fairchild
(658)
Fl00180
9-Bit Comparator Fl00166 100166
Falrcblld Signetics
(658)
9-Bit Wallace Tree Adder Fl00182
FairChild
(658)
"0 ::::l
Buffers
(9
9-Bit
C
Fl00122 100122
Fairchild Signetics
Fl00l07 100107
Fairchild Signetics
Triple D
Fl00130
Fairchild
HexD
Fl00150 100150
Fairchild Signetics
CAM (4x4)
FlOO142
Fairchild
PROM (256x4)
F100Z416
Fairchild
PROM (256x4)
Fl00416
Fairchild
Counters
Q)
Multipurpose Counting Register FlOO136
U
-Q)
en "-
Q)
........
en
Universal
FlOO170 100170
Fairchild Signetics
Hex Bus
Siemens
ECLlTTl Bus Transceiver SH100255
Siemens
Error Correction Circuit SH100B404
Siemens
(658) 40 Interface Transceiver SH100B250 (658)
Siemens
(658)
(658)
(3626)
Siemens
Register File with Shift logic SH100B393
Siemens
Universal Priority Encoder Fl00165
Falrcblld
Universal Register File SH100B417
Siemens
(658)
RAM (16x8 or 64x2) SH100B396
(658) 20
Fl00113
Fairchild
(658)
Fl00112 100112
Fairchild Signetics
(658)
Fl00123 100123
Fairchild Signetics
(658)
Siemens
RAM (256x1)
Fl00414
Fairchild (3615.3624)
RAM (256x4)
Fl00422
Falrcblld
(3615) 50 (3681)
470
80
(658)
RAM (1024x4)
MBM100474
Fujitsu
RAM (1024x1)
Fl00415
Fairchild (3615.3625)
Dual Access Stack F100222
Fairchild
RAM (1024x4)
Fl00474
Fairchild (3615.3629)
Dual Line Transmitter and Receiver SH100B252
Siemens
RAM (4096x1)
Fl00470
Dual Sequencer for SH 1008480 SH100B481
Siemens
MBM100470
Fairchild (3615.3628) Fujitsu (3681)
Fl00480
Fairchild
Dual9-Bit Parity Generator/Checker FlOO160 100160
Falrcblld Signetics
(658) 90
Quintuple Line Receiver Fl00114 100114
Falrc.lld Signetics
(658)
Quintuple Transceiver Fl00194
Falrc.lld
(658)
-
RAM (16384x1) (3630)
Multiplexers (Digital) Universal (nine 4/1) SH100B384
Fairchild
Siemens
FlOO163 100163
Fairchild Signetics
Fl00171 100171
Fairchild Signetics
Quad 2-lnput with latch FlOO155 100155
' Fairchild Signetics
(658)
Fairchild Signetics
(658)
Triple 4-lnp,ut
t Military Temperature Range (- 55° to 125°C)
Siemens
Register File with Ring Shifter SH100B420
(658)
16-lnput
(658)
Fairchild
(658)
Fl00126
Fairchild Signetics
Fairchild
Program Interface Unit F100223
Fairchild
Dual 8-lnput
Fl00131 100131
Fairchild
Multi-Function Network F100221
(658)
FlOO164 100164
(658)
Nine Buffered Gates SH100B122 (658) 60 4-Bit Microprocessor Slice SH100B480
Dlvi~e
Shift Registers Mask-Merge
Fl00156
Fairchild
(658)
Siemens Siemens
III and Other Series Counters Bi-Quinary
Flip-Flops, D-Type Triple
Micro Program Sequencer F100224
Fairchild
(658)
High Speed Line Quad
Siemens
Fl00402
RAM (16x4)
Drivers Backplane
(658)
10 RAM (16x4 register file) Fl00145
Decoders
CO
~
Fairchild
(658) 70
Falrc.lld
Programmable Timer/Counter SH100B395
0 ........
fllrcblld
100K ECl-TIl Fl00125
Comparator and Multiplexer SH100B402
(658)
Memories
look Ahead Carry Circuit Fl00179
TIl-100K ECl Fl00124
Line
Translators
Siemens
Fairchild Signetics
Latches
100K Series Arithmetic Functions
(658)
Clock Pulse Generator SH100B392
Quintuple 2-lnput FlO0102 100102
Fairchild
Fairchild
fllrcblld
Fairchild
(658)
Gates, Exclusive OR/NOR
Fairchild
8-Bit Universal Fl00141
Bidirectional Shifter SH100B419
Falrcblld Signetics
Miscellaneous
(658)
Address and Data Interface Unit F100220
Fl00l0l 100101
Quintuple
Source
Falrcblld Signetics
Miscellaneous
Gates, OR/NOR
Shift Registers 4-Bit
Triple
Fairchild
Device
Fl00158 100158
8-J3itMatrix
MC1678
Motorola
by 4 Prescaler (1 GHz) MC1697 MC1699
Motorola Motorola
• Typical Value Bold face Indlcales addlllonal dala Is prDvlded Dn Ibe paue nOled. IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-TTL (Cont'd) Device
(Cont'd) t Motorola Motorola t National National tSGS SGS t Signetics Signetics ' tTl TI
(S4O) (S4O)
t Molorola Molorola tTl TI
(132) (132) (S3S) (S3S)
tTl TI
(S3S) (S3S)
Triple 3-lnput, Open Collector 'TIL-ALS SN54ALS15 SN14ALS15 SN54ALS15 SN14ALS15 SN54H15 SN14H15
TIL-LS 54LS15 74LS15 HD74LS15 M74LS15 SN54LS15 SN74LS15 DM54LS15 DM74LS15 54LS15 74LS15 SN54LS15 SI14LS15
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS ttl TI
TTL-S
54S15 74S15 HD74S15 DM54S15 DM74S15 SI54S15 8114S15
t Fairchild Fairchild Hitachi t National National tTl TI
5411 7411 HD74LS11 DM5411 DM7411 5411 7411
t Fairchild Fairchild Hitachi t National National t Signetics Signetics
Triple 3-lnput TTL
10
TIL-S
Quad 2-lnput, Open Collector 5409 20 TTL 7409 ZN5409 ZN7409 HD7409 MC5409 MC7409 (S3S) DM5409 (S3S) DM7409 SI5409 SI1409 30 TIL-ALS SI54ALS09 SI14ALS09 (S3S) SI54ALS09 (S3S) SI14ALS09 TTL-H
40
TTL-ALS SI54ALSll SI14ALSll SN54ALS1011 S154ALS11 S114ALS1011 8N14ALS11 TTL-AS Sl54A811 8114A811 TTL-F
TTL-H
t Molorola Molorola tTl tTl TI \ TI tTl TI
~
(132) (132) (1015) (S36) (1015) (S36) (S36) (S36) 50
54F11 74F11 MC54Fll MC74F11 74F11
t Fairchild Fairchild t Molorola Molorola Signetics
54H11 74H11 MC3006 MC3106 DM54H11 DM74H11 S154H11 SI14Hll
t Fairchild Fairchild Motorola t Motorola 60 t National National (S36) tTl TI (S36) (Continued)
t Military Temperature Range (-55 0 to 125°C)
IC MASTER
1983
54S11 74S11 HD74S11 DM54S11 DM74S11 54S11 74S11 SN54S11 SN14S11
54H09 74H09
TIL-LS 54LS09 74LS09 HD74LS09 M74LS09 SN54LS09 SN74LS09 DM54LS09 DM74LS09 DM74S09 54LS09 74LS09 54LS09 74LS09 S154LS09 SN14LS09 TTL-S
(731) (731) Quad 2-lnput TTL
t Fairchild Fairchild Mitsubishi t Motorola Motorola . t National National tSGS SGS t Signetics Signetics TI tTl t Fairchild Fairchild Hitachi t National National Signetics Signetics tTl TI
Source
Quad 2-lnput TIL
(Cont'd) TIL-LS 54LS11 74LS11 M74LS11 SN54LS11 SN74LS11 . DM54LS11 DM74LS11 54LS11 74LS11 54LS11 74LS11 SN54LSll SN74LSll
Device
line
Source
Triple 3-lnput
Dual4-lnput TIL-LS SN54LS21 SN74LS21 DM54LS21 DM74LS21 54LS21 74LS21 54LS21 74LS21 SN54LS21 SN14LS21
Device
Line
Source
Gates, AND (Cont'd)
TIL-H
Function
Function
Function
Line
(Cont'd) DM7408 5408 7408 SN540S SN140S
National Signetics Signetics tTl TI
SN54ALSoS SN54ALS516 SN14ALSoS SN14ALS516 DM54ALS08 DM54ALS576 DM74ALS08 DM74ALS576 SN54ALSoS SN54ALSlOoS SN14ALSoS SN14ALSlooS
t Molorola t Molorola Molorola Molorola t National t National National National tTl tTl TI TI
130
(S35) (S35)
TIL-ALS 70
(S36) (S36)
80
t
(S36) (S36)
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National tTl TI
(S36) (S36)
t Molorola Molorola tTl TI
(732) (132) (S36) (S36) 100
TIL-AS SN54ASoS SN14ASoS
tTl TI
TTL-F
54F08 74F08 MC54FoS MC14FoS 74F08
t Fairchild Fairchild t Molorola Molorola Signetics
54H08 74H08 MC3001 MC3101 DM54H08 DM74H08
t Fairchild Fairchild Motorola t Motorola t National National
TTL-H 90
t Fairchild Fairchild t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National National tSGS SGS t Signetics Signetics tTl tTl
(S36) (S36)
54S09 DM54S09 8154S09 SN14So9
t Fairchild t National tTl TI
(S36) 120 (S36)
5408 7408 ZN540B ZN7408 HD7408 MC5408 MC740B DM5408
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National (Continued)
110
TIL-LS 54LS08 74LS08 HD74LS08 M74LS08 SN54LS08 SN74LS08 DM54LS08 DM74LS08 54LS08 74LS08 54LS08 74LS08 SI54LSoS SN74LSOS
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
TTL-S
t Fairchild Fairchild t National National t Signetics Signetics tTl TI
54S08 74S08 DM54S08 DM74S08 54S08 74S0B SN54SoS SN14SoS
Hex 2-lnput Line Driver/Buffer TTL-ALS SN54ALSSOS SI14ALSSoS TTL-AS SN54ASB08 SN74ASB08
(132) (132) (132) (132) 140
(S35) (1015) (S35) (1015) (S35) (S35) 150 (131) (131)
Q)
170
::J (S35) (S35)
(9 C
0 -+-'
()
Q) Q)
CI) (S35) 180 (S35)
I.-
Q) -+-'
(j)
CU
tTl TI
(1003) (1003)
tTl TI
Gates, NAND Dual4-lnput Buffer TTL 5440 7440 ZN5440 ZN7440 HD7440 MC5440
"0
t Fairchild Fairchild t Ferranti Ferranti Hitachi 190 t Motorola (Continued)
• Typical Value Bold raclladlcal,s addllloaal dala Is provided oa Ib, pagl aOled.
489
~
Ie
MASTER
DIGIT AL-TTL (Cont'd) Function
Function Device
Source
Line
Gates, NAND (Cont'd) Dual4-lnput Buffer TIL MC7440 DM5440 DM7440 DM9009C 5440 7440 8N5440 8N7440
Dual 4-lnput, Open Collector TIl-lS 74LS22 HD74LS22 M74LS22 ' SN54LS22 SN74LS22 DM54LS22 DM74LS22 54LS22 74LS22 8N54L822 8N74L822
(Cont'd) Motorola t National National National tSignetics Signetics tTl TI
(845) (845)
8N54AL840 8N74AL840 8N54AL840 8N74AL840
t Moloroll Moloroll tTl TI
(732) (732) 10 (845) (845)
54H40 74H40 MC3024 MC3025 MC3124 MC3125 DM54H40 DM74H40 8N54H40 8N74H40
t Fairchild Fairchild Motorola Motorola t Motorola t Motorola t National National tTl TI
TIL-ALS
TIL-H
TIL-LS 54LS40 74LS40 HD74LS40 M74LS40 SN54LS40 SN74LS40 DM54LS40 DM74LS40 54LS40 74LS40 54LS40 74LS40 8N54L840 8N74L840 TIL-S
Q)
"0 :::J
(9 C
0 ........ ()
Q) Q)
(J) ~
Q)
........ (f)
ct:S
54S40 74S40 HD74S40 DM54S40 DM74S40 54S40 74S40 8N54840 8N74840
Dual4-lnput, Open Collector TIL 5422 7422 HD7422 8N5422 8N7422
~
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National t SGS SGS . t Signetics Signetics tTl TI t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
TIL-LS
20 (845) (845)
30
490
Source
Line
(Cont'd) Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS ttl TI
54S22 74S22 HDs4S22 DM54S22 DM74S22 8N54822 8N74822
t Fairchild Fairchild Hitachi t National National tTl TI
5420 7420 ZN5420 ZN7420 HD7420 MC5420 MC7420 DM5420 DM7420 DM9004C 5420 7420 8N5420 8N54L20 8N7420
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National National t Signetics Signetics tTl tTl TI
8N54AL820 8N74AL820 8N54AL81 020 8N54AL820 8N74AL81 020 8N74AL820
t Moloroll Moloroll tTl tTl TI . TI
Device
(845) (845)
40
TIL-AS 8N54A820 8N74A820
tTl TI
TIL-F
54F20 74F20 MC54F20 MC74F20 54F20 74F20
t Fairchild Fairchild t Moloroll Moloroll t Signetics Signetics
54H20 74H20 MC3010 MC3110 DM54H20 DM74H20 8N54H20 8N74H20
t Fairchild Fairchild Motorola t Motorola t National National tTl TI
(845) (845) TIL-H
(840) (840) 50
8N54AL822 8N74AL822 8N54AL822 8N74AL822
t Moloroll Moloroll tTl TI
(732) (732) (840) (840)
54H22 74H22 MC3012 MC3112 DM54H22 DM74H22 8N54H22 8N74H22
t Fairchild Fairchild Motorola t Motorola t National National tTl TI
54LS22
t Fairchild (Continued)
60 (840) (840)
TIL-LS 54LS20 74LS20 HD74LS20 M74LS20 SN54LS20 SN74LS20 DM54LS20 DM74LS20 54LS20 74LS20 54LS20 74LS20
Source
Dual 4-lnput TIl-lS
TIL-S
70
(840) (840) Dual 5-lnput TIL
(840) 80 (840)
8N54L820 8N74L820
ttl TI
54S20 74S20 HD74S20 DM54S20 DM74S20 54S20 74S20 8154820 8N74820
t Fairchild Fairchild Hitachi t National National t Signetlcs Signetlcs ttl TI
DM7092 DM8092
t National National
Triple 3-lnput, Open Collector TIL 5412 7412 ZN5412 ZN7412 HD7412 8N5412 SN7412
Line
(Cont'd) (839) (839)
(839) 140 (839)
t Fairchild Fairchild t Ferranti Ferranti HitachI tTl TI
(837) 150
TIL-ALS
90
8N54AL812 8N74AL812 8N54AL812 8N74AL812
t Moloroll Molaroll ttl TI
TIL-H
MC3007 MC3107
Motorola t Motorola
TIL-LS
HD74lS12 M74lS12 SN54LS12 SN74LS12 DM54LS12 DM74LS12 8N54L812 8N74L812
Hitachi Mitsublshl t Motorola Motorola t National National tTl TI
(839) (839) (839)
TIl-ALS
t Fairchild Fairchild Hitachi ttl TI
t Military Temperature Range (- 55° to 125°C)
TIL-S
Dual4-lnput TIL
TIL-ALS
TIL-H
Function Device
(732) (732) (1016) TIL-S (839) 100 (1016) Triple 3-lnput (839) TIL (839) (839)
(731) (731) 110
(839) (839)
t Fairchild Fairchild 120 Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics 130 (Continued)
HD74S12
Hitachi
5410 7410 ZN5410 ZN7410 HD7410 MC5410 MC54F10 MC7410 DM5410 DM7410 DM9003C 5410 7410 8N5410 8N54L10 8N7410
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola t Molarall Motorola t National National National t Signetics . Signetics ttl tTl TI
8N54AL810 8N74AL810 8N54AL810 8N54AL81010 8N74AL810 8N74AL81010
t Moloroll Maloroll tTl tTl TI TI
(732) (732) (837) (837)
160
(837) (837)
170 (731)
(836) (836) 180 (836)
TIL-ALS (732) (732) (836) (1015) (836) (1015)
TIL-AS 8N5U810 8N74A810
tTl TI
TIl-F
t Fairchild 190 Fairchild Moloroll (731) Signetics (Continued)
54F10 \ 74F10 MC74F10 74F10
(836) (836)
• Typical Value Bold 'ICI lodlcilis Iddlllonil dill Is provldld 00 I~I PIUI 1011d. (C)
IC MASTER
1983
MASTER SELECTION GUIDE DIGIT AL-TTL (Cont'd) Device
Source
Gates, NAND (Cont'd)
Quad 2-lnput Buffer, Open Collector TIl-S 74S38 SN54S38 SN74S38
(Cont'd)
t Fairchild
54Hl0 74Hl0 MC3005 MC3105 OM54Hl0 OM74Hl0 SN54H10 SN74H10
Fairchild Motorola t Motorola t National National tTl TI
TIl-lS 54lS10 74lS10 H074lS10 M74lS10 SN54lS10 SN74lS10 OM54lS10 OM74lS10 54LS10 74lS10 54lS10 74lS10 SN54LS10 SN74LS10
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
TTl-S
t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
54S10 74S10 H074S10 OM54S10 OM74S10 54S10 74S10 SN54S10 SN74S10
Quad 2-lnput Buffer, Open Collector TTL 5438 7438 7439 ZN5438 ZN7438 H07438 MC5438 MC7438 OM5438 OM7438 5439 7438 7439 SN5438 SN5439 SN7438 SN7439
t Fairchild Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetics Signetics tTl tTl TI
TI
Quad 2-lnput, Buffer, Three-State OM7099 TIL OM8099 Quad 2-lnput Buffer TIL 5437 7437 20 ZN5437 (836) ZN7437 (836) H07437 MC5437 MC7437 OM5437 OM7091 OM7437 OM8091 5437 (836) 30 7437 (836) SN5437 SN7437
t Moloroll Moloroll tTl
TI
TTl-lS 54lS38 74lS38 H074lS38 M74lS38 SN54lS38 SN74lS38 OM54lS38 OM74lS38 54lS38 74lS38 SN54lS38 SN74LS38 TIl-S
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National t Signetics Signetics tTl TI
t Military Temperature Range (- 55° to 125°C)
olC MASTER
1983
Signetics tTl TI
t National National t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National t National National National t Signetics Signetics tTl TI
SN54ALS37 SN74ALS37 SN54ALS37 SN74ALS37
40
(844) (844) (844) (844) (732) (732) 50 (844) (844)
t Molorola Moloroll tTl TI
TIl-lS 54lS37 74lS37 H074lS37 M74lS37 SN54lS37 SN74lS37 OM54lS37 OM74lS37 54lS37 74lS37 54lS37 74LS37 SN54lS37 SN74LS37
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
TIl-S
t Signetics Signetics tTl
54S37 74S37 SN54S37 SN74S37
TI
Device
Quad 2-lnput, Open Collector (Cont'd) TIL MC5403 (844) MC7401 MC7403 (844) OM5401 OM5403 OM7401 70 OM7403 OM9012C 5403 7403 SN5401 SN5403 SN54L03 SN7401 (841) SN7403 (841) TIl-AlS SN54ALS01 80 SN54AlS03 SN74ALS01 SN74ALS03 SN54ALS01 SN54ALS03 SN54ALS1003 SN74ALS01 SN74ALS03 SN74ALSl003 TIl-H 90
(844) (844)
TIl-AlS
Quad 2-lnput, Open Collector TIL 5401 5403 7401 7403 ZN5401 60 ZN5403 ZN7401 ZN7403 (844) H07401 (844) H07403 MC5401 t Signetics (Continued)
54S38
' Line
Source
Quad 2-lnput Buffer, Open Collector, to 15 V TIl-lS 54lS26 t Fairchild 74lS26 Fairchild SN54lS26 t Motorola SN74lS26 Motorola (836) OM54lS26 t National (836) OM74lS26 National T74lS26 SGS 10 54lS26 t Signetics 74lS26 Signetics SN54lS26 tTl SN74LS26 TI
TIl-AlS SN54ALS38 SN74ALS38 SN54ALS38 SN74ALS38
Device
Line
Triple 3-lnput TIl-H
Function
Function
Function
(732) (732) (844) (844) 100
110
(844) (844)
(844) (844)
54HOl 74HOl MC3004 MC3104 OM54HOl OM74HOl SN54H01 SN74H01
TIl-lS 54lS03 74lS03 H074lS01 H074lS03 M74lS03 SN54lS01 SN54lS03 SN74lS01 SN74lS03 OM54lS01 OM54lS03 OM74lS01 OM74lS03 54lS03 74lS03 54lS01 54lS03 74lS01 SN54lS01 SN54lS03 SN74lS01 SN74lS03 TIl-S
t Fairchild t Fairchild 120 Fairchild Fairchild t Ferranti t Ferranti Ferranti Quad 2-lnput Ferranti TIL Hitachi Hitachi t Motorola (Continued)
Source
Line
(Cont'd)
t Motorola Motorola Motorola t National t National National National National t Signetics Signetics tTl tTl tTl
TI TI t Molorola t Motorola Molorola Molorola tTl tTl tTl
TI TI TI t Fairchild Fairchild Motorola t Motorola t National National tTl
TI t Fairchild Fairchild Hitachi Hitachi Mitsubishi t Motorola t Motorola Motorola Motorola t National t National National t National tSGS tSGS t Signetics t Signetics Signetics tTl tTl tTl tTl
130
(833) 140 (834) (834) (833) (834) (732) (732) (732) (732) (833) (834) 150 (1014) (833) (834) (1014)
(833) (833)
170
:J
CJ C
0 +oJ
() (]) (])
180 (833) (834) (833) (834)
74S03 H074S03 OM54S03 OM74S03 54lS38 74lS38 74S03 SN54S03 SN74S03
Fairchild Hitachi t National National tSGS SGS Signetics tTl
5400 7400 ZN5400 ZN7400
t Fairchild Fairchild t Ferranti Ferranti (Continued)
TI
(])
"'0
C/) ~
(]) +oJ
en
CO ~
190 (834) (834)
• Typical Value Bold flclladlcllas Iddltlonll dill II provldld on Ibl pigi nOlld.
491
Ie
MASTER
DIGIT AL-TTL (Cont'd) Function
Function Source
Device
line
Gates, NAND (Cont'd) Quad 2-lnput TIL HD7400 MC5400 MC7400 DM5400 DM7400 DM9002C 5400 7400 8N5400 8N7400
(Cont'd) Hitachi t Motorola Motorola t,National National National t Signetics Signetics (833) tTl ' (833) 10 TI
8N54AL800 8N74AL800 DM54ALSOO DM74ALSOO 8N54AL800 8N54AL81 000 8N74AL800 8N74AL81000
t Malaroll Malara II t National National tTl tTl TI TI
(833) (833) 20
TIL-F
54FOO 74FOO MC54FOO MC74FOO 54FOO 74FOO
t Fairchild Fairchild t Maloroll Malara II Signetics Signetics
(731) (731)
54HOO 74HOO MC3000 MC3100 DM54HOO DM74HOO 8N74HOO
t Fairchild Fairchild Molaroll t Molaroll t National National TI
54LSOO 74LSOO HD74LSOO M74LSOO SN54LSOO SN74LSOO DM54LSOO . DM74LSOO 54LSOO 74LSOO 54LSOO 74LSOO 8N54L800 8N74LSOO
t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
54S00 74S00 HD74S00 DM54S00 DM74S00 54S00 74S00 8N54800 8N74800
t Fairchild t Fairchild Hitachi t National National t Signetlcs Signetics tTl TI
Q)
:::J
C) C
0
..U
Q) Q)
TIL-S
~
Q)
..(J) CU
~
Hex 2-lnput Line Driver/Buffer TIL-ALS 8N74AL8804 TIL-AS SN54A8804 8N74A8804 a-Input TIL
5430 7430 ZN5430 ZN7430
TI tTl TI
(833)
Hitachi t Motorola . Motorola t-National National t Signetics Signetlcs tTl , tTl TI
8N54AL830 8N74AL830 TIL-AS 8N54A830 8N74A830
tTl TI
(842) (842)
TIL-H
t Fairchild Fairchild Motorola Motorola t Motorola t Motorola t National National tTl TI t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
TIL-S
t Fairchild Fairchild t National National tTl TI
54S30 74S30 DM54S30 DM74S30 ~N54830
8N74830 12-lnput, Three-State TIL-S 54S134 74S134 HD74S134 (833) DM54S134 (833) DM748134 548134 74S134 50 8N548134 8N748134
t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
13-lnput TIL-ALS 8N54ALS133 SN74AL8133
(833) (833)
(1002) (1002) (1002)
tTl TI
(Cont'd) t National National t Signetics Signetlcs tTl TI
130
(877) (877)
Gates, AND-OR 2-2-2-3-lnput, Expandable TIL-H 54H52 74H52 MC3031 MC3131 DM54H52 DM74H52 SN54H52 SN74H52
t Fairchild Fairchild Motorola t Motorola t National National tTl TI
140
80
Gates, AND-OR-Invert Dual2-Wide 2-lnput (one gale Is expandable) TIL 5450 t Fairchild 7450 Fairchild ZN5450 t Ferranti (842) ZN7450 Ferranti (842) HD7450 Hitachi MC5450 t Motorola MC7450 Motorola 90 DM5450 t National DM7450 National DM9005C National 5450 .t Signetics 7450 Signetics SN5450 tTl SN7450 TI TIL-H (842) 100 (842)
54H50 74H50 MC3020 MC3120 DM54H50 DM74H50 8N54H50 8N74H50
(842) (842)
Dual2-Wlde 2-lnput TIL 5451 7451 ZN5451 ZN7451 HD7451 110 MC5451 MC7451 DM5451 DM7451 5451 (877) 7451 (877) 8N5451 8N54L51 SN7451 (877) (877) TIL-H 54H51 74H51 MC3023 120 MC3123 DM54H51 DM74H51 SN54H51 8N74H51
TIL-LS 54LS133 74LS133 M74LS133 SN54LSl33 SN74LS133 54LS133 74LSl33
t Fairchild Fairchild Mitsublshi t Motorola Motorola tSGS SGS
TIL-S
t Fairchild Fairchild Hitachi (Continued)
54S133 748133 HD74S133
line
70 (842) (842) (842)
tTl TI
TIL-LS 54LS30 74LS30 HD74LS30 M74LS30 SN54LS30 SN74LS30 DM54LS30 DM74LS30 54LS30 74LS30 54LS30 74LS30 8N54LS30 8N74LS30
Source
DM54S133 DM74S133 54S133 74S133 8N548133 8N74S133
(842) (842)
54H30 74H30 MC3015 MC3016 MC3115 MC3116 DM54H30 DM74H30 8N54H30 8N74H30
Device
13-lnput TIL-S
TIL-ALS
40
60 t Fairchild Fairchild t Ferranti Ferranti (Continued)
t Military Temperature Range (- 55°. to 125°C)
492
(729) (729) 30
line
(COnrd) HD7430 MC5430 MC7430 DM5430 DM7430 5430 7430 8N5430 8N54L30 8N7430
(833) (1013) (833) (1013)
tTl TI
"0
(f)
(732) (732)
TIL-AS 8N54A800 8N74ASOO
TIL-LS
Source
8-lnput TIL
TIL-ALS
TIL-H
Function Device
TIL-LS 54LS51 74LS51 HD74LS51
t Fairchild Fairchild Motorola t Motorola t National National tTl TI t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetlcs tTl tTl TI
150
(848) (848)
160
(848) (848)
170
(848) (848) (848)
t Fairchild Fairchild 180 Motorola t Motorola t National National (848.849) tTl (848.849) TI t FairChild FairChild Hitachi (Continued)
* Typical Value Bald flclladlcllas Iddlllonil dill Is provldld on Ibl pigi aOlld_
~
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-TTL (Cont'd) Function
Function Device
Source
Gates, AND-OR-Invert (Cont'd) Dual 2-Wide 2-lnput TIL-LS SN54LS51 SN74LS51 DM54LS51 DM74LS51 LS5451 LS7451 54LS51 74LS51 8N54L851 8N74L851 TIL-S
54S51 74S51 DM54S51 DM74S51 54S51 74S51 8N54851 8174851
2-2-2-3-lnput, Expandable TIL-H 8N54H53 8N74H53
(Cont'd) t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
(848) (848)
t Fairchild Fairchild t National National t Signetics Signetics tTl
Function Device
Line
4-Wide 2-lnput TIL 5454 7454 ZN5454 ZN7454 HD7454 MC5454 MC7454 10 DM5454 DM7454 8N5454 8N54L54 8N7454
4-Wide 2-lnput, Expandable TIL 5453 (848) 7453 TI (848) ZN5453 Dual4-lnput Expander (for 5417423,54/7450, 5417453) ZN7453 TIL 5460 t Fairchild HD7453 7460 Fairchild 20 MC5453 Hitachi HD7460 MC7453 MC5460 t Motorola DM5453 MC7460 Motorola DM7453 DM5460 t National National DM7460 8N5453 5460 t Signetics 8N7453 8N5460 tTl (852) 4-Wide 2-2-3-3-lnput TI (852) 8N7460 TIL-LS 54LS54 Dual4-lnput Extender (for 9005, 9008) 74LS54 TIL DM9006C National HD74LS54 2-Wide, 4-lnput SN54LS54 TI (851) 30 TIL 8N54L55 SN74LS54 TIL-LS 54LS55 t Fairchild DM54LS54 74LS55 Fairchild DM74LS54 HD74LS55 Hitachi 54LS54 SN54LS55 t Motorola 74LS54 SN74LS55 Motorola 54LS54 DM54LS55 t National 74LS54 DM74LS55 National 8N54L854 54LS55 t SGS 8N74L854 74LS55 SGS tTl (851) 40 8N54L855 8N74L855 TI _ _ _(851) 4-2-3-2-lnput _____ ______ TIL-F 54F64 ~
2-Wide, 4-lnput, Expandable TIL-H 54H55 74H55 DM54H55 DM74H55 8N54H55 8N74H55 2-2-2-3-lnput TIL-H
54H54 74H54 DM54H54 DM74H54 8N54H54 8N74H54
2-2-2-3-lnput, Expandable TIL DM9008C TIL-H 54H53 74H53 MC3032 MC3132 DM54H53 DM74H53
t Fairchild Fairchild t National National tTl TI t Fairchild Fairchild t National National tTl
TI
50 (850) (850)
National t Fairchild Fairchild Motorola t Motorola t National National 60 (Continued)
, t Military Temperature Range (- 55° to 125°C)
() IC MASTER
TIL-S
1983'
tTl TI
(Cont'd) (849) (849)
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National tTl
tn TI t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National tTl TI t Fairchild Fairchild Hitachi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
54F64 54S64 74S64 HD74S64 DM54S64 DM74S64 54S64 74S64 8N54864 8N74864
t Fairchild t Fairchild Hitachi t National National t Signetics t Signetics TI TI
4-2-3-2-lnput, Open Collector TIL-S 74S65 HD74S65 DM54S65 DM74S65 54S65 8N54865 8N74865
Line
Device
Source
Line
5432 7432 ZN5432 ZN7432 HD7432 DM5432 DM7432 5432 7432 8N5432 8N7432
t Fairchild Fairchild t Ferranti Ferranti Hitachi t National National t Signetics Signetics tTl TI
120
8N54AL832 8N74AL832 DM54ALS32 DM74ALS32 8N54AL81 032 8N54AL832 8N74AL81032 8N74AL832
t Motorola Motorola t National National tTl tTl
54F32 74F32 MC54F32 MC74F32 74F32
t Fairchild Fairchild t Motorola Motorola Signetics
MC3003 MC3103
Motorola t Motorola
Gates, OR
t Fairchild Fairchild t Motorola Motorola t Signetics
74F64 MC54F64 MC74F64
(851) (851)
Source
t t t t t
Fairchild Hitachi National National Signetics
tTl tTl
Quad 2-lnput TIL
70
(843) (843) 130
TIL-ALS (850) (850) (850)
TIL-F 80
TIL-H (849) (849)
90
(850) (850)
100 (731) (731)
TI TI
TIL-LS 54LS32 74LS32 HD74LS32 M74LS32 SN54LS32 SN74LS32 DM54LS32 DM74LS32 54LS32 74LS32 54LS32 ' 74LS32 8N54L832 8N74L832
t Fairchild F,airchild Hitachi Mitsubishi t Motorola Motorola t National National 1 tSGS SGS t Signetics Signetics tTl TI
TIL-S
t Fairchild Fairchild t National National t Signetics Signetics tTl TI
54S32 74S32 DM54S32 DM74S32 54S32 74S32 8N54832 8N74832
Hex 2-lnput Line Driver/Buffer TIL-ALS 8N54AL8832 8N74AL8832 TIL-AS SN54AS832 SN74AS832
(732) (732)
(1016) (843) (1016) (843) 140 (731) (731)
(843) (843) 160
-+-'
()
(843) (843)
Q) Q)
(f) tTl tTl tTl TI
~
(1004) (1004)
Q) -+-'
CJ)
170'
~
Gates, NOR 110 Dual4-lnput, with Strobe (853) TIL 5425. (853) 7425 ZN5425 ZN7425 HD7425 MC5425 MC7425 DM5425 DM7425 (853) 5425 (853)
CO
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National 180 t Signetics (Continued)
* Typical Value Bold faca Indicates addlllonal data Is provided on the paue notad.
493
Ie
MASTER
DIGITAL-TTL (Cont'd) Function
Function Device
Source
Line
Gates, NOR (Cont'd) DuaI4-lnput, with Strobe TTL 7425 SN5425 SN7425
SN54LS27 SN74LS27
(Cont'd) Signetlcs tTl TI
(841)
Dual 5-lnput TTL-ALS SN54ALS260 TTL-LS 54LS260 74LS260 SN54LS260 SN74LS260 T54LS260 T74LS260 54LS260A 74LS260 SN54LS260A
tTl t Fairchild Fairchild t Motorola Motorola tSGS SGS t Signetics Signetics tTl
TTL-S
54S260 74S260 DM74S260 54S260 74S260 8N54S260 SN748260
t Fairchild Fairchild National t Signetics Signetics tTl TI
5427 7427 ZN5427 ZN7427 HD7427 MC5427 MC7427 DM5427 DM7427 5427 7427 SN5427 8N7427
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetics tTl TI
(842) (842)
SN54ALS27 8N74AL827 8N54AL827 8N74AL827
t Matarala Molorola tTl TI
(732) (732) (842) (842)
tTl TI
(842) (842)
Q)
"0 :::J
(!J C
0
...... ()
Q) Q)
Quad 2-lnput Buffer, Open Collector TTL 5433 7433 SN5433 SN7433
)....
Q) ...... en
CO
~
TTL-AS SN54A827 8N74A827 TTL-LS 54LS27 74LS27 HD74LS27 M74LS27 SN54LS27 SN74LS27 DM54LS27 DM74LS27 54LS27 74LS27 54LS27 74LS27
494
(Cont'd) (842) (842)
t Signetics Signetics tTl TI
(843) (843)
SN54ALS33 SN74ALS33 SN54ALS33 8N74AL833
t Motorola Motorola tTl TI
(732) (732) (843) (843)
TTL-LS 54LS33 74LS33 SN54LS33 SN74LS33 T54LS33 T74LS33 54LS33 74LS33 SN54LS33 SN74LS33
t Fairchild Fairchild t Motorola Motorola tSGS SGS t Signetlcs Signetics tTl TI
Quad 2-lnput (54n428 devices are also buffers) TTL 5402 t Fairchild 7402 Fairchild 20 ZN5402 t Ferranti ZN5428 t Ferranti ZN7402 Ferranti ZN7428 Ferranti HD7402 Hitachi MC5402 t Motorola MC7402 Motorola DM5402 t National DM7402 National (918) 5402 t Signetics (918) 5428 t Signetics 7402 Signetics 30 7428 Signetics SN5402 tTl 8N5428 tTl 8N7402 TI 8N7428 TI 8N54AL802 SN54AL828 8N74ALS02 8N74AL828 DM54ALS02 DM74ALS02 SN54AL802 8N54AL81 002 SN54AL828 8N74AL802 8N74AL81 002 8N74AL828
40
t Motorola
t Molarala
Motorola Motorola t National National tTl tTl tTl TI TI TI
TIL-AS 8N54A802 8N74A802
tTl TI
TTL-F
t Fairchild Fairchild t Motorola Motorola Signetics
54F02 74F02 MC54F02 MC74F02 74F02
TIL-LS 54LS02 54LS28 74LS02 74LS28 HD74LS02 M74LS02 SN54LS02
Device
Source
Line
Quad 2-lnput (54n428 devices are also buffers) TTL-LS (Cont'd) SN54LS28 t Motorola SN74LS02 Motorola SN74LS28 Motorola DM54LS02 t National DM74LS02 National 130 54LS02 tSGS 74LS02 SGS T54LS28 tSGS T74LS28 SGS 54LS02 t Signetlcs 54LS28 t Signetics 74LS02 Signetlcs 70 SN54LS02 (833) tTl 8N54LS28 (842) tTl 8N74L802 (833) 140 TI SN74LS28 TI (842) TTL-S
(843) (843) 80
Quad 2-lnput TTL-H
90
t Fairchild
54S02 74S02 HD74S02 DM54S02 DM74S02 54S02 74502 SN54S02 SN74S02
Fairchild Hitachi t National National t Signetics Signetics tTl TI
MC3002 MC3102
Motorola t Motorola
Hex 2-lnput line Driver/Buffer TTL-ALS SN54ALS805 SN74ALS805 TTL-AS SN54AS805 SN74AS805
tTl TI
(833) (833) 150
(1003) (1003)
ttl TI
Gates, ORINOR (833) (842) (833) (842)
TIL-ALS
t Fairchild Fairchild 50 Hitachi Mitsublshi t Motorola Motorola t National ' National tSGS SGS t Signetics Signetics 60 (Continued)
t Military Temperature Range (- 55° to 125°C)
tTl TI
Line
TTL-ALS
TIL-ALS
(f)
Source
Triple 3-lnput TTL-LS
DuaI4-lnput, with Strobe, Expandable (see 54n460 expander) TTL 5423 t Fairchild 7423 Fairchild Hitachi HD7423 MC5423 t Motorola MC7423 Motorola DM5423 t National DM7423 National 10 (840) 8N5423 tTl (840) SN7423 TI
Triple 3-lnput TTL
Function Device
(732) 100 (732) (732) (732)
Quad 2-lnput TTL-S
54S135 74S135 HD74S135 . DM54S135 DM74S135 54S135 74S135 8N548135 8N748135
t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
(878) (878)
Hitachi t Motorola Motorola Signetics tTl TI
(878) 170 (878)
160
Gates, Exclusive OR
(833) (1013) Quad 2-lnput, Open Collector (842) TIL HD74136 (833) MC54136 (1013) 110 MC74136 (842) S8241 8N54136 (833) 8N74136 (833)
(731) (731)
t Fairchild 120 t Fairchild Fairchild Fairchild Hitachi Mitsubishi t Motorola (Continued)
TTL-LS 54LS136 74LS136 HD74LS136 M74LS136 SN54LS136 SN74LS136 DM54LS136 DM74LS136 54LS136 74LS136 54LS136 . 74LS136
Fairchild Fairchild Hitachi Mltsublshl t Motorola Motorola t National National 180 tSGS SGS t Signetics Signetics (Continued)
* Typical Value Bold 'acllndlcatls additional dall Is provided on Ibe pigi nOlld. CO
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-TTL (Cont'd) Function
Function
Function Device
line
Source
Device
Gates, Exclusive OR (Cont'd)
Gates, Exclusive NOR
Quad 2-lnput, Open Collector TIL-LS SN54LS136 SN74LS136
Quad 2-lnput, Open Collector TIL 9386C 9386M MC7242 MC8242 RC8242 RM8242 9386 N8242
TIL-S
tTl TI
DM54S136 DM74S136 N82S41
(Cont'd) (878) (878)
t National National Signetics
Quad 2-lnput, Totem Pole Outputs TIL 5486 7486 ZN5486 ZN7486 HD7486 MC5486 MC7241 MC7486 MC8241 DM5486 DM7486 DM74LS386 RC8241 RM8241 5486 7486 SN5486 SN7486
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola Motorola t Motorola National National National Raytheon t Raytheon t Signetics Signetics tTl TI
10
TIL-S
Quad 2-lnput TIL-H
tTl
54F86 74F86 MC54F86 MC74F86 54F86 74F86
t Fairchild Fairchild t Motoroll Motoroll t Signetics Signetics
TI
Quad 2-lnput TIL-H
(862) (862)
tTl tTl TI TI
54S86 74S86 HD74S86 DM74S86 54S86 74S86 SN54S86 SN74S86
t Fairchild Fairchild Hitachi National t Signetics Signetics tTl TI
MC3021 MC3121
Motorola t Motorola
IC MASTER
(862) (862)
N82S42
Signetics
MC3022 MC3122
Motorola t Motorola
1983
Dual Majority Logic TIL MC4062
80 (918) (918)
30
(942) (862) (942) (862)
(862) (862)
Motorola
Quad Inverter and Dual2-lnput NAND TIL DM7090 t National DM8090 National
(731) (731)
Fairchild Hitachi Hitachi Mitsubishi Mitsubishi t Motorola t Motorola Motorola Motorola t National t National National tSGS SGS t Signetics Signetics
t Military Temperature Range (- 55° to 125°C)
~
Fairchild t Fairchild Motorola t Motorola Raytheon t Raytheon Signetics Signetics t Fairchild Fairchild Mitsubishi t Motorola Motorola t National National tSGS SGS Signetics t Signetics tTl TI
Device
Source
Quad Bistable, Complementary Outputs TIL 5475 t Fairchild 7475 Fairchild ZN5475 t Ferranti ZN7475 Ferranti HD7475 Hitachi MC5475 t Motorola Motorola MC7475 DM5475 t National DM7475 National 5475 t Signetics 70 Signetics 7475 SN5475 tTl SN7475 TI
Gates, Miscellaneous . SN54ALS86 SN74ALS86
TIL-LS 74LS86 HD74LS386 HD74LS86 M74LS386 M74LS86 SN54LS386 SN54LSSB SN74LS386 SN74LS86 DM54LS386 DM54LS86 DM74LS86 54LS86 74LS86 54LS86 74LS86 SN54LS386 SN54LS86 SN74LS386 SN74LS86 TIL-S
line
201---------------------~---------
TIL-ALS
TIL-F
TIL-LS 54LS266 74LS266 M74LS266 SN54LS266 SN74LS266 DM54LS266 DM74LS266 54LS266 74LS266 N8242 S8242 SN54LS266 SN74LS266
Source
Latches
TIL-LS 54LS375 74LS375 HD74LS375 M74LS375 M74LS75 SN54LS375 SN54LS75 SN74LS375 SN74LS75 DM54LS75 DM74LS75 54LS375 54LS75 74LS375 74LS75 SN54LS375 SN54LS75 SN74LS375 SN74LS75 Quad Bistable, Single Output TIL 5477 MC5477 MC7477 SN5477
Dual4-Bit Addressable TIL-LS 54LS256 t Fairchild TIL-LS DM54LS377 74LS256 Fairchild 90 DM74LS77 M74LS256 Mitsubishi SN54LS77 SN54LS256 t Motorola Quad Multifunction SN74LS256 Motorola TIL 9314C T54LS256 t SGS 9314M n 4LS256 SGS . MC8314 401 _________7_4_L_S2_5_6________S~ig_ne_ti_cs______ MC9314 Dual 4-Bit with Clear S9314 TIL 9308C Fairchild Quad Set-Reset 9308M t Fairchild TIL 54279 Motorola MC8308 74279 Raytheon 100 RC9308 HD74279 54116 t Signetics 54279 Signetics 74116 74279 TI SN29308 SN54279 SN39308 ·tTI SN74279 SN54116 (872) tTl 50 (872) SN74116 TI TIL-LS 54LS279 74LS279 Dual4-Bit HD74LS279 TIL MC54100 t Motorola M74LS279 MC74100 Motorola SN54100 (867) SN54LS279 tTl (867) 110 SN74100 TI SN74LS279 DM54LS279 TIL-ALS DM74LS279 SN54ALS873 (732) t Malorola 54LS279 SN74ALS873 Motorola (732) 74LS279 DM54ALS873 t National 54LS279 National DM74ALS873 SN54LS279 60 (1008) SN54ALS873 tTl SN74LS279 SN74ALS873 TI (1008)
Line
120
(858) (858)
t Fairchild Fairchild Hitachi Mitsubishi Mitsubishi t Motorola t Motorola Motorola Motorola t National National t Signetics t Signetics Signetics Signetics tTl tTl' TI TI
(938) (858) (938) (858)
t Fairchild t Motorola Motorola tTl
(859)
t National National tTl
(859)
130
Fairchild t Fairchild Motorola t Motorola t Signetics t Fairchild Fairchild Hitachi t Signetics Signetics tTl TI t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics tTl TI
160
+-'
() Q)
Q)
en (921) (921)
170
(921) (921) 180
* Typical Value 80ld 'ICI ladlcltlS ddltloDlI dill Is provldld oa tbe PIUI aotld.
495
Ie MASTER DIGITAL-TTL (Cont'd) Function
Function Device
line
Source
Latches (Cont'd) Hex Set-Reset TTL
ZN54118 ZN54119 ZN74118 ZN74119
Octal Transparent, Inverting TTL-ALS SI54ALS880 SI74ALS880 OM54ALS880 OM74ALS880 SI54ALS880 SI74ALS880
~
= ~ r.: Q.)
"0 :J
(!J C
0
~
0 Q.) Q.)
(J) "-
Q.)
~
en
CU
~
Source
8-Bit, Transparent, 0 Type, Three-State TTL-AS SN54AS373 SN74AS373
t Ferranti t Ferranti Ferranti Ferranti
t Motorola Molorola tNational National tTl TI
Octal2-lnput Multiplexed, Three-State Outputs TTL-LS SI54LS604 tTl S154LS605 tTl SI54LS606 tTl S154LS607 tTl SN54LS608 tTl SI74LS604 TI SI74LS605 TI S174LS606 TI SI74LS607 TI S174LS608 TI 6-Blt (Independent 2 and 4-Blt) TTL-S 3404 8T3404
Function Device
Intel Signetics
TTL-F
(732) (732)
(1011) (1011) 10 (973) (973) (973) (973) (974) (973) (973) (973) (973) (974) 20
54F373 74F373 MC54F373 MC74F373 54F373 74F373
TTL-LS AM25LS373C AM25LS373M S154LS373 SI74LS373 74LS373 74LS573 M74LS373 S154LS373 S174LS373 SN54LS373 SN54LS573 SN74LS373 SN74LS573 OM54LS373 OM74LS373 T74LS373 54LS363 54LS373 74LS363 74LS373 8TS805 8TS807 S154LS373 SN74LS373
tTl TI t Fllrcblld Falrcblld t Molorola Motorola t Signetics Signetics AMD tAMD tAMD AMD Fairchild Fairchild Mltsublshl tMMI MMI t Motorola t Motorola Motorola Motorola t National National SGS t Signetics t Signellcs Signetics Slgnlllcs Sigalllcs Slgnlllcs tTl TI
line
Device
Source
Une
8-Blt, Transparent, O-Type,lnverting Three-State (Cont'd) TTL-F (Cont'd) 54F533 60 t Signetics 74F533 Signetics TTL-LS S154LS533 SI74LS533 74LS533 S154LS533 SI74LS533
(632) (632) (731) (731)
TTL-S (1227) (1227) (1227) 70 (1227)
SI54S533 . SI74S533 SI54S533 SI74S533 SI74S535
tAMD AMD Fairchild tMMI MMI
(1227) (1227)
tAMD AMD tMMI MMI MMI
(1227) (1227) (715) (715) (715)
130 (715) (715)
8-Blt, Transparent OoType, Three-State (bus Interface) TTL AM29845 AMD (2807) (2607) AM29846 AMD (715) (715)
8-Blt, Three-State (Input and output through the same pins) TTL OM7553 t National OM8553 National 80
(783)
140
9-BIt, Transparent OoType, Three-State (bus Interface) TTL AM29843 AMD (2607) AM29844 AMD (2607) 10-Blt, Transparent OoType, Three-State (bus Interface) TTL AM29841 AMD (2607) AM29842 AMD (2607)
Memories
(783) For addltlonallntormatlon on these and larger TTL (793) Fairchild compatible memories, see the Master Selection Gulde(799) t Fairchild (937) 90 Memory section t National (937) Dual Rank 8-Blt Shift Register (8-Blt 1/0 buffer, "0" National register, and serial "B" register) TTL-S SI54S373 (1227) tAMD National TTL-LS OM74LS62 t National SI74S373 AMD (1227) t National OM76LS52 .t National (715) SI54S373 Signetics tMMI OM86LS52 National SN54S531 30 tMMI t Signetlcs OM86LS62 National 150 (715) SI74S373 MMI (917) tTl Dual 16-Word x 4-Blt Register File SN74S531 MMI (715) (917) TI TTL-AS SI54AS870 (1006) tTl OM54S373 t National TTL-ALS S154AS871 (1007) tTl National OM74S373 SI54ALS259 (917) tn SI74AS870 TI (1006) 54S373 Signetics 100 (917) SI74ALS259 TI SI74AS871 (1007) TI 74S373 Signetlcs TTL-LS 54LS259 t Fairchild Octal Storage Register (two stage, 4-Blt wide shift SI54S373 (937) tTl 74LS259 Fairchild register) (945) S1548412 tTl M74LS259 Mitsubishl TTL-LS SN54LS396 (944) tTl (937) SI74S373 TI SN.54LS259 t Motorola (944) SI74LS396 TI (945) S1748412 TI SN74LS259 Motorola 8-Blt Multipart Register (RAM with simultaneous readl 8-Blt, Transparent, O-Type,lnverting Three-State OM54LS259 40 t National write) TTL-ALS OM74LS259 National TTL 9338C Fairchild SI54ALS533 (732) t Molorola 54LS259 tSGS 9338M t Fairchild SI54ALS563 (732) t Molorela 74LS259 .SGS 16-Blt Active Element Memory (732) SN54ALS580 t MotDrola 54LS259 t Signetics Fairchild TTL 93407C (732) SI74ALS533 Molorola Signetics 74LS259 93407M t Fairchild 160 SI74ALS563 Molorola (732) 110 (917) SI54LS259 tTl MC4004 Motorola Motorola (732) SI74ALS580 SI74LS259 TI (917) MC4005 Motorola OM54ALS580 t National MOOO4 t Motorola 8-Bit, Transparent, 0 Type, Three-State OM74ALS580 National MOO05 t Motorola TTL-ALS (957) SI54ALS533 tTl (732) SI7481A (860) SN54ALS373 TI t MotorDla SI54ALS563 (962) tTl SI54ALS573 (732) t Molorola 16-Bit Active Element Memory, Gated Write (966) SI54ALS580 tTl (732) 50 SI74ALS373 Molorola TTL SI7484A (861) TI (957) SI74ALS533 TI SI74ALS573 Molorola (732) 16-Bit (4x4) Register File, Simultaneous ReadlWrlte, Open SI74ALS563 TI (962) OM54ALS373 t National Collector SI74ALS580 TI (966) OM54ALS573 t National 54170 TTL t Fairchild (957) TTL-AS SI54AS533 120 tTl OM74ALS373 National 74170 Fairchild (957) SI74AS533 TI OM74ALS573 National ZN54170 t Ferranti SN54ALS373 TTL-F 54F533 ttl t Fairchild ZN74170 Ferranti 170 (964) SI54ALS573 tTl 74F533 Fairchild OM74170 National SN74ALS373 TI MC54F533 (731) t MOlorola 54170 tSlgnetics (964) SN74ALS573 TI MC74F533 Moloroll (731) 74170 Signetlcs (Continued) (Continued) (Continued) 8-Bit, Addressable, with Clear TTL 9334C 9334M OM54259 OM74259 OM8334 OM9334 N9334 S9334 SI54259 SI74259
t Military Temperature Range (- 55° to 125°C)
496
* Typical Value 80ld raci ladlcallS additional 'all II pro,"" on Ibl pigi lOll'.
«>
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-TTL (Cont'd) Function
Functlon Device
Line
Source
Memories (Cont'd)
Source
Line
64-Bit (32x2) Simultaneous ReadlWrite RAM TIL-S N82S21 Signetics 80-Bit (16x5) First-ln/First-Out Memory, Asynchronous, Three-State TIL-S SN74S225 (908) TI
t Fairchild Fairchild t Motorola Motorola t National National tSGS SGS Signetics tTl TI
Device
DuaI4-lnput, Complementary Output TIL 9309C 9309M MC8309 60 MC9309 TIL-S DM74S206 National DM8309 256-Bit (256x1) RAM, Three-State DM9309 10 TIL-S DM74S200 National N9309 S9309 256-Bit (32x8) RA.M, Open-Collector (893) SN29309 TIL-ALS (893) S154ALS318 (440.928) SN39309 ttl (928) SN74ALS318 TI 16-Blt (4x4) Register File, Simultaneous ReadlWrlte, DuaI4-lnput, Inverting Three-State TIL-ALS 256-Bit (32x8) RAM, Three-State TIL-LS 54LS670 t Fairchild SN54ALS352 TIL-ALS Fairchild 74LS670 SN74ALS352 SN54ALS218 . (440.906) tTl M74LS670 Mitsubishl SN54ALS352 SI74ALS218 (906) TI SN74ALS352 SN54LS670 \ t Motorola 256-Bit (64x4) RAM, Open-Collector SN74LS670 Motorola TIL-AS SN54AS352 TIL-ALS DM54LS670 t National SI54ALS317 (440.928) SN74AS352 tTl (928) SN74ALS317 DM74LS670 National 20 TI TIL-F 54F352 54LS670 tSGS .256-Bit (64x4) RAM, Three-State 74F352 74LS670 SGS TIL-ALS .MC54F352 SN54ALS217 (440.905) 54LS670 t Signetics tTl MC74F352 (905) 70 S174ALS217 TI 74LS670 Signetics 74F352 (990) S154LS670 1024x8 PROM tTl TIL-LS 54LS352 (3679) MB7131 (990) FuJitsu SI74LS670 TI 74LS352 (3679) MB7132 FuJitsu M74LS352 16-Bit (8x2) Multiport Register File, Simultaneous Readl SN54LS352 1024x10 ROM, Sine (030 to 9030) Look-Up Table Write, Three-State TIL-S 5086 SN74LS352 tMMI (894) TIL S174172 TI 5087 DM54LS352 tMMI TIL-S 54S172 t Signetics 6086 MMI DM74LS352 74S172 Signetics 6087 MMI T54LS352 32-Blt (4x8) Register File, OIC TI4LS352 2048x4 PROM TIL-F 54F571 t Fairchild 30 SN54LS352 MB7128 (3679) FuJitsu Fairchild 74F571 SN74LS352 2048x8 PROM 32-Blt (4x8) Register File, Three-State Dual4-lnput (three-state 54175153) MB7138E-W (3679) FuJitsu TIL-F 54F570 t Fairchild TIL DM7214 4096x8 PROM 74F570 Fairchild DM8214 (3679) MB7142E-W FuJitsu 54-Bit (16x4) RAM, Open Collector TIL AM29704C 'AM29704M ZN5489 ZN7489 DM7489B DM7589 DM8589 SI7489 TIL-S
DM74S289 IDM29704C IDM29704M
64-Blt (16x4) RAM, Three-State TIL AM29705C AM29705M DM7599 DM8599 TIL-S
DM74S189 IDM29705AC IDM29705AM IDM29705C IDM29705M
tAMD National National National National t National National t National
64-Blt (16x4) Register File with Latch, Three-State TIL-S DM85S68 National t Military Temperature Range (- 55° to 125°C)
c IC MASTER
1983
256-Bit (256x1) RAM, Open Collector TIL-LS N74LS301 Signetics S54LS301 t Signetics
AMD Multiplexers (Digital) tAMD 74F153 Signetics t Ferranti 74F253 Signetics Ferranti Synchronous Address National TIL-LS MC6883 Motorola National SN74LS783 Motorola National 40 DuaI3-lnput, Inverting, Three-State (440.863) TI TIL-ALS National SN54ALS353 t Motorola National SI54ALS353 tTl t National SN54AS353 tTl SN74ALS353 TI SI74AS353 TI AMD (1225) TIL-F
(1225)
50
54F353 74F353 MC54F353 MC74F353 74F353
TIL-LS 54LS353 74LS353 M74LS353 SN54LS353 SN74LS353
t Fairchild Fairchild t Motorola Motorola Signetics
Source
Line
Dual 3-lnput, Inverting, Three-State TIL-LS (Cont'd) DM54LS353 t National DM74LS353 National 100 T54LS353 tSGS TI4LS353 SGS SI54LS353 (933) tTl . (933) SN74LS353 TI
64-Bit (16x4) Simultaneous ReadlWrite RAM with Output Register TIL 9410C Fairchild 9410M t Fairchild
16-Blt (4x4) Register File, Simultaneous ReadlWrlte, Open Collector (Cont'd) TIL S154170 (893) tTl (893) S174170 TI TIL-LS 54LS170 74LS170 SN54SL170 SN74LS170 DM54LS170 DM74LS170 54LS170 74LS170 74LS170 S154LS170 S174LS170
Function Device
Dual4-lnput. Three-State TIL-ALS SN54ALS253 80 SN54ALS253 SN74ALS253
(732) (933) (933) (933) (933) 90 (731) (731)
t Fairchild Fairchild Mitsubishi t Motorola Motorola (Continued)
Fairchild t Fairchild Motorola t Motorola National National Signetics t Signetics
110
TI tTl
t Motorola Motorola tTl TI
(732) (732) (932) (932)
ttl TI
(932) (932) 120
t Fairchild Fairchild t Motorola Motorola Signetics t Fairchild Fairchild Mitsubishi t Motorola Motorola t National National tSGS SGS tTl TI
(731) (731)
~
I
! 130
(932) (932)
(9
c (732) (915) 140 (915)
TIL-AS SI54AS253 SN74AS253
tTl TI
(915) (915)
TIL-F
t Fairchild Fairchild t Motorola Motorola
TIL-LS AM25LS253C AM25LS253M SN54LS253 54LS253 74LS253 HD74LS253 M74LS253 SN54LS253 SN74LS253 DM54LS253 DM74LS253 54LS253 74LS253 54LS253
Q.)
"0 .::J
t National National
t Motorola ttl TI
54F253 74F253 MC54F253 MC74F253
'='
0
...... () Q.)
-Q.) (j)
~
Q.)
...... (731) (731)
AMD tAMD 150 tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National t SGS SGS 160 t Signetics (Continued)
* Typical Value Bal. 'aci IndlcallS additional data Is provldld on tbl pagl noted,
497
en
CO ~
Ie
MASTER
DIGITAL-TTL (Cont'd) Device
Line
'Source
Multiplexers (Digital) (Cont'd) Dual4-lnput, Three-State TIL-LS 74LS253 SN54LS253 SN74LS253 TIL-S
Dual4-lnput TIL
Dual8-lnput (two 8-to-l sections) SN54LS451 TIL SN74LS451 8N74351
(Cont'd) Signetics tTl TI
SN54S253 SN74S253 54S253 74S253 DM54S253 DM74S253 54S253 74S253
tAMD AMD t Fairchild Fairchild t National National t Signetics Signetics
54153 74153 ZN54153 ZN74153 HD74153 MC4000 MC4300 MC54153 MC74153 DM54153 DM74153 54153 74153 SN54153 SN74153
t Fairchild Fairchild t Ferranti Ferranti Hitachi Molorola t Molorola t Motorola Motorola t,National National t Signetics Signetics tTl TI
SN54ALS153 SN74ALS153 SN54ALS153 SN74ALS153
t Molorola Molorola tTl TI
Device
TIL-AS SN54AS153 SN74AS153
tTl TI
TIL-F
54F153 74F153 MC54F153 MC74F153
t Fairchild Fairchild t Molorola Molorola
AM25LS153C AM25LS153M SN54LS153 54LSl53 74LS153 HD74LS153 M74LS153 SN54LS153 SN74LS153 DM54LS153 DM74LS153 54LSl53 74LS153 54LS153 74LS153 SN54LS153 SN74LS153
AMD tAMD tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
SN54S153 SN74S153 54S153 74S153 DM54S153 DM74S153 54S153 74S153 8N54S153 SN74S153
tAMD AMD t Fairchild Fairchild t National National t Signetics Signetlcs tTl TI
-0 TIL-LS
:::J
(!J C
0
.......
() Q)
Q)
CJ) !....
Q)
.......
en
CO
~
TIL-S
t Military Temperature Range (- 55° to 125°C)
498
Source
tMMI MMI TI
Line
(932)
Quad 2-lnput Digital (suitable for driving adders, registers) TIL MC7266 Motorola MC8266 t Motorola RC8266 Raytheon RM8266 t Raytheon Signetics N8266 S8266 t Signetics 10 Quad 2-lnput, Inverting, Open Collector TIL RC8234 RM8234 t N8234 S8234 t
(729) (729) 20
(884) (884)
TIL-F
TIL-LS
(732) (732) (884) (884) 30 ,(884) (884)
(731) (731)
40
TIL-S
50
54F258 74F258 MC54F258 MC74F258 54F258 74F258
t Fairchild Fairchild t Molorola Molorola t Signetics Signetics
AM25LS258C AM25LS258M SN54LS258 74LS258 HD74LS258 M74LS258 SN54LS258A SN74LS258A DM54LS258B DM74LS258B 54LS258 74LS258 54LS256 54LS258 74LS258A SN54LS258A SN74LS258A
AMD tAMD tAMD Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics tSignetics Signetics tTl TI
SN54S258 SN74S258 54S258 74S258 HD74S258 DM54S258 DM74S258 54S258 74S258 SN54S258 SN74S258
tAMD AMD t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
Quad 2-lnput, Inverting TIL 54158 74158
(884) (884)
tAMD AMD t Fairchild Fairchild Hitachi t National National tSignetics Signetics tTl TI
(887) (887)
90 Quad 2-lnput, Non-Inverting, Three-State TIL-ALS SN54ALS257 t Molorola SN74ALS257 Molorola SN54ALS257 tTl SN74ALS257 TI
(732) (732) (916) (916)
TIL-F
100
TIL-LS
(917) (917)
110
(917) (917)
t Signetics Signetics TIL-S
TIL-ALS
TIL-F 60 (884) (884)
54F158 74F158 MC54F158 MC74F158
t Fairchild Fairchild t Molorola (?31) Molorola (731) (Continued)
(Cont'd) t Signetics Signetics
TIL-S
70
(731) (731)
t Molorola Molorola tTl TI
Line
AMD tAMD tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
(732) (732) (917) 80 (917)
SN54ALS158 SN74ALS158 SN54ALS158 8N74ALS158
Source
TIL-LS AM25LS158C AM25LS158M SN54LS158 54LS158 74LS158 HD74LS158 M74LS158 SN54LS158 SN74LSl58 DM54LS158 DM74LS158 54LS158 74LS158 54LS158 74LS158 SN54LS158 SN74LS158
Raytheon Raytheon Signetics Signetics
Quad 2-lnput, Inverting Three-State TIL-ALS SN54ALS258 t Molorola SN74ALS258 Molorola SN54ALS258 tTl SN74ALS258 TI
Device
Quad 2-lnput, Inverting TIL-F 54F158 74F158
Quad 2-lnput, Conditional Complementing, Open Collector N8235 Signetics TIL
TIL-ALS
Q)
Function
Function
Function
(732) (732) (887) 120 (887)
SN54S158 SN74S158 54S158 74S158 HD74S158 DM54S158 DM74S158 54S158 74S158 SN54S158 SN74S158
130
140
(887) (887)
150
54F257 74F257 MC54F257 MC74F257 54F257 74F257
t Fairchild Fairchild t Molorola Molorola t Signetics Signetics
AM25LS257C AM25LS257M SN54LS257 74LS257 HD74LS257 M74LS257 SN54LS257A SN74LS257A DM54LS257B DM74LS257B 54LS257 74LS257 54LS257 74LS257A SN54LS257A SN74LS257A
AMD tAMD tAMD Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
(916) 180 (916)
SN54S257 SN74S257 74S257 HD74S257 DM54S257 DM74S257 54S257 74S257 SN54S257 SN74S257
tAMD AMD Fairchild Hitachi t National National t Signetics Signetics tTl TI
(916) 190 (916)
160 (731) (731)
170
* Typical Value Bold racllndlcales addlllonal dala Is provided aD Ibe pagl Dolld.
c IC MASTER
1983
MASTER SELECTION GUIDE DIGIT AL-TTL (Cont'd) Function Line
Multiplexers (Digital) (Cont'd) Quad 2-lnput, Non-Inverting TIL 54157 74157 9322C 9322M ZN54157 HD74157 MC54157 MC74157 MC8322 MC9322 DM54157 DM74157 DM8322 DM9322 RC8233 RM8233 54157 74157 N8233 N9322 S8233 SN54157 SN74157
t Fairchild Fairchild Fairchild t Fairchild t Ferranti Hitachi t Motorola Motorola Motorola t Motorola t National National National t National Raytheon t Raytheon t Signetics Signetics Signetics Signetics t Signetics tTl TI
(887) (887)
SN54ALS157 SN74ALS157 SN54ALS157 SN74ALS157
t Motorola Motorola tTl TI
(732) (732) (887) (887)
54F157 74F157 MC54F157 MC74F157 54F157 74F157
t Fairchild Fairchild t Molorola Motorola t Signetics Signetics
(731) 30 (731)
AMD AMD tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS Signetics Signetics tTl TI
TIL-LS AM25LS157C AM25LS157M SN54LS157 54LS157 74LS157 HD74LS157 M74LS157 SN54LS157 SN74LS157 DM54LS157 DM74LS157 54LS157 74LS157 54LS157 74LS157 SN54LS157 SN74LS157 TIL-S
SN54S157 SN74S157 54S157 74S157 HD74S157 DM548157 DM74S157 548157 74S157 SN54S157 SI74S157
. tAMD AMD t Fairchild Fairchild Hitachi t National National t Signetics Signetics tTl TI
Device
Quad 2-lnput with Output Register TIL 54298 74298 MC54298 MC74298 54298 74298 SN54298 SN74298 10
20
40
TIL-F
54F.398 54F399 74F398 74F399
~
IC MASTER
1983
t Fairchild Fairchild t Motorola Motorola t Signetics Signetics tTl TI
TIL-S
(926) (926)
TIL-S
AMD tAMD tAMD AMD
(Cont'd) 130
t Signetlcs t Signetics t Signetics
SN54ALS151 SN74ALS151 SN54ALS151 SN74ALS151
(732) (732) (884) (884)
TIL-AS SN54AS151 SN74AS151
tTl TI
(884) (884)
TIL-F
t Fairchild Fairchild t Molorola Motorola
(731) (731)
TIL-LS
TIL-S
Fairchild t Fairchild Motorola t Motorola National t National Raytheon Raytheon t Raytheon (Continued)
(884) (884)
t Motorola Motorola tTl TI
(887) (887) 50 Quad 3-lnput, Open Collector, Conditional Complementing, Output Enable Raytheon TIL RC8264 RM8264 t Raytheon
120
140
TIL-ALS
(1227) (1227)
tMMI MMI
Line
t Raytheon Signetlcs Signetics TI tTl
8-lnput, Complementary Output, Strobe TIL 54151 t Fairchild 74151 Fairchild ZN54151 t Ferranti ZN74151 Ferranti HD74151 Hitachi MC54151 t Motorola MC74151 Motorola DM54151A t National DM74151A National 54151 t Signetics 74151 Signetics SN54151A tTl SN74151A TI
Quad 3-lnput, Conditional Complementing Raytheon TIL RC8263 RM8263 t Raytheon
Quad 4-lnput TIL-LS SN54LS453 SN74LS453
S82S30 S82S31 S82S32
Source
8-lnput, Complementary Output, Open Collector TIL 9313C Fairchild 9313M t Fairchild RC8231 Raytheon RM8231 t Raytheon
t Fairchild t Fairchild Fairchild Fairchild (1227) 80 AMD (1227) tAMD AMD t AMD tAMD t AMD AMD t Fairchild Fairchild Fairchild t Fairchild 90 Hitachi Mitsubishi t Motorola t Motorola t Motorola Motorola Motorola Motorola t National National 100 tSGS SGS t Signetics Signetics (926) tTl (944) tTl' (944) tTl (926) TI (944) TI (944) 110 TI
AM25S09C AM25S09M SN54S399 SN74S399
Device
8-lnput, Complementary Output TIL RM8232 ' N8230 N9312 SN29312 SN39312 70
TIL-LS AM25LS09C AM25LS09M AM25LS399C AM25LS399M SN54LS298 SN54LS399 SN74LS399 54LS298 74LS298 9LS298C 9LS298M HD74LS298 M74LS298 SN54LS298 SN54LS398 SN54LS399 SN74LS298 SN74LS398 SN74LS399 DM54LS298 DM74LS298 54LS298 74LS298 54LS298 74LS298 SN54LS298 SN54LS398 SN54LS399 SN74LS298 SN74LS398 SN74LS399
8-lnput, Complementary Output TIL 9312C 9312M MC8312 (887) 60 MC9312 (887) DM8312 Quad 2-lnput, Open Collector (for adder, register input) DM9312 Motorola TIL MC7267 RC8230 MC8267 t Motorola RC8232 RC8267 Raytheon RM8230 RM8267 t Raytheon t Milita:y Temperature Range (- 55° to 125°C)
Line
Source
Quad 2-lnput, (three-state 54/74157) TIL DM7123 National DM8123 t National
TIL"ALS
TIL-F
Function
Function Source
Device
54F151 74F151 MC54F151 MC74F151 AM25LS151C AM25LS151M . SN54LS151 54LS151 74LS151 HD74LS151A M74LS151 SN54LS151 SN74LS151 DM54LS151 DM74LS151 54LS151 74LS151 54LS151 74LS151 SN54LS151 SN74LS151 SN54S151 SN74S151 54S151 74S151 93S12C 93S12M HD74S151 DM54S151 DM74S151 54S151 74S151 SI54S151 SI74S151
AMD tAMD tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI tAMD AMD t Fairchild Fairchild Fairchild t Fairchild Hitachi t National National t Signetics Signetics tTl TI
(l)
'"0 :::J
CJ 170
C
0 ~
()
(l) (l)
CJ) ~
(l) ~
(j)
('(j
(884) 180 (884)
190
(884) (884)
• Typical Value Bold faci Indlcatls addlllonal data Is provided on tbe paUl notld.
499
~
Ie MASTER DIGITAL-TTL (Cont'd) Function
Function Device
Source
Line
Multiplexers (Digital) (Cont'd) B-Input, Complementary Output (three-state 54n4151) DM7121 TIL t National National DMB121 B-Input, Inverted Output 54152 TIL MC54152 MC74152 DM7210 DM7211 DMB210 DMB211 8N54152A TIL-LS 54LS152 HD74LS152 SN54LS152 SN74LS152 T74LS152 8N54LS152 8N54LS152A
t Fairchild t Motorola Motorola t National t National National National tTl t Fairchild Hitachi t Motorola Motorola SGS tTl tTl
B-Input, Inverting/Non Inverting, Control Storage TIL-LS AM25L82535C AMD AM25L82535M tAMD AM2922C AMD AM2922M tAMD a-Input Multiplexer/Data Selector/Register, Complementary Output, Open Collector TIL-LS 8N54L8355 tTl 8N54L8357 tTl 8N74L8355 TI 8N74L8357 TI a-Input Multiplexer/Data Selector/Register, Complementary Output, Three-State TIL-LS 8N54L8354 tTl 8N54L8356 tTl 8N74L8354 TI 8N74L8356 TI
CD
"0 ::J
(884)
Function Device
TIL-ALS 8N54AL8251 8N74AL8251 8N54AL8251 8N74AL8251
C
o
....... ()
CD CD C/)
t Moloroll Moloroll tTl TI
TIL-LS SN54LS450 SN74LS450 16-lnput (three-state 54n4150) TIL DM7219 DMB219
500
Monostable, Schmitt Trigger Input TIL 54121 74121 ZN54121 ZN74121 (915) HD74121 (915) 40 MC54121 MC74121 DM54121 (731) DM74121 (731) 54121 74121 8N54121 8N74121 (732) (732) (915) (915)
TIL-AS 8N54A8251 8N74A8251
tTl TI
TIL-F
54F251 74F251 MC54F251 MC74F251
t Fairchild Fairchild t Moloroll Moloroll
TIL-LS
AM25LS251C AM25LS251M SN54LS251 54LS251 74LS251 HD74LS251 M74LS251 SN54LS251 SN74LS251 DM54LS251 DM74LS251 54LS251 74LS251 54LS251A 74LS251A
AMD tAMD tAMD t Fairchild Retriggerable Monostable . Fairchild 9601C TIL Hitachi 50 9601M Mitsubishi MCB601 t Motorola MC9601 Motorola DMB601 t National DM9601 National 9601 tSGS NBT22 SGS SN29601 t Signetics TIL-LS 8N54L8422 Signetics (Continued) 8N74L8422
t Military Temperature Range (- 55° to 125°C)
Source
9600M t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetics tTl TI
Dual Monostable (doug Ie-edge) DM7B53 TIL DMBB53
TIL-LS (883) (883)
tMMI MMI t National National
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetics tTl TI
90
t Fairchild Fairchild t Ferranti Ferranti t Motorola Motorola tTl TI
(873) (873)
Hitachi t Motorola Motorola t National National tTl TI
(873) (873)
120
130
Fairchild t Fairchild t National National
HD74LS221 SN54LS221 SN74LS221 DM54LS221 DM74LS221 54LS221 8N54L8221 8N74LS221
Hitachi t Motorola Motorola t National National t Signetics TI TI
Dual Retriggerable Monostable (AND triggered) TIL-LS 8N54L8423 tTl 8N74LS423 TI
(906) (906) (945) 150 (945)
Dual Retriggerable Monostable with Clear (AND triggered) AM26123C TIL AMD I AM26123M tAMD 54123 t Fairchild 74123 Fairchild ZN54123 t Ferranti ZN74123 Ferranti HD74123 Hitachi MC54123 t Motorola MC74123 Motorola 160 DM54123 t National DM74123 National 54123 t Signetics 100 74123 Signetics 8N54123 (874) tTl 8N74123 TI (874) TIL-LS HD74LS123 SN54LS123 SN74LS123 DM54LS123 DM74LS123 8N54L8123 8N74L8123
(873) (873)
Fairchild t Fairchild Motorola t Motorola National t National Signetics Signetics TI tTl TI
Line
Dual Monostable, Schmitt-Trigger Input (dual 54n4121) TIL HD74221 Hitachi 54221 t Signetics 74221 Signetics BO 8N54221 (906) 140 tTl 8N74221 (906) TI
8-lnput, Strobe, Complementary Output, Three-State Multivibrators TIL HD74251 Hitachi 30 DM54251 t National Bidirectional Monostable (lOW level input) DM74251 National RCBT20 Raytheon TIL (915) 8N54251 tTl RMBT20 t Raytheon 8N74251 (915) TI NBT20 Signetics
C}
Device
Line
B-Input, Strobe, Complementary Output, Three-State Retriggerable Monostable with Clear (Cont'd) TIL-LS TIL 54122 8N54L8251 (915) 60 tTl 74122 ZN54122 8N74L8251 TI (915) ZN74122 TIL-S SN54S251 tAMD MC54122 SN74S251 AMD MC74122 HD74S251 Hitachi 8N54122 t National DM54S251 8N74122 DM74S251 National TIL-LS HD74LS122 54LS251 t Signetics SN54LS122 54S251 t Signetics SN74LS122 74S251 Signetics DM54LS122 8N548251 (915) 70 tTl 10 DM74LS122 (915) 8N748251 TI SN54LS122 10-lnput, Quad B-to-l Programmable, Three-State 8N74L8122 29693C Raytheon TIL Retrlggerable Monostable, with Reset 29693M t Raytheon TIL 9600C
16-lnput, Inverted Output, Strobe (884) TIL 54150 (884) 74150 ZN54150 (1227) ZN74150 (1227) HD74150 (1215) 20 MC54150 (1215) MC74150 DM54150 DM74150 (934) 54150 (935) 74150 (934) 8N54150 (935) 8N74150
(933) (934) (933) (934)
Source
110
(945) (945)
Hitachi t Motorola Motorola t National National tTl TI
170 (874) (874)
Dual Retriggerable Monostable with Reset (OR triggered) TIL AM2602C AMD AM2602M tAMD 9602C Fairchild 9602M t Fairchild 96L02C Fairchild 96L02M t Fairchild MCB602 Motorola 180 MC9602 t Motorola (Continued)
• Typical Value Bold flCI Indlcilis Iddlllonal dill Is provldld on Ihe plgl nOlld. «l
IC MASTER
1983
MASTER SELECTION GUIDE DIGIT AL-TTL (Cont'd) Function
Function Device
Source
Line
Multivibrators (Cont'd)
4-Bit Parallel Input, Parallel Output TIL-LS M74LS195A SN54LS195A SN74LS195A DM54LS195A DM74LS195A 74LS195A 8N54L8195A 8N74L8195A
Dual Retrlggerable Monostable with Reset (OR triggered) (Cont'd) TIL National DMB602 DM9602 t National N9602 Signetics S9602 t Signetics TIL-LS 96LS02C 96LS02M
Fairchild t Fairchild
TIL-S
AMD tAMD Fairchild t Fairchild
AM26S02C AM26S02M 96S02C 96S02M
Dual Voltage-Controlled TIL 11C24C 11C24M MC4024 MC4324
Fairchild t Fairchild Motorola t Motorola
Triple Monostable TIL DNB50
Panasonic
Function Device
TIL-S 10
SN54S195 SN74S195 93S00C 93S00M DM54S195 DM74S195 54S195 74S195 8N548195 8N748195
Source
Line
Device
4-Bit Parallel-In, Parallel-Out, Cascadable, Three-State TIL-LS 74LS395 Fairchild M74LS395A Mltsubishl SN54LS395A 60 t Motorola SN74LS395A Motorola T54LS395 tSGS T74LS395 SGS 54LS395A t Signetics 74LS395A Signetics (903) 8N54L8395A (943) ttl (903) 8N74L8395A TI (943) 130
Mitsubishi t Motorola Motorola t National National Signetlcs ttl TI tAMD AMD Fairchild t Fairchild t National National t Signetics Signetics ttl TI
4-Bit Parallel-In, Serial-Out TIL 5494 7494 70 ZN7494A MC5494 MC7494 7494 8N5494 (903) 8N7494 (903) 4-Bit Universal Bidirectional
4-Bit Parallel-In, Parallel Out, RighULeft TIL 5495 t Fairchild 7495 Fairchild Parallei-In, Parallel-Out, Registered Outputs Ferranti ANB495A TIL-ALS ZN5495A t Ferranti 8N54AL8671 t Motorola (732) MC4012 Motorola 8N54AL8672 t Motorola (732) MC4312 t Motorola 8N74AL8671 Motoroll (732) MC5495A t Motorola (732) 8N74ALS672 Motoroll MC7495A Motorola TIL-LS 8N54L8671 (991) 20 ttl DM5495 t National 8N54L8672 (991) tTl. DM7495 National 8N74L8671 (991) TI 5495A t Signetics (991) SN74LS672 TI 7495A Signetics 4-Bit Parallel In, Parallel Out, RighULeft, Three-State· (866) 8N5495A ttl Fairchild TIL-LS 74LS295 (866) 8N7495A TI M74LS295B Mitsubishl TIL-LS 54LS95B t Fairchild SN54LS295A t Motorola 74LS95B Fairchild SN74LS295A Motorola HD74LS95B Hitachi 54LS295A tSGS Mitsubishi M74LS95B 74LS295A SGS SN54LS95B t Motorola 30 54LS295B t Signetics SN74LS95B Motorola 74LS295B Signetics 8N54LS295B (925) 54LS95B tTl tSGS (925) SI74LS295B TI 74LS95B SGS 54LS95B t Signetics 4-Bit Parallel Input, Parallel Output 74LS95B Signetics TIL 54195 t Fairchild 8N54L895B (866) 74195 Fairchild ttl (866) Fairchild 8N74L895B TI 9300C 9300M t Fairchild 4-Bit Parallel-In, Parallel Out, (with load, shift, hold HD74195 Hitachi control) ' t Motorola MC54195 TIL 5417B t Fairchild MC74195 Motorola 40 Motorola MC7270 MCB300 Motorola MCB270 t Motorola MC9300 t Motorola RCB270 Raytheon DM54195 t National RMB270 t Raytheon DM74195 National 8N54178 (896) ttl DMB300 National 8N74178 (896) TI DM9300' t National 4-Bit Parallel-In, Parallel Out, with Reset, Complementary 54195 t Signetics Output for Last Bit 74195 Signetics 54179 TIL t Fairchild N9300 Signetics Fairchild 74179 (903) 50 8154195 ttl Motorola MC7271 8N74195 TI (903) MCB271 t Motorola TIL-F 74F195 Signetics Raytheon RCB271 TIL-LS AM25LS195AC AMD RM8271 t Raytheon AM25LS195AM tAMD NB271 Signetics SN54LS195A t AMD SB271 t Signetics 54LS195 t Fairchild (897) 8N54179 ttl 74LS195 Fairchild 8N74179 (B97) TI HD74LS195A Hitachi (Continued) Signetics TIL-S NB2S71
~
IC MASTER
1983
Line
(Cont'd)
TIL
Shift Registers
t Military Temperature Range (- 55° to 125°C)
Source
BO
TIL-F 90
TIL-LS
100
TIL-S
t Fairchild Fairchild Ferranti t Motorola Motorola Signetics ttl TI
(865) (865)
54194 74194 ZN54194 ZN74194 HD74194 MC54194 MC74194 DM54194 DM74194 54194 74194 8N54194 8N74194
t Fairchild Fairchild t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics Signetlcs ttl TI
(902) (902)
54F194 74F194 MC54F194 MC74F194
t Fairchild Fairchild t Motoroll Motoroll
(731) (731)
AM25LS194AC AM25LS194AM SN54LS194A 54LS194A HD74LS194A M74LS194A SN54LS194A SN74LS194A DM54LS194A DM74LS194A 54LS194A 74LS194A 8N54LS194A 8N74L8194A
AMD tAMD tAMD t Fairchi!d Hitachi Mitsubishi t Motorola Motorola t National National t Signetics Signetics tTl TI
SN54S194 SN74S194 54S194 74S194 DM54S194 DM74S194 8N548194 8N748194
tAMD AMD t Fairchild Fairchild t National National ttl TI
110 5-Bit Parallel-In, Parallel-Out TIL 5496 7496 ZN5496 ZN7496 HD7496 MC5496 MC7496 DM5496 DM7496 5496 120
140
160
Q.)
"0 ::J
CJ C
0 +-'
()
Q.)
(902) (902)
Q.)
170
(/) ~
Q.) +-'
(j)
CU
~ (902) (902)
t Fairchild Fairchild 1BO t Ferranti Ferranti Hitachi t Motorola Motorola t National National t Signetics (Continued)
• Typical Value Bold flCI Indlcltes addlllonil dlta Is provided on tbe plge noted.
501
Ie MASTER DIGITAL-TTL (Cont'd) Function
Function
Function Device
line
Source
Device
Source
Device
line
Source
line
8-Bit Parallel-In, Parallel-Out, Unidirectional 8-Bit Serial-In, Parallel-Out Register with Output latches. Shift Registers (Cont'd) (Cont'd) TTl-lS (Cont'd) TIL 5-Bit Parallel-In, Parallel-Out Signetics 74199 60 (988) S174LS596 TI (Cont'd) TIL (905) SI54199 SI74LS599 (970) 120 tTl TI Signetics 7496 (905) SI74199 TI 8-Bit Serial-In, Serial-Out (866) SI5496 tTl 8-Bit Parallel-In, Parallel-Out, Three-State, with Positive 5491 TTL t Fairchild (866) SI7496 TI Edge-Triggered D-Type Flip Flops (bus interface) 7491 Fairchild Mitsubishi TIl-lS M74lS96 AMD (2602) TIL AM29825 ZN5491A t Ferranti 54lS96 t Signetics (2602) AM29826 AMD ZN7491 Ferranti 74lS96 Signetics 8-Bit Parallel-In, Serial-Out, Complementary Output HD7491A Hitachi (866) SN54LS96 ttl TTL 54165 t Fairchild MC5491 t Motorola (866) SN74LS96 TI Fairchild 74165 MC7491 Motorola ZN54165 t Ferranti 5-Bit Dual Parallel-In, Parallel-Out Buffer Register, DM5491A t National ZN74165 Ferranti (clocked flip-flops) DM7491A National Raytheon RC8200 TIL MC54165 t Motorola 5491 tSignetlcs 130 10 Motorola RM8200 t Raytheon MC74165 70 7491 Signetics DM54165 t National 5-Bit Dual Parallel-In; Parallel-Out Buffer Register, SN5491A (864) tTl DM74165 National Inverting Output (clocked flip-flops) (864) SN7491A TI t Signetics 54165 Raytheon RC8201 TTL TIl-lS HD74lS91 Hitachi Signetics 74165 ~ RM8201 t Raytheon M74lS91 Mitsublshi SN54165 (891) tTl 8-BIt Gated Serial-In, Parallel-Out 8N54LS91 (864) tTl .. (891) TI 8N74165 54164 t Fairchild TIL (864) SN74LS91 TI TTl-AlS 74164 Fairchild (891) SN54ALS165 8-Bit Synchronous with Parallel load and Hold tTl ZN54164 t Ferranti TTl-lS SN54lS498 (891) tMMI SN74ALS165 TI Ferranti ZN74164 SN74lS498 MMI HD74164 Hitachi TTl-lS 54lS165 t Fairchild
-
I= i ~
t National National t National National t Signetics Signetics tTl TI
(891) (891)
SN54ALS164 SN74ALS164 SN54ALS164 SN74ALS164
t Moloroll Molorola tTl TI
(732) (732) (891) (891)
TIl-lS
Q)
::::I
(!J C
0 +-'
() Q)
Q)
(f) to...
Q) +-'
U)
AM25lS164C AM25LSl64M SN54lS164 54lS164 74lS164 HD74LSl64 M74lS164 SN54lS164 SN74LSl64 DM54lS164 DM74lS164 54lS164 74lS164 54lS164 74lS164 . SN54LS164 SN74LS164
AMD AMD tAMD t Fairchild Fairchild Hitachi Mitsubishi t Motorola Motorola t National National tSGS SGS t Signetics Signetics tTl TI
8-Bit Parallel-In, Parallel-Out, RighUleft TTL 54198 t Fairchild 74198 Fairchild HD74198 Hitachi DM54198 t National DM74198 National SN54198 tTl SN74198 TI
502
Fairchild Mitsubishi t Motorola Motorola tTl TI
8-Bit Parallel-In, Serial-Out with Clear TTL 54166 t Fairchild Fairchild 74166 Ferranti ZN54166 ZN74166 Ferranti Hitachi HD74166 DM54166 t National DM74166 National 30 54166 t Signetics 74166 Signetics SN54166 tTl SN74166 TI
80 8-Bit Synchronous with Parallel load, load Complement, Preset, Clear and Hold TIl-lS SN54lS380 tMMI SN74lS380 MMI (891) (891)
SN54ALS166 SN74ALS166
TTl-AlS
90 TTl-F
(891) . (891)
40
(891) (891)
Mitsubishi t Motorola Motorola t National National tTl TI
8-Bit Parallel-In, Serial-Out with Input latches TIl-LS SN54LS597 tTl SN54LS598 ttl SN74LS597 TI SN74LS598 TI 50
(904) (904)
TIl-lS M74LS166 SN54lS166 SN74lS166 DM54lS166 DM74lS166 SN54LS166 SN74LS166
(891) (891)
tTl TI
100
(891) (891) (969) (969) (969) (969)
8-Bit Serial/Parallel-In Register with Sign Extend (for use with 25lS14/74lS384 multiplier) TIL-F 54F322 t Fairchild Fairchild 74F322 TIl-lS 74lS322
110
Fairchild
8-Bit Serial-In, Parallel-Out Register with Output latches (968) TIl-lS SN54LS594 tTl (968) SN54LS595 tTl (968) SN54LS596 tTl SN54LS599 (970) tTl TI (968) SN74LS594 (968) SN74LS595 TI (Continued) * Typical Value Bald flel ladlelllS Iddlllonil dill Is proyldld on
I~I
140
8-Bit Universal Shift/Storage, Three-State TTL DM7546 t National DM8546 National
TTl-AlS
8-Bit Parallel-In, Parallel-Out, Unidirectional 54199 TTL t Fairchild 74199 Fairchild HD74199 Hitachi DM54199 t National DM74199 National 54199 t Signetics (Continued) t Military Temperature Range (- 55° to 125°C)
74lS165 M74lS165 SN54lS165 SN74lS165 SN54lS165 SI74LS165
20
TIl-AlS
"0
ctS ~
DM54164 DM74164 DM7570 DM8570 54164 74164 SN54164 SN74164
SN54ALS299 SN54ALS323 SN74ALS299 SN74ALS323
tTl tTl TI TI
54F299 s4F323 74F299 74F323 MC54F299 MC74F299
t Fairchild t Fairchild Fairchild Fairchild t MolorDl1 MolorDl1
TTl-lS AM25LS23C AM25LS23M AM25LS299C AM25LS299M SN54LS299 SN54LS323 SN74LS299 SN74lS323 54LS299 54lS323 74lS299 74lS323 HD74LS299 M74lS299 M74lS323 SN54lS299 SN54LS323 SN74lS299 SN74lS323 SN54LS299 SN54LS323 SN74LS299 SN74LS323 TTl-S
DM54S299 DM74S299 SN548299 SN74S299
-
AMD tAMD AMD tAMD tAMD tAMD AMD AMD t Fairchild t Fairchild Fairchild Fairchild Hilachi Mitsubishi Mitsubishi t Motorola t Motorola Motorola Motorola ttl tTl TI TI
(927) (930) (927) (930)
150 (731) (731) (1227) (1227) (1227) (1227) (1227) (1227) 160
t National National tTl TI
170
(927) (930) (927) (930)
(927) (927) 180
pial aOlld.
~
IC MASTER
1983
MASTER SELECTION GUIDE DIGITAL-TTL (Cont'd) Function
Function
Function
Shift Registers (Cont'd) 8-Bit Dual Serial-In, Serial-Out 9328C TTL 9328M MC8328 MC9328 RC82n RM82n N82n
Device
Line
Source
Device
Quad Bus Transceiver TTL-AS SN74ASZ4Z SN74ASZ43
Fairchild t Fairchild Motorola t Motorola Raytheon t Raytheon Signetics
TTL-F
9-BII Parallel-In, Parallel-Out, Three-5tate, with Positive Edge-Triggered D-Type Flip-Flops (bus interface) (Z60Z) AMD AMZ98Z3 TTL AMD (Z60Z) AMZ98Z4 10-Blt Parallel-In, Parallel-Out Buffer Register, with Reset (clocked flip-flops) Raytheon TTL RC8202 RM8202 t Raytheon Signetics N8202 t Signetics S8202
10 TTL-LS
10-Bit Parallel-In, Parallel-Out Buffer Register, with Reset, Inverting Output (clocked flip-flops) Raytheon RC8203 TTL t Raytheon RM8203 10-Bit Parallel-In, Parallel-Out, Three-State, with Positive Edge-Triggered 0-Type Flip-Flops (bus interface) (Z60Z) AMD AMZ98Z1 TTL AMD (Z60Z) AMZ98ZZ 10-811 Parallel-In, Serial Out RC8274 TTL RM8274 N8274
Raytheon t Raytheon Signetics
10-BII Serial-In, Parallel-Out RC8273 TTL RM8273 N8273 S8273
Raytheon t Raytheon Signetics t Signetics
16-Bit Parallel-In, Serial-Out TTL-LS SN54LS674 SN74LS674
tTl TI
20
(99Z) (99Z)
16-Bit Serial-In, Serial-Out Register plus Stored Parallel Output (99Z) TTL-LS SN54LS673 tTl (99Z) SN74LS673 TI
Transceive~s,
TTl-S
Bus Signetics Signetics
74F245 74F545 Quad Bus Transceiver TTl-AlS SN54ALSZ4Z SN54ALS243 SN74ALS242 SN74ALS243 DM54ALS242 DM54ALS243 DM74AlS242 DM74ALS243 SN54ALS1242 SN54ALS1243 SN54ALS242 SN54ALS243 SN74ALS1242 SN74ALS1243 SN74ALS242 SN74ALS243 TTL-AS SN54AS1242 SN54AS1243 SN54AS242 SN54AS243 SN74AS1242
t Molorola t Moloroll Motoroll Motoroll t National t National National National tTl tTl tTl tTl TI TI TI TI tTl tTl tTl tTl TI
30
(73Z) (732) (73Z) (732)
c IC MASTER
1983
TI TI
54F242 54F243 74F242 74F243 MC54FZ4Z MC54FZ43 MC74FZ4Z MC74FZ43 54F242 54F243 74F242 74F243
t Fairchild t Fairchild Fairchild Fairchild t Molorola t Motoroll Motorola Motoroll t Signetics t Signetics Signetics Signetics
AM25LS242C AM25LS242M AM25LS243C AM25LS243M SN54LS242 SN54LS243 SN74LS242 SN74LS243 74LS242 74LS243 M74LS242 M74LS243 SN54LS242 SN54LS243 SN74LS242 SN74LS243 DM54LS242 DM54LS243 DM74LS242 DM74LS243 74LS242 74LS243 SN54LSZ4Z SN54LSZ43 SH74LSZ4Z SH74LSZ43
AMD tAMD AMD tAMD tAMD tAMD AMD AMD Fairchild Fairchild Mitsublshi Mitsubishi t Motorola t Motorola Motorola Motorola t National t National National National Signetics Signetics tTl tTl TI TI
SN54S242 SN54S243 SN74S242 SN74S243 DM54S242 DM54S243 DM74S242 DM74S243
tAMD tAMD AMD AMD t National t National National National
Quad Tridlrectional Bus Transceiver, Three-State TTL-lS SH54LS442 tTl SN54LS443 tTl SN54LS444 tTl SH54LS448 tTl TI SN74LS442 SH74LS443 TI TI SN74LS444 TI SN74LS448
(1018) (1019) 40 Octal Bus Driver,lnverting, Three-State (911) TTL-S SN545740 tTl (912) TI SN745740 (1018) (1019) Octal Bus Driver, Non-Inverting, Three-State Complementary Controls (911) TTL-ALS (912) SN54ALS244 t Motorola Motoroll SH74ALS244 DM54ALS244 t National (911) National DM74ALS244 (912) 50 TTl-S
(Continued) t Military Temperature Range (-55° to 125°C)
Source
SN54S744 SN74S744
Source
Device
line
Line
Octal Bus Driver (Schmitt trigger), Inverting, Three-State TTL-ALS SN54AlSZ40 (73Z) t Moloroll Moloroll (73Z) SN74AlSZ40 DM54ALS240 t National DM74ALS240 National
(Cont'd) (911) (91Z)
(731) (731) (731) 60 (731)
70
80
(911) (91Z) (911) 90 (91Z)
(947) 100 (947) (947) (951) (947) (947) (947) (951)
(732) 110 (732)
tTl TI
TTL-AS SN54ALS1Z40 SH54AlSZ40 SH74ALS1Z40 SH74ALSZ40 TTL-F
tTl tTl TI TI
54FZ40 74FZ40 MC54FZ40 MC74FZ40 74F240
t Fllrcblld Fllrchlld t Motoroll Motor 011 Signetics
TTL-LS AM25LS240C AM25LS240M SN54LS240 SN74LS240 54LS240 74LS240 74LS540 HD74LS240 SH54LSZ10 SN54LSZ40 SN54LS340 SH74LSZ10 SN74LSZ40 SN74LS340 SN54LS240 SN54LS540 SN74LS240 SN74LS540 DM54LS240 DM74LS240 74LS240 SH54LSZ40 SH54LS540 SH74LSZ40 SH74LS540
AMD tAMD tAMD AMD t Fairchild Fairchild Fairchild Hitachi tMMI tMMI tMMI MMI MMI MMI t Motorola t Motorola Motorola Motorola t National National Signetics tTl tTl TI TI
TTL-S
tAMD AMD Mitsubishl tMMI MMI t Signetics t Signetics Signetics tTl TI TI
SN54S240 SN74S240 M74LS240 SH54SZ40 SN74SZ40 54lS240 54S240 74S240 SH54SZ40 SN74SZ40 SN74S340
,
(1018) 120 (910) (1018) (910) (630) (630) (731) (731)
130
(715) (715) (715) (715) 140 (715) (715)
~
: ~
(910) 150 (960) (910) (960)
~
Q)
(715) (715)
"0 :J 160
"'0
«
Array Inputs
AmPAL16R8
(8) Dedicated (8) Feedback
AmPAL16R6
(8) Dedicated (6) Feedback (2) Bidirectional (8) Dedicated (4) Feedback (4) Bidirectional
AmPAL16R4
tpd (MAX) Logic
OE
Outputs
(8) 8-Wide AND-OR
Dedicated
Registered Inverting
(6) 8·Wide AND-OR
Dedicated
Registered Inverting
(2) 7-Wide AND-OR-INVERT
Programmable
Bidirectional
(4) 8-Wide AND-OR
Dedicated
Registered Inverting
(4) 7-Wide AND-OR-INVERT
Programmable Bidirectional
ts (MAX)
teo (MAX)
STO A STO A STO A -
-
30
20
25
15
ns
35
25
30
20
25
15
ns
35
25
30
20
25
15
ns
AmPAL16L8
(10) Dedicated (6) Bidirectional
(8) 7-Wide AND-OR-INVERT
Programmable
(6) Bidirectional (2) Dedicated
35
25
-
-
-
-
ns
AmPAL16H8
(10) Dedicated (6) Bidirectional
(8) 7-Wide AND-OR
Programmable
(6) Bidirectional (2) Dedicated
35
25
-
-
-
-
ns
AmPAL16LD8
(10) Dedicated (6) Bidirectional
(8) 8-Wide AND-OR-INVERT
-
Dedicated
35
25
-
-
-
-
ns
AmPAL16HD8
(10) Dedicated (6) Bidirectional
(8) 8-Wide AND-OR
-
Dedicated
35
25
-
-
-
-
ns
·PAL is a registered trademark of Monolithic Memories, Inc. IMOX is a trademark of Advanced Micro Devices, Inc.
604
@
IC MASTER 1983
Advanced Micro Devices BIPOLAR LSI AND SUPPORT PRODUCTS 20-Pin IMOXTM Programmable Array Logic Elements MAXIMUM RATINGS (Above which the useful life may be impaired) Storage Temperature
-65 to +150°C
Temperature (Ambient) Under Bias
-55 to +125°C
Supply Voltage to Ground Potential (Pin 20 to Pin 10) Continuous
-0.5 to +7V
DC Voltage Applied to Outputs (Except During Programming)
-0.5V to +VCC max
DC Voltage Applied to Outputs During Programming
21V
Output Current Into Outputs During Programming (Max Duration of 1 sec)
200mA
DC Input Voltage
-0.5 to +5.5V
DC Input Current
-30 to +5mA
OPERATING RANGE Commercial
Military
Description
Min
Max
Min
Max
Units
Supply Voltage
475
5.25
4.50
5.50
V
TA
Operating Free Air Temperature
0
75
-55
Te
Operating Case Temperature
Parameters Vee
°c °c
125
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (Unless Otherwise Noted) Typ Parameters
Test Conditions
Description Vee = MIN, VIN = VIH or Vil
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
Vee = MIN, VIN = VIH or Vil
VIH (Note 2)
Input HIGH Level
Guaranteed input logical HIGH voltage for all inputs
Vil (Note 2)
Input LOW Level
Guaranteed input logical LOW voltage for all inputs
III
Input LOW Current
Vee
=
MAX, VIN
=
OAOV
IOH
=
-3.2mA\
COM'L
IOH
=
-2mA
MIL
IOl
=
24mA
COM'L
IOl
=
12mA
MIL
Min
(Note 1)
2.4
3.5
Max
Units Volts
en
Q)
0.50
2.0
'-20
,
O.B
Volts
-250
J.LA
IIH
Input HIGH Current
Vee
=
MAX, VIN
=
2.7V
25
J.LA
Input HIGH Current
Vee
=
MAX, VIN
=
5.5V
1.0
mA
Ise
Output Short Circuit Current Vee = MAX. VOUT
-60
-90
mA
110
155
lee
Power Suppl,y Current
All inputs
=
=
GND, Vee
Input Clamp Voltage
Vee
IOZH
Output Leakage Current (Note 4)
Vee = MAX, Vil VIH = 2.0V
CIN
Input Capacitance
VIN
COUT
Output Capacitance
VOUT
Notes:
=
=
16LB, 16HB, 16HDB, 16LDB 16LBA, 16HBA, 16HDBA, 16LDBA MAX
2.0V @f
=
=
2.0V @f
=
O.BV
16RB, 16R6, 16R4 16RBA, 16R6A, 16R4A
120
1BO
-0.9
-1.2
Vo
=
2.7V
100
Vo
=
OAV
-100
1MHz (Note 5)
6
=
9
o
~ "C Q)
o
c:
CO
>
"C
«-
Volts J.LA
pF 1MHz (Note 5)
i. Typical limits are at Vee = 5.0V and TA = 25°C. 2. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 3. Not more than one output should be tested at a time. Duration of the short circuit should not be more than one second VOUT chosen to avoid test problems caused by tester ground degradation. 4. I/O pin leakage is the worst case of IOZX or IIX (where X = H or L). 5. These parameters are not 100% tested, but are periodically sampled.
© Ie MASTER 1983
Q)
o o :I...
mA
MIN, liN ~ -1BmA
VI
IOZl
-30
0.5V (Note 3)
os:
Volts
II
=
o
Volts
= 0.5V has been
605
Advanced Micro Devices BIPOLAR LSI AND SUPPORT PRODUCTS
20-Pin IMOXTM Programmable Array Logic Elements SWITCHING CHARACTERISTICS OVER OPERATING RANGE (Unless otherwise noted) HIGH SPEED
tpD
Test Conditions
Description
Parameters
Input or Feedback to Non-Registered Output 16L8A, 16R6A, 16R4A, 16LD8A, 16H8A, 16HD8A
COM'L
Typ (Note 1)
Min
12
tEA
Input to Output Enable 16L8A, 16R6A, 16R4A, 16H8A
tER
Input to Output Disable 16L8A, 16R6A, 16R4A, 16H8A
tpzx
Pin 11 to Output Enable 16R8A, 16R6A, 16R4A
tpxz
Pin 11 toOutputDisable 16R8A, 16R6A, 16R4A
teo
Clock to Output 16R8A, 16R6A, 16R4A
ts
Input or Feedback Setup Time 16R8A, 16R6A, 16R4A
tH
Hold Time 16R8A, 16R6A, 16R4A
tp
COM'L R1 =200 R2 = 390
MIL
Max
Min
Max
Units
25
30
ns
12
25
30
ns
12
25
30
ns
8
20
25
ns
8
20
25
ns
20
ns
8
15
10
20
25
ns
-10
0
0
ns
Clock Period
35
45
ns
tw
.Clock Width
15
20
fMAX
Maximum Frequency
MIL R1 = 390 R2 = 750
ns
28.5
22
MHz
Notes: 1. Typical limits are at Vee = 5.0V and TA = 25°C. 2. tpD is tested with switch.S1 closed and CL= 50pF. 3. For three-state outputs, output enable times are tested with CL = 50pF to the 1.5V level; S1 is open for high impedance to HIGH tests and. closed for high impedance to LOW tests. Output disable times are tested with CL = 5pF. HIGH to high impedance tests are made to an output voltage of VOH - 0.5V with S1 open; LOW to high impedance tests are made to the VOL + 0.5V level with S1 closed.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (Unless otherwise noted) STANDARD SPEED Parameters tPD
U)
Q)
o oS; Q)
o
o
~
oQ
\
Test Conditions
Description
Input or Feedback to Non-Registered Output 16L8, 16R6, 16R4, 16LD8, 16H8, 16HD8
tEA
Input to Output Enable 16L8, 16R6, 16R4, 16H8
tER
Input to Output Disable 16L8, 16R6, 16R4, 16H8
tpzx
Pin 11 to Output Enable 16R8; 16R6, 16R4
tpxz
Pin 11 to Output Disable 16R8, 16R6, 16R4
teo
Clock to Output 16R8, 16R6, 16R4
ts
Input or Feedback Setup Time 16R8, 16R6, 16R4
tH
Hold Time 16R8, 16R6, 16R4
tp
Min
17
COM'L R1 = 200 R2 = 390
MIL
COM'L
Typ (Note 1)
Max
Min
35
Max
Units
40
ns
17
35
40
ns
17
35
40
ns
12
25
25
ns
12
25
25
ns
12,
25
25
ns
15
30
35
ns
-10
0
0
ns
Clock Period
55
60
ns
tw
Clock Width
20
25
fMAX
Maximum Frequency
MIL R1 = 390 R2 = 750
18
ns 16.5
MHz
Notes: 1. Typicd1limits are at Vee = 5.0V and TA = 25°C. 2. tpD is tested with switch S1 closed and CL = 50pF. 3. For three-state outputs, output enable times are tested with CL = 50pF to the 1.5V level; S1 is open for high impedance to HIGH tests and closed for high impedance to LOW tests. Output disable times are tested with C L ,;, 5pF. HIGH to high impedance tests are made to an output voltage of VOH - 0.5V with S1 open; LOW to high impedance tests are made to the VOL + 0.5V level with S1 closed.
~ "0 Q)
o
c as >
"0
«
ACTESTLOAD
OUTPUT 0~---.---......
~I
BPM·370
606
@
IC MASTER 1983
Advanced Micro Devices BIPOLAR LSI AND SUPPORT PRODUCTS 20-Pin IMOXTM Programmable Array Logic Elements SWITCHING WAVEFORMS
REGISTERED FEEDBACK INPUTS,I/O,
li(===J;~~II==================I===J[====
CP
REGISTERED OUTPUTS:
.COMBI~~~~~~~~
::?,
'" j
_ _ _ _ _ _ _ _ _ _ _ _. - - - - - - - - - - - - - - - - -... ) ... ) .... ) .... )))
,,,~
(~(~(L_
( ....
__
BPM-371
KEY TO TIMING DIAGRAM
WAVEFORM
INPUTS
OUTPUTS
MUST BE STEADY
WILL BE STEADY
--
WAVEFORM
H
INPUTS
OUTPUTS
DON'T CARE; ANY CHANGE PERMITTED
CHANGING; STATE UNKNOWN
DOES NOT APPLY
CENTER LINE IS HIGH IMPEDANCE "OFF" STATE
en
Q)
o oS; Q)
Cl
oso
~ "C Q)
o c
as >
"C
«
©
IC MASTER 1983
607
Advanced Micro Devices BIPOLAR LSI AND SUPPORT PRODUCTS 20-Pin IMOXTM Programmable Array Logic Elements LOGIC DIAGRAM AmPAL16RB/AmPAL16RBA INPUTS (0 - 31) o 0 1 2 _3 4 5 6 7
2 --h;-
.
8 g 10
"
12 13 14 15
3
.
20
21 22 23
.
27 28
~ I
29
e.
3Q
a:
~ 5
31
..
o o oa:
0..
36
37 36 39
Q)
o
"S; Q)
6
c
..->
.
40 41 42 43
o
~
"~
44
~ "0
45 48 47
Q)
o
7
c ctl >
.....
49 50 51 52 53
"0
«
54
55
... ..
58
59 60 61 62
..
63
608
24252627
28293031
~~ ~
..
..I
~c-~
t:~ f-~
f-~
19
>-~~
t:~ A ~
....
§9J
r---
f-~ ~~
o at--
~~
~.
18
~~~
tP A
..... ....
ES ~~
r--
o at--
::~ ::~ .....
....
~~~
~
17
010
r
r---D Qr--
-f--;
37
7
16
....
38
r
~
~
.2
35
6
17
~
32 33 :lot
:l
~~~
~~
...
t;
r---D Q f---
~~ ...... ~
28 21 30 31
I
~~~
~
....
f--
18
....
~
2. 25 28
~
....
....
J §8 t:~
2:~
..
a I 10 II 12 13 I. 15
'3
... .. > II 17
18 II 20
21 22 23
4
...
27
~
28
I
29
e. en =: a:
30 31
~ 5
...
32 33 M 35 341 37 341 31
o oa:
D.
(.)
;:~ f-~
f-p L....
~
c::l--
§§b
...
~
o
~
(.)
~
-:~
7
c ct1 >
-:~
....
..
!Ie
57 !Ie
51
eo 81 82 63
....> ..
..---
o
~
~
16
t:~
«
610
Qf--
-.c:
~ ~§ ~)-~
50 51 52 53
9
o
-)-...-.4
.5
...
'0
8
~~~ ..---
-~ -~
1-1----1
•7
Q) (.)
17
-.c: ...
.1 .2 C3
. ..
J.-
"0
~e-~
tS
..
Q)
....
C:~
6,-I>
Cl
18
I-~
~)-----1
r"
:;)
oS;
,....
~
t>
en Q)
....
"C"I--
> r" 24 25 2S
19
I-~
..--o
....
Qf--
~~~
....
,-.
~DJ
i-r-1 I-~
13
I-~
g~
....
J
1-f---1
~:=l
19
:~
~
AI
!-b=-: .
~.t--
2
,......
8 9 10 11 12 13 14 15
3
s~
I-f----,
18
r-"f----f
~~
...
AI
-~I--
~
~
,......
16 17 18 19 20 21 22 23
4
~ ~ ~ ~
......
....
....
,......
24 25 26 27 28
~ I
E~ I-~
t:~
31
~ 5
l3
...
....2.
:)
o
Q.
6
oS;
~t--
....
-
-[)J
(I)
0 0
-~
:~
"-
14
()
-f----f
45 48 47
~
:~
....
"0
AI
CD
~t-
~
....
()
c::: «S >
,......
48 48
§§bJ
50
51 52 53 54 55
~Ej
....
"0
«
13
..,. ~.t--
...
~
....
,......
56 57 56 5g 60 61 82 83
~~ I-~ I-~
~r--1
t~
...
< I
12
. AI
.2.
© Ie MASTER 1983
(I) ()
AI
...>
..
CIJ
t~
.
9
15
1---
41 42 43
8
....
~~e>J §s
....
.
~
r-
4(1
7
..,. .•
32 33 34 35 :Ie 37 :Ie 38
oa:
16
f-r--1
2g
30
en ~ a:
..,.
- "C
-
48
-~
:~ _>----I
53 54 55
8
.....
< t--
,....
~
~~
57 51 59 60 61 62 63
1-)--
12
I-~
f-~
~p '-
...
~
~
.2
O"
o ,
612
13
~p
... ....I 56
9
"'0
«
13
.....
~r-
...~
§~
56 57 58 59 60 61 62
r-~ ~~
12
~f----(
t~
53
...
--
12
I-~
tS
... ...>
....
- ""0
"----------------- Package P = Molded DIP (Commercial Only) D = Hermetic DIP L = Chip-Pak™.
«
·Chip-Paks are rated at maximum case temperature only.
Chip-Pak is a trademark of Advanced Micro Devices, Inc.
@
Ie MASTER 1983
617
84003 AUTO CLOCK Features
General Description
o o
The S4003 Auto Clock is a PMOS integrated circuit which has found wide application in auto, avionic and marine applications as a portable or dashboard clock and as an industrial timer.
o o o o
12 Hour,-4 Digit Auto Clock. Elap~ed Time Counter (resettable, range to 99 hours). Calendar (4-year calendar with pin" option for European date/month reversal). Ignition-Sensing Display Cut-off (to reduce battery drain when the auto is not operating). Crystal Input Accuracy (uses inexpensive 4.194 mHz crystal). Direct Display Drive (4-digit vacuum fluorescent displays, 24 Volts).
A functional description of the inputs/outputs and registers follows: 1. Set Inputs - Left digits set and right digits set will index the selected register at a 2Hz rate. Indexing either input will not ~pset the unselected digits. 2. Time Set Select- Enables set inputs to the timekeeping register. When updating hours, the minutes display will blank out and MX1 digit will display Aor P. Minutes will update in a normal manner and reset seconds to zero. Seconds will restart on release of the time set select line. When deselected, the time will con· tinue to be displayed for 5 seconds ± 1 seconds. AM and PM indications will switch on the transfer from 11:59 to 12:00.
Applications/Markets Automotive Avionics Marine Portable Clocks Industrial
Block Diagram
Pin Configuration
o
c:
en
Vss
INPUTS
C>
(7)
E Q)
r------------------------l I
-t-'
en >en
II:
:z:
I I
OSCILLATOR
I I
o Jo...
I
.2
:2E c:
ctS
o
.i:
CONTROL lOGIC
I
Q)
I
E
«
I
I I I
I
I
AID
I
I IL
COLON' SEG DRIVE OUTPUTS __________________________ 28
--1
~ !i
G E
OUTPUTS
618
@
Ie MASTER 1983
F=AIRCHILD A Schlumberger Company
181 54F/74F181 4-BIT ARITHMETIC LOGIC UNIT CONNECTION DIAGRAM
DESCRIPTION-The 'F181 is a 4-bit Arithmetjc Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations. It is 40% faster than the Schottky ALU and only consumes 30% as much power.
• PROVIDES 16 ARITHMETIC OPERATIONS ADD, SUBTRACT, COMPARE, DOUBLE, PLUS TWELVE OTHER ARITHMETIC OPERATIONS • PROVIDES ALL 16 LOGIC OPERATIONS OF TWO VARIABLES EXCLUSIVE-OR, COMPARE, AND, NAND, OR, NOR, PLUS TEN OTHER LOGIC OPERATIONS. • FULL LOOKAHEAD FOR HIGH-SPEED ARITHMETIC OPERATION ON LONG WORDS
ORDERING CODE:
PKGS
COMMERCIAL GRADE
MILITARY GRADE
Vee = +5.0 V ±5%, T A = 0° C to +70° C
Vee = +5.0 V ±10%, TA = -55°C to +125°C
Plastic DIP (p)
74F181PC
Ceramic DIP (D)
74F181DC
PKG TYPE
9N 54F181DM
"C
6N
.s:::.
Flatpak (F)
54F181 FM
o
'0(ij 11.
4M
INPUT LOADING/FAN-OUT: DESCRIPTION
PIN NAMES
Ao-A3 80-83 SO-S3 M
en Fo-F3 A=8
"IT
p
Cn+4
A Operand Inputs (Active LOW) 8 Operand Inputs (Active LOW) Function Select Inputs Mode Control Input Carry Input Function Outputs (Active LOW) Comparator Output Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW) Carry Output
54F/74F (U.L.) HIGH/LOW 0.5/1.125 0.5/1.125 0.5/1.50 0.5/0.375 0.5/1.875 25/12.5 OC*/12.5 25/12.5 - 25/12.5 25/12.5
·OC - Open Collector
@
Ie MASTER 1983
619
F=AIRCHILD A Schlumberger Company
181 FUNCTIONAL DESCRIPTION-The 'F181 is a 4-bit high-speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function" Select inputs (SO-S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active-HIGH or active-LOW operands. The Function Table lists these operations. When the Mode Control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the Cn + 4 output, or for carry lookahead between packages using the signai"P (Carry Propagate) andG (Carry Generate). In the Add mode,P indicates thatF is 15 or more, whileG indicates thatF is 16 or more. In the Subtract mode,P indicates thatF is zero or less, whileG indicates thatF is less than zero.P andG are not affected by carry in. When speed requirements are not stringent, it can be used in a simple Ripple Carry mode by connecting the Carry output (Cn + 4) signal to the Carry input (Cn) of the next unit. For high-speed operation the device is used in conjunction with a carry lookahead circuit. One carry lookahead package is required for each group of four 'F181 devices. Carry lookahead can be provided at various levels and offers high speed capability over extremely long word lengths. The A=B output from the device goes HIGH when all fourF outputs are HIGH and can be used to indicate logicequivalence over four bits when the unit is in the Subtract mode. The A=B output is open collector and can be wired-AND with other A=B outputs to give a comparison for more than four bits. The A=B signal can also be used with the Cn + 4 signal to indicate A>B and A~-r--~~--+----+----~----+---~------~----+---~-----+----J
~
on;
cp----~~--------~--------~----~----------~--------_+----~
CWE----~--------------------~--------------------------_+------------~
U.
FIG. 2 CHECK WORD GENERATION DATA CHECK WORD ENABLE (NOTE lAND31 _ _ _
----..-------------------------------l
+-_____________
DATA PLUS CHECK BITS
~---.-___1
NOTE 2
1
CWE
F401 CRC GENERATOR! CHECKER
CLOCK - - - - - - - a C P
Qr-----~
__/
MR
.NOTE 2:
@)
Ie MASTER 1983
NOTES: 1. Check word Enable is HIGH while data is being clocked, LOW while transmission of check bits. 2. 'F401 must be reset or preset before each computation . 3. CRC check bits are generated and appended to data bits.
637
FAIRCHILD A 5chlumberger Company
402 CONNECTION DIAGRAM DIP (TOP VIEW)
54F/74F402
cp
EXPANDABLE CYCLIC REDUNDANCY CHECK GENERATOR/CHECKER
1
16 VCC
P2
15
DESCRIPTION-The 'F402 expandable Cyclic Redundancy Check (CRC) Generator/Checker is an expandable version ot the 'F401. It provides an advanced tool tor the implementation ot the most widely used error detection scheme in serial digital handling. ~ystelT.l~,.'.,:.:.,.A::\.4PbJ1 control input selects one-ot-six generator polyn~rn,Jal~;;;:;)t.h;~f.lts'11d{~pH1Y-namials includes CRC-16, CRC-CCITT and Ethernet, a~~':'~~I'r'g~:: ih'ree other standard polynomials (56th order, 48th order, 32nd order). Individual clear andpreset inputs are provided for floppy disk and other applications. The Error output indicates whether or not a transmission error has occurred. The CWG Control input inhibits feedback during check word transmission. The 'F402 is compatible with Fairchild Advanced Schottky TTL (FAST) devices and is tully co'mpatible with all TTL families.
so
10 RO 9
ER
LOGIC SYMBOL • • • • • • • •
GUARANTEED 20 MHz DATA RATE SIX SELECTABLE POLYNOMIALS OTHER POLYNOMIALS AVAILABLE SEPARATE PRESET AND CLEAR CONTROLS EXPANDABLE AUTOMATIC RIGHT JUSTIFICATION ERROR OUTPUT OPEN COLLECTOR TYPICAL APPLICATIONS FLOPPY AND.OTHER DISK STORAGE SYSTEMS DIGITAL CASSETTE AND CARTRIDGE SYSTEMS DATA COMMUNICATION SYSTEMS
15 14 13 12 4
5
50 51 52 53 D CWE CP
7
5EI
6
RFB
P MR
ER 0-9
D/CW
11
RO
10
vee = Pin 16 GND = Pin 8
PIN NAMES PIN NAMES' So-S3
P
MR SEI CP RFB
638
DESCRIPTION
Polynomial Select Preset Master Reset Serial Expansion Input Clock Register Feedback
PIN NAMES CWG D ER RD D/CW
DESCRIPTION Check Word Generate Data Error Register .Output Serial Data/Checkword
@
Ie MASTER 1983
FAIRCHILO A SChlumberger Company
402
FUNCTIONAL DESCRIPTION-The '74F402 Expandable Cyclic Redundancy Check (CRC) Generator/Checker is . an expandable 16-bit programmable device which operates on serial data streams and provides a means of detecting transmission errors. Cyclic encoding and decoding schemes for error detection are .based on polynomial manipulation in modulo arithmetic. For encoding, the data stream (message polynomial) is divided by a selected polynomial. This division results in a remainder (or residue) which is appended to the message as check bits. For error checking, the bit stream containing both data and check bits is divided by the same selected polynomial. If there are no detectable errors, this division results in a zero remainder. Although it is possible to choose many generating polynomials of a given degree, standards exist that specify a small number of useful polynomials. The '74F402 implements the polynomials listed in Table 1 by applying the appropriate logiC levels to the select.pins 80, 81, 8 2 , and 8 3.
BLOCK DIAG RAM
Polynomial Select
15 14 13 12
So S1 S2 S3
ROM
•
VCC= 16 GND= 8
CONTROL 2 Preset Master Reset 3 MR D
4 Data Check Word 5 Generate Register Feedback6
RFB
Serial Input 7
SEI
P
D/CW
11 Data/Checkword
16 BIT REGISTER RO
10 Re~ister Output
CP
-C
Clock
.c ERROR DETECTOR
(,)
ER
L.
·as LL
9 ERROR
The '74F402 consists of a 16 bit register, a Read Only Memory (ROM) and associated control circuitry as shown in the Block Diagram. The polynomial control code presented at inputs 80, 81, 8 2 , and 83 is decoded by the ROM, selecting the desired polynomial or part of a polynomial by establishing shift mode operation on the register with Exclusive OR (XOR) gates at appropriate inputs. To generate the check bits, the data stream is entered via the Data Inputs (D), using the Low-to-High transition of the Clock Input (CP). This data is gated with the most significant Register O.utput (RO) via the Register Feedback Input (RFB), and controls the XOR gates. The Check Word Generate (CWG) must be held High while the data is being entered. After the last data bit is entered, the CWG is brought Low and the check bits are shifted out of the register(s) and appended to the data bits (no external gating is needed).
@
Ie MASTER 1983
639
F=AIACHILD A Schlumberger Company
402
To check an incoming message for errors, both the data and check bits are entered through the 0 Input with the CWG Input held High. The Error O'utput becomes valid after the last check bit has been entered into the '74F402 by a Low-to-High transition of Cp, with the exception of the Ethernet polynomial (see applications paragraph). If no detectable errors have occurred during the data transmission, the resultant internal register bits are all Low and the Error Ouput (ER) is High. If a detectable error has occurred, ER is Low. ER remains valid until the next Low-to-High transition of CP or until the device has been preset or reset. A High on the Master Reset Input (MR) asynchronously clears the entire register. A Low on the Preset Input (P) asynchronously sets the entire register with the exception of: 1) The Ethernet residue selection, in which the registers containing the non-zero residue are cteared; 2) The 56th order polynomial, in which the 8 least significant register bits of the .least significant device are cleared; and, 3) 5 = 0, in which all bits are cleared.
TABLE 1
SELECT CODE HEX S3 S2 S1 SO
640
POLYNOMIAL
REMA~KS
0
L
L
L
L
C 0
H H H
H
L L
L H
0 X32+X26+X23+X22+X16+ X12+Xll +Xl0+X8+X7+X5+X4+X2+X + 1
Ethernet Polynomial
E F
H H
H H
H H
L H
X32+X31 +X27 +X26+X25+X19+X16+ X15+X13+X12+Xll +X9+X7 +X6+X5+X4+X2+X+1
Ethernet Residue
5=0
7
L
H
H
H
X16+X15+X2+ 1
CRC-16
B
H
L
H
H
X16+X12+X5+1
CRC-CCITT
3 2 4 8
L L H L L H L H L H L L
H L L L
5 9 1
L H L H H L L H L L L H
6 A
L H H L
X56+X55+X49+X45+X41 + X39.+X38+X37 +X36+X31 + X22+X19+X17 +X16+X15+X14+X12+Xll +X9+ X5+X+1 X48+X36+X35+ X23+X21+ X15+X13+X8+X2+1 X32+X23+X 21 +
H H
L L
Xll+X2+1
J
56th Order 48th Order 32nd Order
@
Ie MASTER 1983
FAIRCHILD A Schlumberger Company
402 TABLE 2 SELECT CODE
P3
P2
P1
pp
C2
C1
Cp POLYNOMIAL
~
~
~
~
~
1
~
~
S=~
C 0
1 1
1 1
1 1
1 1
1 1
~ ~
1 1
Ethernet Polynomial
E F
.~
~ ~
~ ~
~ ~
~ ~
~
1
~ ~
Ethernet Residue
~
~
CRC-16
~
7 1
1
~
~
CRC-CCITT
1 1 1 1
~ ~ ~ ~
~ ~ ~ ~
56th Order
~
1 1 1 1
1 1 1
1 1 1
1 1 1
~ ~ ~
~ ~ ~
48th Order
~ ~
~ ~
32nd Order
B 3 2 4 8 5 9 1
1 1 1
1 1
~
1 1 1
I
6 A
1 1
1 1
APPLICATIONS-In addition to polynomial selection there are four other ·capabilities provided for in the ROM. The first is set or clear selectability. The sixteen internal registers have the capability to be either set or cleared when P is brought 10w .. This set or clear capability is done in four groups of 4 (see Table 2, P~-P3). The second ROM capability (C~ is in determining the polarity of the check word. As is the case with the Ethernet polynomial the check word can be inverted when it is appended to the data stream or as is the case with the other polynomials, the residue is appended with no inversion. Thirdly, the HOM contains a bit (C1) which is used to select the RFB input instead of the SEI input to be fed into the LSB. This is used when the polynomial selected is actually a residue (least significant) stored in the ROM. In conjunction with this is another bit (C2) in the ROM which indicates whether the selected location is a polynomial or a residue. If the latter then it inhibits the RFB input. As mentioned previously, in general, upon a successful data transmission the CRC register has a zero residue. There is an exception to this, however, with respect to the Ethernet polynomial. This polynomial, upon a successful data transmission, has a non-zero residue in the CRC register (C7 04 DO 7B}16. In order to provide a no-error indication two ROM locations have been preloaded with the residue so that by selecting these locations and clocking the device one additional time, after the last check bit has been entered, will result in zeroing the CRC register. In this manner a no error indication is achieved.
"C
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"as
u.
With the present mix of polynomials the largest is 56th order requiring four devices while the smallest is 16th order requiring just one device. In orderto accomodate multiplexing between high order polynomials (>16th order) and lower order polynomials, a location of all zero's is provided. This allows the user to choose a lower order polynomial even if the system is configured for a higher order one (see Figure 3).
FIG. 1 SINGLE DEVICE USAGE SERIAL DATA
+5V
1 1
r
SEI
CP 74F402
RFB
ERIAL DATA/CW
tt t tt @
Ie MASTER 1983
641
F=AIRCHILO A SChlumberger Company
402 FIG. 2 MULTIPLE DEVICE USAGE Serial Data
Ctock Control
+5V
===:;=1~E=======:;:=i=E=======~=J1 CP
D
CWG
Error
SEt
Serial Data CW CW I MSBI
FIG. 3 32ND ORDER CONFIGURATION CRC-16 IMPLEMENTATION CONTROL SERIAL DATA CLOCK
l
cp
r
ERJ
CWG
SEI 74F402
r+ RFB
D/CW -Not
Used
P MR
S3S2S,SO
RO
tt tttt o
, ,I
I
J D
+5V
0'0 0 S: 0
I
CP
SEI
D
R1 CWG
74F402
r-
ER !-'a.--E RROR D/CW
RFB P MR, S3 S2S1 So
RO
r--s ERIAL DATA/CW ~C
W IMSBI
t t ot t t t
1 1 1 8=7 R1 =3200 1/4 WATT
PIN NAMES PIN NAMES SO-S3
DESCRIPTION Polynomial Select Preset
~
MR SEI
Master Reset Serial Expansion Input
CP RFB CWG
Clock Register Feedback Check Word Generate
D
Data
ER
Error
RO
Register Output
D/CW
Serial Data/Checkword
.r:. 0
L..
"cu u..
642
COMMENTS Used to select one of the six polynomials programmed into the device. See Table 1 for a breakdown of the entries. When LOW asynchronously sets the entire register based on the polynomial selected. In the cases of the ethernet residue selection or the all zero selection the register would be cleared. With respect to the 56 t?it p()lynomial, in the least significant device only, the eight most significant bits of the register are set, the remaining bits are cleared. In all other cases all bits of the register are set (See Table 2). When HIGH asynchronously clears all bits of the register. This input provides the capability for serially expanding the devices to accomodate higher order polynomials. When cascading devices, RO of the preceding device is connected tO,this input. When a device is used singly or is the least significant device, this input should be wired LOW. See Figures 1 and 2. Controls all register changes on the LOW to HIGH transition. This input in connected to RO of the most significant device. This input when held HIGH allows for generation of the check word or for checking a serial data stream for errors. Bringing this input LOW, after the last data bit has been entered, allows the check word bits to be shifted out of the register and be appended to the data bits. The input through which data and/or check bits are entered for check word generation/error detection. This open collector ouput, when LOW,indicates that the contents of the register are not zero. When checking for errors, after the data and check bits have been cycled through the device(s), this output should be HIGH to indicate no error in transmission. In multiple device configurations the ER outputs are tied together. The output for the most significant bit of the check word register. It is used to supply control to either RFB or SEI. This output is controlled by the state of CWG and the polynomial selected. When CWG is HIGH the D input is output; when CWG is LOW the check word register bits are shifted out. . (Note: When the Ethernet polynomial is selected and CWG is LOW, the check word bits are inverted.)
@
Ie MASTER 1983
FAIRCHILD
;
A Schlumberger Company
403 • 433 LOGIC SYMBOL
54F/74F403 • 54F/74F433
2
7
6
5
4
3
FIRST-IN FIRST OUT (FIFO) BUFFER MEMORY FAIRCHILD TTL MACROLOGIC 9 --0 IES
DESCRIPTION- The 'F403/F433 is an expanable fall-through type high-speed First-In First-Out (FIFO) Buffer Memory optimized for high speed disc or tape controllers and communication b,!Jffer applications. It is organized as 16 or 64 words by four bits aflQ·,~{T!AYtf:i;~)iexpanded to any number of words or any number of"QU§,,(J'1'lTl.4Jtfpfk;s (b~;.lour"). Data may be entered or extracted asynchronouslt:'!~\n ·{{~'erri'a·1 or parallel, allowing economical implementation of buffer memories.
TOP
13
'F403/'F433
14 --0 TOS 15-o0ES 16--0 CPSO
17-0 EO
The 'F4,03/F433 has 3-state outputs which provide added versatility and is fully compatible with all TTL families. • • • • • • •
IRF
8--0 CPSI
ORE
MR
11
18 19 20 21 22
vee = Pin 24
10 MHz SERIAL OR PARALLEL DATA RATE SERIAL OR PARALLEL INPUT SERIAL OR PARALLEL OUTPUT EXPANDABLE WITHOUT EXTERNAL LOGIC 3-STATE OUTPUTS FULLY COMPATIBLE WITH ALL TTL FAMILIES SLIM 24-PIN PACKAGE
GND
= Pin
12
CONNECTION DIAGRAM IRF
Vee
PL
23
0°S--------------------~
0
PL -
iFif
INPUT CONTROL
STACK CONTROL
ORE as
Do
BLOCK DIAGRAM
® CPSI o ies @ TIs
23
0,
21
00
02
20
at
03
19
02 03
Os
18
tJ>Si
17
EO
iES
16
CPSO
TTS
10
MR
11
14
TOS
"0
GNO
12
13
TOP
.c:
OES
....0 om
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-line Package.
14 X 4 STACK
LL
it @
OUTPUT CONTROL
@ f6 -----------------~p(~'PtI
@@@@
o
@
= Pin Numbers
Ie MASTER 1983
643
FAIRCHILD A Schlumberger Company
403.- 433 PIN NAMES PIN NAME
DESCRIPTION
00-03 Os PL
Parallel Data Inputs Serial Data Input Parallel Load Input
CPS I IES TTS OES TOS
Serial Input Clock Serial Input Enable Transfer to Stack Input Serial Output Enable Input Transfer Out Serial Input
TOP
Transfer Out Parallel Input
MR EO CPSO 00-03 Os IRF ORE
Master Reset Output Enable Serial Output Clock Input Parallel Data Outputs Serial Data Output Input Register Full Output Output Register Empty Output
COMMENTS
HIGH on PL ~nables 00- 03. Not edge triggered. Ones catching. . Edge triggered. Activates on falling edge. Enables serial and parallel input when LOW. A LOW on this pin initiates fall through. EnablAs serial and parallel output when LOW. A LOW on this pin enables a word to be transferred from the stack to the output register. (TOP must be HIGH also for the transfer to occur). Not edge triggered. A HIGH on this pin enables a word to be transferred from the stack to the output register. (TOS must be LOW for the transfer to occu r). Not edge triggered. Active LOW. Active LOW. Edge triggered. Activates on falling edge.
I
LOW when input register is full (Note b). HIGH when output register contai ns valid data.
FUNCTIONAL DESCRIPTION-As shown in the block diagram the 'F403/F433 consists of three sections:
"0
.c
e
1. An Input Register with parallel and serial data inputs as well as control inputs and outputs for input handshaking and expansion. 2. A 4-bit wide, 14 or 62 word deep fall-through stack with self-contained control logic. 3. An Output Register with parallel and serial data outputs as well as control inputs and outputs for output handshaking and expansion.
"(ij U.
Since these three sections operate asynchronously and almost independently, they will be described separately below:
Input Register (Data Entry): The Input Register can receive data in either bit-serial or in 4-bit parallel form. It stores this data until it is sent to the fall-through stack and generates the necessary status and control signals.
./
Figure 1 is a conceptual logic diagram of the input section. As described later, this 5-bit register is initialized by setting the F3f1ip-flop and resetting the other flip-flops. The O-output of the last flip-flop (FC) is brought out as the "Input Register Full" output (IRF). After initialization this output is HIGH. Parallel Entry-A HIGH on the PL input loads the 00-03 inputs into the Fo-F3 flip-flops and sets the FC flip-flop. This forces the IRF output LOW indicating that the input register is full. During parallel entry, the CPSI input must be LOW. If parallel expansion is not being implemented, IES must be LOW to establish row mastership (see Expansion section).
644
©
Ie MASTER 1983
F=AIRCHILD A Schlumberger Company
403 · 433 PL--4-~--------------~.-------~~-------r~------~
INITIALIZE ---t-----~----,
Os
----t-:---4 IRF
~---~~r-~-+
CPS I
__________-+________~________~~
------L-J
-----------.......-11----------.......-11--------_._+----------,
INPUT REG - STACK (PULSE DERIVED FROM TTsI
FIG. 1 CONCEPTUAL INPUT SECTION Serial Entry-Data on the Ds input is serially entered into the F3, F2, F1, Fa, FC shift register on each HIGH-to-LOW transition of the CPSI clock input, provided IES and PL are LOW. After the fourth clock transition, the four data bits located in the four flip-flops Fo-F3. The FC flip-flop is set, forcing the IRF output LOW and interanlly inhibiting CPSI clock pulses from effecting the register. Figure 2 illustrates the final positions in a 'F403 resulting from a 64-bit serial bit train. Bo is the first bit, B63 the last bit. Similar operation can be developed for 'F433. Transfer to the Stack-The outputs of Flip-Flops Fo-F3 feed the stack. A LOW level on the TTS input initiates a "fall-through" action. If the top location of the stack is empty, data is loaded into the stack and the input register is re-initialized. Note that this initialization is postponed until PL is LOW again. Thus, automatic FIFO action is achieved by connecting the IRF output to the TTS input. An RS Flip-Flop (the Request Initialization Flip-Flop shown in Figure 10) in the control section r~cords the fact that data has been transferred to the stack. This prevents multiple entry of the same word into the stack despite the fact the IRF and TTS may still be LOW. The Request Initialization Flip-Flop is not cleared until PL goes LOW. Once in the stack, data falls through the stack automatically, pausing only when it is necessary to wait for an empty next location. In the 'F403, as in most modern FIFO designs, the MR input only initializes the stack control section and does not clear the data.
INPUT Rl'~I~T..E!3.
____________ _
'F403
OUTPUT REGISTER
FIG. 2 FINAL POSITIONS IN A 'F403 RESULTING FROM A 64-BIT SERIAL TRAI N
@
Ie MASTER 1983
645
FAIRCHILD A Schlumberger Company
403 · 433 Output Register (Data Extraction)-The Output Register receives 4-bit parallel data words from the bottom stack location, stores it and outputs data on a 3-state 4-bit data bus or on a 3-bit serial data bus. The output section generates and receives the necessary status and control signals. Figure 3 is conceptual logic diagram of the output section . . . - - - - - - - - O U T P U T FROM S T A C K - - - - - - - ,
cPSO
OES-_ _ _
MR----~-~-----~-----~--------+------~~--~
TOP
FIG. 3 CONCEPTUAL OUTPUT SECTION Parallel Data Extraction-When the FIFO is empty after a LOW pulse is applied to MR, the Output Register Empty (ORE) output is LOW. After data has been entered into the FIFO and has fallen through to the bottom stack location, it is transferred into the Output Register provided the "Transfer Out Parallel" (TOP) input is HIGH. As a result of the data transfer ORE goes HIGH, indicating valid data on the data outputs (provided the 3-state buffer is enabled). TOP can now be used to clock out the next word. When TOP goes LOW, ORE will go LOW indicating that the output data has been extracted, but the data itself remains on the output bus until the next HIGH level at TOP permits the transfer of the next word (if available) into the Output Register. During parallel data extraction CPSO should be LOW. TOS should be grounded for single slice operation or connected to the appropriate ORE for expanded operation (see Expansion section).
"C
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...
ca u.
TOP is not edge trigg,ered. Therefore, if TOP goes HIGH before data is available from the stack, but data does become available before TOP goes LOW again, that data will be transferred into the Output Register. However, internal control circuitry prevents the same data from being transferred twice. If TOP goes HIGH and returns to LOW before data is available from the stack, ORE remains LOW indicating that there is no valid data at the outputs. Serial Data Extraction-When the FIFO is empty after a LOW pulse is applied to MR, the OutP.ut Register Empty (ORE) output is LOW. After data has been entered into the FIFO and has fallen through to the bottom stack location, it is transferred into the Output Register provided TOS is LOW and TOP is HIGH. As a result of the data transfer ORE goes HIGH indicating valid data in the register. The 3-state Serial Data Output, as: is automatically enabled and puts the first data bit on the outpJut bus. Data is serially shifted out on the HIGH-to-LOW transition of CPSO. To prevent false shifting, CPSO should be LOW wh.en the new word is being loaded into the Output Register. The fourth transition empties the shift register, forces ORE output LOW and disables the serial output, as (refer to Firjure 3). For serial operation the ORE output may be tied to the TOS input, requesting a new word from the stack as soon as the previous one has been shifted out.
646
@
Ie MASTER 1983
FAIRCHILD A SChlumberger Company
403 · 433 Horizontal and Vertical Expansion-The 'F403 and 'F433 can be expanded in both the horizontal and vertical directions without any external parts and without sacrificing any of its FIFO's flexibility for serial/parallel input and output. The interconnections necessary to form a 31-word by 16-bit FIFO are shown in Figure 4. Using the same technique, any FIFO of (15m + 1) words by (4n) bits can be constructed, where m is the number of devices in a cloumn and n is the number of devices in a row.
Figures 5 and 6 show the timing diagrams for serial data entry and extraction for the 31-word by 16-bit FIFO shown in Figure 4. The final position of data after serial insertion of 496 bits into the FIFO array of Figure 4 is shown in Figure 7. All applications shown for 'F403 can be adapted to the 'F433 with the depth of the stack being 64 locations rather than the 16 locations of 'F403 .
. - - - - - - - - - - - - - PARALLEL DATA INPUT - - - - - - - - - - - - - - - , 103020100 0 70 6 0 5 0 4 0 11 0 10 09 0 8 0150140130121
SERIAL DATA INPUT PARALLEL LOAD INPUT CLOCK
PL oS03D2D,DO ; - - -0 TTS
PL DSD3D2D,DO TTS
r-- -0
IES
~
CPSI
1
OES
'F403
~
CPSO
IRF
-0 ORE
OES
TOS
2 'F403
r-o
EO MR
IES L....(: CPSI
ORE
OES TOS
-
f-o EO MR
r
CL = 50pF
40 3
OBP C3> ns OBP (3)
2.5
::c
REPEATER MODE tRl tR2 tR3
UOI to BOO, BZO ECLK to BZO UOI to SOO, NVM NOTES:
--==....1
UNIPOLAR DATA IN BIPOLAR ONE IN BIPOLAR ZERO IN
DECODER CLOCK
TAKE DATA
7
COMMAND/DATA SYNC
5
~~~~~>=-==----______________~_~~::~-+19 SEND DATA
SERIAL DATA IN ENCODER SHIFT CLOCK
20
4
SERIAL DATA OUT
1
VALID WORD
__
9. .
~~~~DER CLOCK
r-
SYNC SELECT
ENCODER ENABLE
CAUTION: These devices are sensitive to electronic discharge. Proper I.C. handling procedures should be followed.
688
@
Ie MASTER 1983
Specifications HO-15530 ABSOLUTE MAXIMUM RATINGS
Supply Voltage
+7.0V
Input or Output Voltage Applied
GND -O.3V to Vee + O.3V
Storage Temperature Range
-65 0 e to + 1500 C
Operating Temperature Range -40 o e to +85 0 e
Industrial HD-15530-9 Military HD-15530-2
ELECTRICAL CHARACTERISTICS SYMBOL
D.C.
vee
= 5.0V ±S%
PARAMETER
= Industrial
TA
MINIMUM
VIH VIL VIHC VILC IlL VOH VOL ICCSB
Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" I nput Voltage (Clock) Logical "0" Input Voltage (Clock) Input Leakage Logical "1" Output Voltage Logical "a" Output Voltage Supply Current Standby
ICCOp CIN Co
-55 0 C to + 1250 e
TYPICAL
or Military MAXIMUM
UNITS
0.5
0.4 2
V V V V JlA V V mA
Supply Current Operating*
8.0
10.0
mA
Input Capacitance* Output Capacitance*
5.0 8.0
7.0 10.0
pF pF
70% Vee 20% VCC VCC -0.5 GND +0.5 +1.0
-1.0 2.4
TEST CONDITIONS
OV ~ VIN ~ VCC IOH = -3mA IOL = 1.8mA VIN = VCC = 5.25V Outputs Open VCC = 5.25V, f = 1MHz
*Guaranteed and sampled but not 100% tested.
ENCODER TIMING Vee
A.C.
FEC FESC TECR TECF FED TMR TE1 TE2 TE3 TE4 TE5 TE6 TE7 TE8 TE9
= 5.0V ±5%
TA
= 5.0V ±5%
or Military
a a
Encoder Clock Frequency Send Clock Frequency Encoder Clock Rise Time Encoder Clock Fall Time Data Rate Master Reset Pulse Width Shift Clock Delay Serial Data Setup Serial Data Hold Enable Setup Enable Pulse Width Sync Setup Sync Pulse Width Send Data Delay Bipolar Output Delay
DECODER TIMING Vee
= Industrial
15 2.5 8 8 1.25
0 150
80 50 50 90 100 55 150
a
TA
= Industrial
50 130
MHz MHz ns ns MHz ns ns ns ns ns ns ns ns ns ns
CL
= 50pF
~
0 ...... 0
::l
or Military
"0 s::::::
A.C.
FDC TDCR TDCF FDD TDR TDRS TMR TD1 TD2 TD3 TD4 TD5 TD6 TD7 TD8 TD9 TD10 TD11
Decoder Clock Frequency Decoder Clock Rise Time Decoder Clock Fall Time Data Rate Decoder Reset Pulse Width Decoder Reset Setup Time Master Reset Pulse Width· Bipolar Data Pulse Width Sync Transition Span One Zero Overlap Short Data Transition Span Long Data Transition Span Sync Delay (ON) Take Data Delay (ON) Serial Data Out Delay Sync Delay (OFF) Take Data Delay (OFF) Valid Word Delay NOTE
© Ie MASTER 1983
5V
mA mA
Vee = 5.SV, outputs disabled Vce 5.25V. outputs disabled
NOTE 2, Vce = 5.25V
=
2. Max. dissipation or1 ms duration should not be exceeded. 3 All TYP. values al TA 25°C Vee 5V.
=
=
~MITEL 704
See Page 714 for Package Information.
@
Ie MASTER 1983
ISO-CMOS. 3-State Octal Buffers/Line Drivers
6DMITEL Switching Characteristics. Vee
5V, TA = 25° e TYP
MAX
UNIT
TEST CONDITION (Figure 3)
M 054/74SC240 M 054/74SC241/4 M 054/74SC540 M 054/74SC541
19 21 22 26
35 38 40 45
ns
Al = 667~ Ac = 01 Cl 45pF
tpHl
M 054/74SC240 M 054/74SC24114 M 054/74SC540 M 054/74SC541
20 23 24 27
35 40 40 45
ns
Output enable time to low level
tpZl
M 054/74SC240 M 054/74SC241/4 M 054/74SC540 M054/74SC541
21 22 35 39
40 42 52 58
Output enable time to high level
t pZH
M 054/74SC240 M 054/74SC241/4 M054/74SC540 M 054/74SC541
20 21 26 28
35
M054/74SC240 MD54/74SC241 14 M 054/74SC540 M054/74SC541
22 24 25 30
35 38
PARAMETER
SYMBOL
Propagation delay time Low to high output
t plH
Propagation delay time high to low input
Output disable time from low level
t pLZ
DEVICE
MIN
38 45 45
=
=
ns
ns
38 45
Output disable time from high level
t pHZ
M 054/74SC240 M 054/74SC241/4 M 054/74SC540 M054/74SC541
42 48 35 37
55 60 48 48
ns
Output disable time from low level
. t pLZ
M 054/74SC240 M 054/74SC241/4 M 054/74SC540 M 054/74SC541
22 24 25 30
35 38 38 45
ns
Output disable time from high level
tpHZ
M 054/74SC240 M054/74SC241/4 M 054/74SC540 M 054/74SC541
30 33 25 27
40 45 36 36
Input Capacitance
C1
M 054/74SC240 M054/74SC241/4 M 054/74SC540
3 3 3 3
8 8 8 8
tv1 n"i.i '"7 4~r."i4
Al = 667~ Ac 5K ... C l = 5pF
ns
Al Ac Cl
= 667... = 1K ... = 5pF
ns
pF
Voltage Waveforms tr= 15 ns
tf=6 ns Test point
Vil
INPUT
~
.....(.)o
Vee
= OV
::J
"C VO H
.~
e'l
1,3V VOL
OUTPUT
c o
From output under test
VOH
E 0>
en 0>
~
Val
~
C L includes probe and jig capacitance. All diodes are 1N916 or 1N3064.
Propagation Delay Times
VIH
113V
OUTPUT ENABLE
VIL
= 3V = OV
VOH ILl O.5V Enable, Disable Times
OUTPUT ---------------
@
Ie MASTER 1983
1 O.5V IHl
...
Fig.3 See Page 714 for Package Information.
Val
= 2.5V
VOL VO H VOl VOL
705
~u~ .MITEL
rm ~.r
ISO-CMOS Octal Bus Transceivers with 3-State Buffered Outputs
Technical Data
MD54SC245.
MD54SC545
MD74SC245.
MD74SC545
OCT 'B2
Features
Ordering Information • Pin compatible with 54/74LS245 types 'MD54SCXXXAC 20 Pin, Cerdip MD74SCXXXAC 20 Pin, Cerdip MD74SCXXXAE 20 Pin, Plastic DIP
• Low power ISO-CMOS technology • Short propagation delay • Bus oriented 3-state outputs • CMOS inputs reduce DC loading • FullyTTL compatible, inputs and outputs
Description
~
o ..... (,)
::s
"C
c
o
(,)
E Q)
en
These octal bus transceiver circuits are designed for high-speed asynchronous two-way communication between data buses. The control function inputs minimize external timing requirements. The devices provide data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control input (DIR) pin. The enable input (G) pin can be used to disable the device outputs so that the buses are effectively isolated from each other. The M054/74SC545 differs from the M054/74SC245 by use of inverting buffers. Device Selection
CD :::
Product
~
706
Format
Output
M 054/74SC245 .
Bi-directional Buffer
non-inverted
M 054/74SC545
Bi-directional Buffer
inverted
See Page 714 for Package Information.
©
Ie MASTER 1983
ISO-CMOS Octal Bus Transceivers with 3-State Buffered Outputs
Connection and Logic Diagram DIP (TOP VIEW] MD54/74SC245
MD54/74SC545
Fig. 1
Function Table INPUT ENABLE (G) L L
OUTPUT Control(DIR) L
H
·X
H
Pin Function OPERATION B-A A-B ISOLATlON
Pin Ao - A7 Bo - B7
Description Bus A, Data Inputs/Outputs Bus B, Data Inputs/Outputs
o
o
::J
DIR
G
s~
Direction Control Input
"0 C
o
Enable Input, Active LOW
o E
Positive Supply Voltage
en
Q)
Vee Vss/GND
Q) ~
System Ground
eMITEL @
Ie MASTER 1983
See Page 714 for Package Information.
707
ISO-CMOS Octal Bus Transceiver§?
~MITEL
with 3-State Buffered Outputs
Abeolute Maximum Ratings PARAMETER
SYMBOL
Supply voltage
VALUE MD74se' - 0.5V to 7.0V - 0.3V to Vec + 0.3V
VCC Vj
Input vOltage Output current, per output
MD54se' -O.5V to 7.0V -0.3V to Vee + 0.3V
±
10
±75mA
Operating temperature
TA
- 40·C to + 85·C
-55°e to
+ 125°e
Storage temperature
TS P
- 65·C to + 150°C
-65°e to
+150 o e
Package Power dissipation Note:" Exceedinp these ratings may cause permanent damage.
450mW
75 mA
450 mW
Functional operation under these conditions is not implied.
Recommended Operating Conditions PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
VCC
2
5
6.5
V
VI
Supply voltage Input voltage Operating free·air temperature
I I
0
VCC
V
MD74'
TA
0
70
·C
MD54'
TA
-55
125
°e
1 Voltage vatues are with respect te VSSIGND
Electrical Characteristics Over Recommended Operating Free-Air Tenlperature Range PARAMETER High level input voltage
VIH
low level input voltage
Vll
High level output voltage
L-
....ao
:J "'C
low level output voltage
c:
a
o
E Q)
en
MIN
SYMBOL
TYP
Val
Input current at maximum input voltage
II
High level input current
IIH
Q)
TEST CONDITIONS
UNIT VCC = 5.5V
MD54'
2
V
MD74'
2
V
VCC = 5.25V
0.8
V
VCr:; = 4.5V
0.8
MD54' MD74'
VOH
MAX
V
VCC = 4.75V
MD54'
2.4 3.5
V
VCC = 4.5V, 10H =-5mA, 10H =-3mA
MD74'
2.4 4.0
V
VCC = 4.75V, 10H = -14mA 10H = -3mA
MD54'
0.4
V
Vcc = 4.5V, 10l = 6.5mA
MD74'
0.4
V
Vee = 4.75V, 10L = 10mA
MD54'
15
JJA
Vee
MD74'
15
JJA
Vee
MD54'
10
uA
Vec
MD74'
10
uA
Vec
MD54'
-10
uA
Vee
MD74'
-10
uA
Vce
~
~
low level input current
Off-state output current high·level voltage applied Off·state output current low·level voltage applied
IlL
10ZH
10Zl
Short circuit output current
lOS
Quiescent supply current
ICC
MD54'
20
uA
Vee
MD74'
20
JJA
Vee
MD54'
-20
JJA
Vce
MD74'
-20
uA
Vee
MD54' M074 MD54' MD74'
mA .mA
-40 -40 0.5 0.1
mA mA
= 5.5V, VI = 5.85V = 5.25V, VI = 5.55V = 5.5V, VI = 2.7V = 5.25V, VI = 2.7V = 5.5V, VI = 0.4V = 5.25V, VI = 0.4V = 5.5V, Va = 2.7V = 5.25V, Va = 2.7V = 5.5V, Va = 0.4V = 5.25V, Va = 0.4V
NOTE 2 vee NUH:
(J)
CO
o
~
o ...... o
~
731
®
MOTOROLA
ALS TTL 54ALSOO/74ALSOO Integrated Circuits The Advanced Low Power Schottky TTL family (ALS TTL) provides a 50% power reduction compared to standard 54/74LS TTL and yet offers improved circuit performance over the standard LS due to Motorola's state-of-the-art oxide isolated process (MOSAIC). This is a new product line; contact your Motorola representative for complete details and current introduction status.
SN54ALSOO Series ( - 55 to + 125°C) SN74ALSOO Series (0 to + 70°C) Suffix:
J ... Ceramic (54/74 series)
Function Octal Transceiver W/Storage/ Open Collector Octal Transceiver W/Storage/ 3-State Octal Bus Transceiver/lnverting/ 3-State Octal Bus Transceiver/3-State Octal Bus Transceiver/lnverting/ 3-State
ALS623 ALS TTL INTRODUCTION LIST ALS63B Device
Function
Available
Pins
Device
Function
ALSOO ALSOI
Quad 2-lnput NAND Gate Quad 2-lnput NAND Gate. Open-Collector Ouad 2-lnput NOR Gate Quad 2-lnput NAND Gate. Open-Collector Hex Inverter Hex Inverter. Open-Collector Ouad 2-lnput AND Gate Ouad 2-lnput AND Gate. Open-Collector Triple 3-lnput NAND Gate Triple 3-lnput AND Gate Triple 3-lnput NAND Gate. Open-Collector Dual 4-lnput Schmitt Trigger Hex Schmitt Trigger Triple 3-lnput Schmitt Trigger Dual 4-lnput NAND Gate Dual 4-lnput NAND Gate. Open-Collector Triple 3-lnput NOR Gate Ouad 2-lnput NOR Buffer Ouad 2-lnput OR Gate Ouad 2-lnput NOR Buffer. Open-Collector Quad 2-lnput NAND Buffer Dual 4-lnput NAND Buffer Dual 4-lnput NAND Buffer Dual 0 Flip Flop Dual J-K Flip Flop W/Preset Ouad 2-lnput Schmitt Trigger 1-01-8 Decoder/Demultiplexer Dual 1-01-4 Decoder/ Demultiplexer 8-lnput Multiplexer Dual 4-lnput Multiplexer Ouad 2-lnput Multiplexer/ Non-Inverting Quad 2-lnput Multiplexer/ Inverting BCD Decade Counter/ Asynchronous Reset (9910 Type) 4-Bit Binary Counter. Asynchronous Reset (9316 Type) BCD Decade Counter/ Synchronous Reset 4-Bit Binary Counter/ Synchronous Reset 8-Bit Serial-In/Parallel-Out Shift Register 4-Bit Up/Down Decade Counter Synchronous Reset 4-Bit Up/Down Binary Counter/ Synchronous Reset Up/Down Decade Counter Up/Down Binary Counter Up/Down Decade Counter W/Clear
Now
14
ALS193
4082 1083
14 14
ALS238
4082 Now Now Now
14 14 14 14
Up/Down Binary Counter W/Clear 1-01-8 Decoder/Demultiplexer/ (Active High Outputs) Dual 1-01-4 Decoder/ Demultiplexer/(Active High Outputs) Octal Bus/Line Driver/lnverting/ 3-State Octal Bus/Line Driver/3-State Ouad Bus Transceiver/ Inverting/3-State Ouad Bus Transceiver/ Non-lnverting/3-State Octal Driver/Non-Inverting/ 3-State Octal Bus Transceiver/ Non-lnverting/3-State 8-lnput Multiplexer/3-State Dual 4-lnput Multiplexer/ 3-State Ouad 2-lnput Multiplexer/ Non-lnverting/3-State Ouad 2-lnput Multiplexer/ Inverting/3-State Octal 0 Flip Flop W/Clear Dual 4-Multiplexer/lnverting ALS 153 Dual 4-Multiplexer/3-State ALS 352 Octal Transparent Latch/ 3-State Octal 0 Flip Flop/3-State Octal 0 Flip Flop W/Enable Octal Transparent Latch/ Inverting Octal D-Type Flip Flop/Inverting 1-01-10 Decoder/3-State 1-01-8 Decoder/3-State Dual 1-01-4 Decoder/3-State Octal Buffer/3-State Octal Buffer/3-State 4-Bit Decad~ Counter/3-State 4-Bi Binary Counter/3-State 8-Bit Latch/3 State Octal 0 Flip Flop/3-State Decade Up/Down Counter/ 3-State Binary Up/Down Counter/ 3-State Octal Transparent Latch/ 3-State Octal 0 Flip Flop/3-State Octal 0 Flip Flop/lnverting/ 3-State Octal Transparent Latch/ Inverting/3-State Octal Transceiver W/Storage/ 3-State Octal Transceiver W/Storage/ Open Collector
ALS02 ALS03 ALS04 ALS05 ALS08 ALS09 ALS10 ALSII ALS12 ALS13 ALS14 ALS15 ALS20 ALS22 ALS27 ALS28 ALS32 ALS33
~
o ..... o
:J
"'C
c: o o
E Q)
en
ctS
o .....o o ~
~
ALS37 ALS38 ALS40 ALS74 ALS109 ALS132 ALS138 ALS139 ALS151 ALS153 ALS157 ALS158 ALS160
ALS161
ALS162 ALS163 ALSI64 ALS168 ALS169 ALS190 ALS191 ALS192
ALS239
1083 1083 1083
14 14 14
1083 2083 2083 1083 4082
14 14 14 14 14
4082 1083 4082 4082
14 14 14 14
4082 4082 4082 4082 Now 4082 2083 4082
14 14 14 14 14 16 14 16
4082 1083 4082
16 16 16
4082
16
4082
16
4082
16
4082
16
4082 4082 1083 1083
16 16 14
ALS240 ALS241 ALS242 ALS243 ALS244 ALS245 ALS251 ALS253 ALS257 ALS258 ALS273 ALS352 ALS353 ALS373 ALS374 ALS377 ALS533 ALS534 ALS537 ALS538 ALS539 ALS540 ALS541 ALS560 ALS561 ALS563 ALS564 ALS568 ALS569 ALS573 ALS574 ALS576
16 ALS580
1083 4082 4082
16 16 16
4082
16
ALS620 ALS621
Available
Pins
4082
16
ALS639 ALS640
4082
16
ALS641
4082
16
Now Now
20 20
ALS644
Now
14
ALS646
Now
14
Now
20
Now 1083
20 16
4082
16
1083
16
ALS671
1083 Now
16 20
ALS672
4082
16
ALS642 ALS643
ALS647
ALS648 ALS649
ALS690 4082
16
1083 1083 Now
20 20 20
ALS691
ALS692 1083 1083 1083 1083 1083 2083 2083 1083 1083 2H83 2H83
20 20 20 20 20 20 20 20 20 20 20
4082
20
4082
20
2H83 2H83
20 20
Available
Device ALS622
ALS693
ALS694
ALS695
ALS696 ALS697 ALS698 ALS699
2H83
20
ALS790
2H83
20
Now
20
ALS873 ALS874 ALS876 ALS880
Now
20
Octal Bus Transceiver/ Non-Inverting/Open Collector Octal Bus Transceiver/lnverting/ Open Collector Octal Bus TransceiverfTrue/ Inverting/3-State Octal Bus TransceiverfTrue/ Inverting/Open Collector Octal Transceiver/Latch/ Multiplexer/Non-Inverting/ 3-State Octal Transceiver/Latch/ Multiplexer/Non-Inverting/Open Collector Octal Transceiver/Latch/ Multiplexer/lnverting/3-State Octal Transceiver/Latch/ Multiplexer/Inverting/Open Collector Binary Bidirectional Shift Register/Latch/Multiplexer/ 3-State BCD Bidirectional Shift Register/Latch/Multiplexer/ 3-State Decade Counter/Latch/ Multiplexer/Asynchronous Reset/3-State Binary Counter/Latch/ Multiplexer/Asynchronous Reset/3-State Decade Counter/Latch/ Multiplexer/Synchronous Reset/3-State Binary Counter/Latch/ Multiplexer/Synchronous Reset/3-State Decade Counter/Latch/ Multiplexer/Synchronous/ Asynchronous Reset/3-State Binary Counter/Latch/ Multiplexer/Synchronous/ Asynchronous Reset/3-State Decade Counter/Register/ Multiplexer/3-State Binary Counter/Register/ Multiplexer/3-State Decade Counter/Register/ Multiplexer/3-State Binary Counter/Register/ Multiplexer/3-State Error Detection and Correction Circuit Octal Transparent Latch Octal 0 Flip Flop Octal 0 Flip Flopllnverting Octal Transparent Latch/ Inverting
Pin.
Now
20
Now
20
Now Now
20 20
Now
20
Now
20
Now
20
Now
20
Now
20
1083
24
1083
24
1083
24
1083
24
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082
20
4082 See F2960 2H83 2H83 2H83
20
2H83
24
24 24 24
MOSAIC is a trademark of Motorola Inc.
732
© IC MASTER 1983
®
High·Speed CMOS Logic Family
MOTOROLA
SEMICONDUCTORS 3501 ED BLUESTEIN BLVD., AUSTIN, TEXAS 78721
For the first time, a higher-performance standard digital logic family is available that combines the popular features of CMOS and the traditional characteristics of LSTTL. Previously, designers were forced to choose between CMOS low power dissipation and good noise immunity and LSTTL high operating frequencies, short propagation delays, and good fanout or drive capability. The best of both technologies is now available in Motorola's newest digital logic family - High-Speed CMOS Logic (MC54174HC). Higher performance is available for most applications yielding speed improvements as well as significant cost savings. The family is composed of gates, flip-flops, buffers, octal devices and various MSI functions such as counters, shift registers, and decoders. Many of the popular CMOS and LS functions have been incorporated into the new logic family with full pinout capability for each function. In addition, the family has temperature ratings of - 40 to + 85°C (74 series) and - 55 to 125°C (54 series) for both commercial and highreliability requirements. The base LS supply voltage of 5 V ± 10% has been increased to a full rating of 2-6 V with the absolute maximum limited at - 0.5 and 7 V. Because of its extra speed and performance, the High-Speed CMOS Logic Family provides an ideal interface for CMOS memory and microprocessor system applications. Examples of the increased operating parameters are shown in the charts below.
Family Comparisons in Key Specifications (Typical Gate) Specification
CMOS
LS
HC
Propagation Delay (tPHL/tPLH) Quiescent Power Dissipation
300 ns
15 ns
15 ns
40p.W
22mW
l00p.W
Input Current
±1.0p.A
0.1 mA
± 1.0p.A
Maximum Operating Frequency (fmax)
>1 MHz
30 MHz
30 MHz
1 Load
10 Loads
10 Loads
29% VCC 29% VCC 7.5p.A
8% VCC 14% VCC 4.4 mA
19% Vec 29% VCC 20p.A
-40 to +85°C
o to
-40 to +85°C
Fanout Capability (LS Drive) Worst Case Noise Margins VNL VNH Quiescent Current (Per Package) Operating Temperature
-55 to + 125°C
+ 70°C -55 to
+ lZ5°C
-55 to + 125°C
Forty-three (43) devices are available through September 1982, with specific device introductions continuing through 1983. Contact your Motorola representative for pricing and sample availability.
MC54/74HCXXX
SWITCHING CHARACTERISTICS (Tentative Maximum Values)
Symbol
Parameters
f max
Maximum Clock Frequency
tPHLI tPLH
Prop. Delay, Clock to Q
74HCOO Gate
30 MHz 30 MHz 18 ns
30 ns
26 ns
tsu
Setup Time, Data to Clock
20 ns
20 ns
th
Hold Time, Clock to Data
o ns
o ns
tw
Pulse Width, Clock and Clear
16 ns
16 ns
tr
Input Clock Rise Time
500 ns 500 ns
500 ns
CPD·
Power Dissipation 100 pF 100 pF
100 pF
tpZLI tpZH
Three-State Enable Time
15 ns
100 pF
30 ns
25 ns tpLzl Three-State Disable Time tpHZ • CPD is an equivalent device capacitance for calculating power dissip'ation using PD = CPD V CC 2f
INITIAL PRODUCT LINE BY FUNCTION Function NAND/NOR AND/OR Excl usive-O RI Excl usive- NOR Invertersl Buffers
'0 0 ::J
Number of Devices
+'"
24
Gates 11
"C
3 2 8
C
0 0
Flip Flops/ Latches
18
E
Registers Shift Register Storage
6 5 1
en
Counters Binary Decade
7 5
Q)
ctS
(5 "-
12
0 0
+'"
Decoders/ Encoders
17
Transceiversl Line Drivers Octal Bus Transceiver Quad Bus Transceiver Octal Buffer/Line Driver
11 6 2 3
Others Multivibrators Comparators Parity Generator TTL-to-CMOS Level Translator
2 2 1 6
TOT AL DEVICES
© Ie MASTER 1983
74HC244 74HC74 D Flip- 74HC194 Bus Register Driver Flop
~
11
99
733
~
National Semiconductor
MM74HCXXXX High Speed CMOS Logic Family Combines: CMOS J.LW Power Dissipation CMOS High Noise Immunity With LS Equivalent Speeds LS Output Drive LS Pinout
SYSTEM POWER vs FREQUENCY MM74HC va LSTTL Ii?
'00
~
0
~-
...
WORST CASE TYPICAL HIGH·SPEED CMOS SYSTEM
~
"-
WORST CASE TYPICAL
~~ "",:"..0
I
7 ~
1m
THE SYSTEMS CONSIST OF: 200 GATES 150 COUNTERS 150 FUll ADDERS
V l..o'
10m
•
lsm !!lli!-
IK
~
100m 100
Ct. 50pFAU
V
IK
OUTPUTS
10K lOOK 1M FREQUENCY OF SYSTEM IHzl
10M
100M
HIGH SPEED CMOS PRODUCT GUIDE NAND I NOR Gates MM54HCOO! MM74HCOO Quad 2·lnput NAND Gate MM54HC02 I MM74HC02 Quad 2·lnput NOR Gate MM54HC10! MM74HC10 Triple 3·lnput NAND Gate MM54HC20! MM74HC20 Dual 4·lnput NAND Gate MM54HC27! MM74HC27 Triple 3·lnput NOR Gate MM54HC30! MM74HC30 B·lnput NAND Gate MM54HC133! MM74HC133 13·lnput NAND Gate MM54HC4002 ! MM74HC4002 Dual 4·lnput NOR Gate MM54HC407B! MM74HC407B B·lnput NOR Gate MM54HCOB! MM74HCOB Quad 2·lnput AND Gates MM54HCll ! MM74HCll Triple 3·lnput AND Gate MM54HC32 ! MM74HC32 Quad 2·lnput OR Gate MM54HCB6 ! MM 74HCB6 Quad 2·lnput Exclusive·OR (XOR) Gate MM54HC266 ! MM74HC266 Quad 2·lnput Exclusive NOR (XNOR) Gate MM54HC4075 ! MM74HC4075 Triple 3·lnput OR Gate
MM54HC174 I MM74HC174 Hex 0 Flip·Flop with Clear MM54HC1751 MM74HC175 Quad D-Type Flip·Flop with Clear MM54HC259 I MM74HC259 8·Bit Addressable Latch I 3·t0-8 Line Decoder MM54HC373 I MM74HC373 TRI·STATE Octal D-Type Latch MM54HC374 I MM74HC374 TRI-STATE Octal D·Type Fllp·Flop MM54HC533 I MM74HC533 TRI·STATE Octal D·Type with Inverting Outputs MM54HC534 I MM74HC534 TRI·STATE Octal D·Type Flip·Flop with Inverting Outputs MM54HC563 I MM74HC563 TRI·STATE Octal D·Type Latch with Inverting Outputs MM54HC564 I MM74HC564 TRI·STATE Octal D·Type Flip·Flop with Inverting Outputs MM54HC573 I MM74HC573 TRI·STATE Octal D·Type Latch MM54HC574 I MM74HC574 TRI·STATE Octal D·Type Flip·Flop MM54HC646 I MM74HC646 Non·inverting Octal Bus Transceivers I Registers MM54HC648 I MM74HC648 Inverting Octal Bus Transceivers I Registers MM54HC4301 I MM74HC4301 TIL Input Octal TRI·STATE Latch (Inverting) MM54HC4302 I MM74HC4302 TIL Input Octal TRI·STATE Latch MM54HC4303 I MM74HC4303 TIL Input Octal TRI·STATE Flip·Flop (Inverting) MM54HC4304 I MM74HC4304 . TIL Input Octal TRI·STATE Flip·Flop
Inverters I Non·lnvertlng '!Suffers I Bus Drivers
Shift Registers
MM54HC04 I MM74HC04 Hex Inverter MM54HC240! MM74HC240 Inverting Octal TRI·STATE~ Buffer MM54HC241 ! MM74HC241 Octal TRI·STATE Buffer MM54HC244! MM74HC244 Octal TRI·STATE Buffer MM54HC365! MM74HC365 Hex TRI·STATE Buffer MM54HC3661 MM74HC366 Inverting Hex TRI·STATE Buffer MM54HC367 I MM74HC367 Hex TAI·STATE Buffer MM54HC368 I MM74HC368 Inverting Hex TRI·STATE Buffer MM54HC4049! MM74HC4049 Hex Inverting Logic Level Down Converter MM54HC4050! MM74HC4050 Hex Logic Level Down Converter MM54HC4305 I MM74HC4305 TIL Input Octal TRI·STATE Inverting Buffer MM54HC4306 ! MM74HC4306 TIL Input Octal TRI·STATE Buffer
MM54HCl64 I MM54HC165 I MM54HC194 I MM54HC195 I MM54HC299 I
AND I OR I XOR I XNOR Gates
"-
o
+-'
o
:J "C r:::::
o .2
E Q)
en (ij r:::::
.2 +-' CO
Z
FIIp-FIopII Lak:t1es I Registerl
Bus Transceivers MM54HC242! MM54HC243! MM54HC245! MM54HC640 I MM54HC643! MM54HC6461 MM54HC648 !
MM74HC242 MM74HC243 MM74HC245 MM74HC640 MM74HC643 MM74HC646 MM74HC648
Inverting Quad TRI·STATE Transceiver Quad TRI·STATE Transceiver Octal TRI-STATE Transceiver Inverting Octal TRI·STATE Transceiver Octal TRI·STATE Transceiver Octal Bus Transceivers I Registers Inverting Octal Bus Transceivers I Registers
Schmitt Triggers MM54HC14 I MM74HC14 Hex Inverting Schmitt Trigger MM54HC1321 MM74HC132 Quad 2·lnput NAND Schmitt Trigger One Shots MM54HC123 I MM74HC123 Dual Monostable Multivibrator MM54HC221 ! MM74HC221 Dual Monostable Multivibrator MM54HC4538 I MM74HC4538 Retriggerable Monostable Multivibrator Arithmetic Circuits MM54HC85 I MM74HC85 4·Bit Magnitude Comparator MM54HC688 I MM74HC688 8·Bit Magnitude Comparator Flip-Flops I Latches I Registers MM54HC73 I MM74HC73 Dual J·K Flip·Flop with Clear MM54HC74! MM74HC74 Dual 0 Flip·Flop with Preset and Clear MM54HC75 I MM74HC75 4·Bit Bistable Latch with Q and 0 Qutput MM54HC76 I MM74HC76 Dual J·K Flip-Flop with Preset and Clear MM54HC77! MM74HC77 4-Bit Bistable Latch MM54HC1071 MM74HC107 Dual J·K Flip·Flop with Clear MM54HC109! MM74HC109 Dual J-K Flip-Flop with Preset and Clear MM54HCl12! MM74HCl12 ' Dual J·K Flip·Flop with Preset and Clear MM54HC173 I MM74HC173 TRI·STATEII Quad 0 Flip-Flop
734
MM74HCl64 MM74HC165 MM74HCl94 MM74HC195 MM74HC299
8·Bit 8·Bit 4·Bit 4·Bit 8·Bit
Serial·ln Parallel·Out Shift Register Parallel·ln Serial Out Shift Register Bidirectional Universal Shift Register Parallel·Shift Register TAI·STATE Universal Shift Aegister
Counters MM54HCl60 I MM74HCl60 Synchronous Decade Counter MM54HC161 I MM74HC161 Synchronous Binary Counter MM54HC162 I MM74HC162 Synchronous Decade Counter MM54HCl63 I MM74HCl63 Synchronous Binary Counter MM54HC192 I MM74HC192 Synchronous Decade Up I Down Counter MM54HC193 I MM74HC193 Synchronous Binary Up I Down Counter MM54HC390 I MM74HC390 Dual 4·Bit Decade Counter MM54HC393 I MM74HC393 Dual 4·Bit Binary Counter MM54HC4017 I MM74HC4017 Decade Counter I Divider with 10- Decoded Outputs MM54HC4020 I MM74HC4020 14 Stage Binary Counter MM54HC4040 I MM74HC4040 12 Stage Binary Counter MM54HC4060 I MM74HC4060 14 Stage Binary Counter Decoders I Encoders MM54HC42 I MM74HC42 BCD·to·Decimal Decoder MM54HCl38 I MM74HCl38 3·to-8 Line Decoder MM54HC139 I MM74HC139 Dual 2·to·4 Line Decoder MM54HC147 I MM74HC147 10·Line to 4·Line Priority Encoder MM54HCl54 ! MM74HCl54 4·to·16 Line Decoder MM54HC259 I MM74HC259 8·Bit Addressable Latch I 3·to-8 Line Decoder MM54HC280 I MM74HC280 Odd I Even Parity Generator I Checker MM54HC45111 MM74HC4511 BCD·to·7 Segment Latch I Decoder I Driver MM54HC4514 I MM74HC4514 4·Line to 16· Line Decoder with Latch MM54HC4543 I MM74HC4543 BDC·to·7 Segment Latch I Decoder I Driver for Liquid Crystal Displays Multiplexers MM54HC151 I MM54HC153 I MM54HCt57 I MM54HCl58 I MM54HC2511 MM54HC2531 MM54HC2571 MM54HC354 I MM54HC356 I
MM74HC151 MM74HCl53 MM74HC157 MM74HCl58 MM74HC251 MM74HC253 MM74HC257 MM74HC354 MM74HC356
8-Channel Digital Multiplexer Dual 4·lnput Multiplexer Quad 2·lnput Multiplexer Quad 2·lnput Multiplexer (Inverted Output) 8-Channel TAI·STATE'" Multiplexer Dual 4·Channel TAI·STATE Multiplexer Quad 2·Channel TAI·STATE Multiplexer 8·Channel TAI·STATE Multiplexers with Latches 8·Channel TAI·STATE Multiplexers with Latches
Contact your local National SemIconductor Sales Office or Distributor for more Information.
© Ie MASTER 1983
~
National Semiconductor NATIONAL SEMICONDUCTOR MOS/LSI
PART TYPE
DESCRIPTION
FEATURES
MM74CXXX-SERIES DISPLAY DRIVERS MM74C945n
4-digit up/down counter w/latch/decoder driver
• • • •
MM74C946N
4V~igit counter/decoder driver for LCD displays
• Direct 4Y2-digit 7-segment display drive • Carry output for cascading 4-digit blocks • Store and reset inputs
MM74C911
4-digit display controller
• TTL-compatible inputs • Internal oscillator • Segment expandability
MM74C912
fkiigit BCD display/driver
• TTL-compatible inputs • Internal-segment decoder • Direct-base drive-to-digit transistors
MM74C917
6-digit hex display/driver
• TTL-compatible inputs • Internal-segment decoder • Direct-base drive-to-digit transistors
4-decade U/D counter Schmitt trigger clock input Direct 4-digit drive Store and reset inputs
MM54XX-SERIES DISPLAY DRIVERS MM5450/51
34/35 segment LED
• Serial data in • Brightness control • . Data enable, cascadeable
MM5452153
32133 segment LCD
• Serial data in • Oscillator on-board • Data enable, cascadeable
MM5445/6n/8
33-35 segment VF
• Serial data in • Brightness control • Data enable, cascadeable
MICROPROCESSOR-COMPATIBLE CLOCKS MM58167A
MM58174A
8-bit bus clock
4-bit bus clock
~
o ..... (,) ::J
LOW-POWER CMOS
"0
c: o
• Time: 1/100 sec - months • RAM: 56 bits • Interrupts: 1 sec -1 month and RAM compare • • • •
Package: 24-pin Time: 1110 sec - years Interrupts: 0.5-, 5-, 6O-sec Package: 16-pin
(,)
E Q)
en as c: o ..... as
Z
DIGITAL CLOCK/RADIO MM5458/59
Alarm clock/radio
• • • •
LED duplex 12124-hour, 50/60 Hz Sleep/snooze Battery back-up
MM5466
Dual alarm clock/radio
• • • •
LED duplex 12124-hour, SO/50 Hz Sleep/snooze Battery back-up
© Ie MASTER 1983
735
~National
PRELIMINARY October 1982
~ Semiconductor
MM74HC942 300 Baud P2CMOS™ Modem General Description
Features
The MM74HC942 is a full duplex low speed modem. It provides a 300 baud bidirectional serial interface for data communication over telephone lines and other narrow bandwidth channels. It is Bell 103 compatible.
• All filtering, modulator, demodulator, line driver, and hybrid on single Ie
The device is manufactured on National's p2 CMOSTM process. Switched capacitor techniques are used to perform analog signal processing.
• Full duplex answer or originate modes - Bell 103 compatible • Low operating power plus "stand-by" power-down mode • Analog loopback for self test
MODULATOR SECTION
The modulator contains a frequency synthesizer and a sine wave synthesizer. It produces a phase coherent frequency shift keyed (FSK) output.
• ±5V supplies • Adjustable "carrier detect" and "transmit" levels
Applications
LINE DRIVER AND HYBRID SECTION
The line driver and hybrid are designed to facilitate connection to a 600 n phone line. They can perform two to four wire conversion and drive the line at dBm.
a
• Built-in low speed-modems - personal computers • Remote data collection • Radio telemetry
DEMODULATOR SECTION
• Credit verification The demodulator incorporates anti-aliasing filters, a receive filter. limiter, discriminator, and carrier detect circuit. The nine pole receive filter provides 60 dB of transmitted tone rejection. The discriminator is fully balanced for stable operation. p2
CMOS'"
IS
:s:
o c. C'D 3
• Stand-alone modems • Remote process control • Portable terminals
a trademark of National Semiconductor Corp,
Connection Diagram Dual-in-line Package
Block Diagram VCC
GNO
Vee
XTALS
XTALO
L-
a ...... 0
OSI
TLA
ALB
GNO
::J
"0 C
t - - t - SOT
a 0
CD
EXI TLA
E Q)
en
COT
TXA
(ij
RXO
RXA1
Vcc
RXA2
OSI
C
a
......
(lj
--t----t
TIMING AND CONTROL
t---t--
ALe
t--t-
OIA
t---t--
TXD
.....- ....- . .
--t~-
RXO TXA - - 1 - -......
--~::>--=====t---,
D-
E Q)
en
SP74SC373
SP74SC573
PIN CONFIGURATION
PIN CONFIGURATIOr.
SWITCHING CHARACTERISTICS Parameter Propagallon Time I~LM Data to Output tPHL Data 10 Output tPLH Latch Enab(e to Output tPHL LatCh Enable to Output tPZH Output Enable to Hlgh·Level tPZL Output Enable to Low·Level IPHZ Output Disab(e trom Hlgh·Level tPLZ Output Dlsab(e trom Low-Level Data Set·Up Time Note I Data Hold Time' Note I Note 1
Min.
Typ.
Max.
17 25 32 36 25 32 25 32
VOLTAGE WAVEFORMS ENABLE a; DISABLE TIMES. 3-STATE OUTPUTS
Unit ns os
V'~ OUT~CONTROL 1.3V 1.3V V,
- -
EQUIVALENT TEST CIRCUIT
0,
~-4-+....4....j.~
(13)
(8)
•
Oe
'-b----~
00.
I,.
',.
0,.
GNO
So
A,
B,
":'"
A,
B,
A.
e,
,~ 128
po
'~ ,,~
o
2B
§:
et et
I-
C
;:
lY2
c
en
G3 3EN1 3EN2
..,
r
\71
2\7
n
18
3
11
4
16
5
15
6
14
7
13
8
12
9
11
~-D--r__-+----1......:B. 13 ~--t ::::~f___+_---1......:B6 12
>-_-+_---........,.B7 11
Signetics @
IC MASTER 1983
See Page 809 for Ordering Information.
779
LOGIC DIVISION
OCTOBER 1982
TRANSCEIVER
54/74LS245
ABSOLUTE MAXIMUM RATINGS
(Over operating free-air temperature range unless otherwise noted.) 54LS
74LS
UNIT
7.0
7.0
V
Input voltage
- 0.5 to + 7.0
-0.5 to + 7.0
V
Input current
- 30 to + 1
- 30 to + 1
rnA
- 0.5 to + Vee
- 0.5 to + Vec
V
-55 to + 125
o to 70
·C
PARAMETER Vee
Supply voltage
VIN liN V OUT
Voltage applied to output in HIGH output state
Operating free-air temperature range TA NOTE VIN limited to 5.5V on A and B inputs only.
RECOMMENDED OPERATING CONDITIONS 54174LS
PARAMETER
Vee
Supply voltage
V IH
HIGH-level input voltage
V IL
LOW-level input voltage
IIH
Input clamp current
IOH
HIGH-level output current
IOL
LOW-level output current
TA
Operating free-air temperature
UNIT
Min
Nom
Max
Mil
4.5
5.0
5.5
V
Com'l
4.75
5.0
5.25
V
2.0
V
Mil
+0.7
V
Com'l
+0.8
V
-18
Mil
12
Com'l
24
rnA rnA rnA rnA rnA
Mil
- 12
Com'l
- 15
Mil
-55
+ 125
·C
Com'l
0
70
·C
TEST CIRCUITS AND WAVEFORMS INPUT PULSE DEFINITIONS
TEST CIRCUIT FOR 3·STATE OUTPUTS U)
C,)
......
I------·-Iw-----~
Q)
"...___-
AMP (V)
C
0> C/) ~~------------------~--4_-----0V
ITHUt,)
ITlH(lr)
ITlH(lr)
ITHUII!
IJ-__----------------~~--;_----- AMP
SWITCH POSITION Test Switch 1 Switch 2 Open Closed tpZli Open Closed tpZL \ Closed Closed tpHZ Closed' Closed tpLZ DEFINITIONS RL = Load reSistor to Vec. see AC CHARACTERISTICS lor value CL = Load capacitance Includes Jig and probe capacitance: see Ae CHARACTERISTICS lor value RT = Termination reSistance should be equal to ZOUT 01 Pulse Generators D = Diodes are 1N916. 1N3064. or equivalent Rx = 1kl! lor 54/74. 545/745. RX =5kl! for 54LS/74LS tTLH' tTHL Values should be less than or equal to the table enlrles
(V)
POSITIVE PULSE ~-----IW-------~
" - - - OV
VM = 1.3V lor 54LS/74LS: VM = 1 5V lor all other TTL lamilles
FAMILY
Amplilude
INPUT PULSE REQUIREMENTS Rep. Rile Pul.. Wldlh ITLH 1MHz 500ns 7ns
ITHL 7ns
54/74
3.0V
54LS/74LS
3.0V
1MHz
500ns
15ns
6ns
5451745
3.0V
1MHz
5OOn~
2.5ns
2.5ns
Sigletics 780
See Page 809 for Ordering Information.
@
Ie MASTER 1983
LOGIC DIVISION
OCTOBER 1982
TRANSCEIVER
54/74LS245
DC ELECTRICAL CHARACTERISTICS (Over recommended operating free·air temperature range unless otherwise noted.) PARAMETER·
TEST CONDITIONS1
tlV T
Hysteresis (VT+ -VT _)
Vcc= MIN
VOH
HIGH·level output voltage
VOL
LOW·level output voltage
Vcc = MIN, VIH = MIN, VIL = MAX. Vec= MIN, VIH = MIN, VIL = MAX
54/74LS245
2.4
IOL= MAX 10L= 12mA
Vee = MAX, Vo=2.7V, CE=2.0V
10ZL
Off·state output current, LOW·level voltage applied
Vee=MAX, Vo =O.4V, CE=2.0V
II
Input current at maximum input voltage
IIH
HIGH·level input current
Vee = MAX, VI := 2.7V
IlL
LOW·level input current
Vec= MAX, VI = O.4V
los
Short·circuit output current 3
UNIT V
V
3.4 0.4
V
Com'l
0.5
V
74LS
0.4
V
-1.5
V
20
Il A
-200
Il A
Vee = MIN, II = 11K
Vee= MAX
Max
V
Mil
10ZH
(total)
0.4
10H= -3mA
Input clamp voltage
Supply
0.2 2.0
Off·state output current, HIGH·level voltage applied
Icc
Typ2
10H= MAX
VIK
current 4
Min
-
.I
VI =5.5V
A, B inputs
0.1
rnA
I
VI = 7.0V
SIR, CE inputs
0.1
rnA
20
Il A
-0.2
rnA
-130
rnA
-40
Vec= MAX
Vce '= MAX
leeH
Outputs HIGH
48
70
rnA
leeL
Outputs LOW
62
90
rnA
Outputs OFF
64
95
rnA leez NOTES 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at Vee = 5V, TA = 25°C. 3. lOS is tested with VOUT= + Q.5V and Vee= Vee MAX+ Q.5V. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second. 4. Measure lee with outputs open.
AC WAVEFORMS WAVEFORM FOR NON·INVERTING OUTPUTS
en
3·STATE ENABLE TIME TO HIGH LEVEL AND DISABLE TIME FROM HIGH LEVEL
(,)
..... Q) c
Ol CJ)
-l.SV
Waveform 1
Waveform 2 VM = 1.3V
for
54LS/74LS, VM = 1.5V for all other TTL families
3·STATE ENABLE TIME TO LOW LEVEL AND DISABLE TIME FROM LOW LEVEL
Waveform 3
Signefics @
Ie
MASTER 1983
See Page 809 for Ordering Information.
781
LOGIC DIVISION
OCTOBER 1982
TRANSCEIVER
54/74LS245
AC CHARACTERISTICS TA=25°C, Vcc =5.0V 54LS/74LS PARAMETER
TEST CONDITIONS
UNIT
CL = 45pF, RL = 6670 Min
Max
tpLH
Propagation delay
Waveform 1
12
ns
tpHL
Propagation delay
Waveform 1
12
ns
tpZH
Enable to HIGH
Waveform 2
40
ns
tpZL
Enable to LOW
Waveform 3
40
ns
tpHZ
Disable from HIGH
25
ns
tpLZ
Disable from LOW
Waveform 2, CL = 5pF Waveform 3, CL = 5pF
25
ns
en
(.)
.....Q) s::::: C>
en
Signetics 782
See Page 809 for Ordering Information.
@
Ie MASTER 1983
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
• a·bit transparent latch '373 • a·bit positive, edge· triggered register - '374 • 3·State output buffers • Common 3·State Output Enable • Independent register and 3·State buffer operation
54/74LS373, 54/74LS374, S373, S374 '373 Octal Transparent Latch With 3·State Outputs '374 Octal 0 Flip·Flop With 3·State Outputs TYPE
TYPICAL PROPAGATION DELAY
TYPICAL SUPPLY CURRENT (Total)
74LS373
19ns
24mA
74S373
10ns
105mA
74LS374
19ns
27mA
74S374
Bns
116mA
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS
DESCRIPTION The '373 is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Latch Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is HIGH. The latch remains transparent to the data inputs while E is HIGH, and stores the data present one setup time before the HIGH-to-LOW enable transition. The enable gate has about 400mV of hysteresis built in to help minimize problems that signal and ground noise can cause on the latching operation. . The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active LOW Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is LOW, the latched or transparent data appears at the outputs. When OE is HIGH, the outputs
PIN CONFIGURATION
DESCRIPTION
54/74S
54/74LS
All
Inputs
1Sul
1LSui
All
Outputs
10Sul
30LSui
NOTE Where a 54/74S unit load (Sui) is 50!,A IIH and - 2.0mA IlL. and a 54/74LS unit load (LSul) is 20!,A IIH and - O.4mA IlL'
ORDERING CODE COMMERCIAL RANGES Vcc = 5V :t 5%; TA = ooe to + 70°C
PACKAGES Plastic
N74LS373N • N74S373N N74LS374N • N74S374N
Ceramic DIP
N74LS373F N74LS374F
• •
N74S373F N74S374F
MILITARY RANGES VCC=5V :t10%;TA= -55°eto
S54LS373F S54LS374F
• •
+ 125°C
S54S373F S54S374F
are in the HIGH impedance "off" state, which means they will neither drive nor load the bus.
The register is fully edge triggered. The state of each 0 input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flipThe '374 is an B-bit, edge-triggered register flop's Q output. The clock buffer has coupled to eight 3-State output buffers. . about 400mV of hysteresis built in to help The two sections of the device are con- minimize problems that signal and ground trolled independently by the Clock (CP) noise can cause on the clocking operation. and Output Enable (OE) control gates.
Q)
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
UJ
o
..... c
o
en '373
'373 3
4
7
•
13
14
17
1.
2
5
8
II
12
15
18
I.
'374
'373
Vee - Pin 20 GND-Pln 10
'374 3
4
7
8
13
14
17
18
12
DO
11
ep
15
'374
16 2
5
8
II
12
15
18
111
19
Vee .Pln 20 GND-Pln 10
Signetics © IC MASTER 1983
See Page 809 for Ordering Information.
783
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS The 3·State output buffers are designed to drive heavily loaded 3·St,ate buses, MOS memories, or MOS microprocessors. The active LOW Output Enable (OE) controls
54/74LS373, 54/74LS374, S373, S374 all eight 3·State buffers independent of the register operation. When OE is LOW, the data in the register appears at the out· puts. When OE is HIGH, the outputs are in
the HIGH impedance "off" state, which' means they will neither drive nor load the bus.
LOGIC DIAGRAM, '373
vcc =Pln 20 GND= Pin 10
(15)
aS
(16)
06
LOGIC DIAGRAM, '374
(2)
(5)
(15)
Os
00
(16)
06
en MODE SELECT -FUNCTION TABLE, '373 (,)
......
OPERATING MODES
Q)
OUTPUTS
INTERNAL REGISTER
0 0 -0 7
E
On
Enable and read register
L L
H H
L H
L H
L H
Latch and read register
L L
L L
I h
L H
L H
Latch register and disable outputs
H H
L L
I h
L H
(Z) (Z)
C)
en
INPUTS OE
C
MODE SELECT-FUNCTION TABLE, '374 OPERATING MODES Load and read register Load register and disable outputs
INPUTS
OUTPUTS
INTERNAL REGISTER
0 0-0 7'
OE
CP
On
L.
1 1
I h
L H
L H
I
.L H
(Z) (Z)
L H H
1
-I
H = HIGH voltage level h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition or HIGH-to-LOW OE transition ' L = LOW voltage level
h
1= LOW voltage level one setup time prior to the LOW·to·HIGH clock transition or HIGH-to-LOW OE transition (Z)= HIGH impedance "off" state I = LOW-to-HIGH clock transition
Signetics 784
See Page 809 for Ordering Information.
@
IC MASTER 1983
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
54/74LS373, 54/74LS374, S373, S374
ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless otherwise noted.) 54lS
PARAMETER
74lS
74S
UNIT
7.0
7.0
7.0
V
54S
Vcc
Supply voltage
VIN
Input voltage
- 0.5 to + 7.0
- 0.5 to +5.5
- 0.5 to + 7.0
- 0.5 to +5.5
V
liN
Input current
-30 to +1
- 30 to +5
- 30 to +1
-30 to +5
rnA
V OUT
Voltage applied to output in HIGH output state.
- 0.5 to +Vcc
- 0.5 to +Vcc
- 0.5 to +Vcc
- 0.5 to +Vcc
V
TA
Operating free-air temperature range
7.0
o to 70
-55 to + 125
°C
RECOMMENDED OPERATING CONDITIONS 54/74lS
PARAMETER
Vcc
Supply voltage
VIH
HIGH-level input voltage
VIL
lOW-level input voltage
11K
Input clamp current
IOH
HIGH-level output current
IOL
lOW-level output current
TA
Operating free-air temperature
NOTE VIL = + O.7V MAX for 54S at T A =
54/74S
UNIT
Min
Nom
Max
Min
Nom
Max
Mil
4.5
5.0
5.5
4.5
5.0
5.5
Com'l
4.75
5.0
5.25
4.75
5.0
5.25
V
-
V
2.0
2.0
V
Mil
+0.7
+0.8
V
Com'l
+0.8
+0.8
V
-18
-18
Mil
-1.0
-2.0
Com'l
-2.6
-6.5
Mil
12
20
Com'l
24
20
rnA rnA rnA rnA rnA
Mil
-55
+ 125
-55
+ 125
°C
Com'l
0
70
0
70
°C
en
()
+-'
Q)
+ 125"C only.
C 0)
en
Signetics @
Ie MASTER 1983
See Page 809 for Ordering Information.
785
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
54/74LS373, 54/74LS374, S373, S374
DC ELECTRICAL CHARACTERISTICS
VOL
V IK 10ZH
10Zl
HIGH-level output voltage
LOW-level output voltage
Vcc=MIN, VIH=MIN, Vll=MAX, 10H= MAX Vee= MIN, V IH = MIN, Vll=MAX
Input clamp voltage
10l= MAX
Off-state output current, LOW-level voltage applied
II
Input current at maximum input voltage
IIH
HIGH-level input current
III
LOW-level input current
los
Short-circuit output· current 3
Typ2
Mil
2.4
3.4
Com'l
2.4
2.4
3.0
2.4
3.1
3.1
V V V
Com'l
0.35
0.5
0.5
V
74LS
0.25
0.4
V -1.2
-1.5 20
50 -20 -50 0.1
20
rnA
50
itA rnA
V I = 0.5V
OE=4.5V
1.0
-0.4
V I =0.4V
Vee= MAX
-130
-30 'LS373
24
40
27
40
itA rnA
V I = 5.5V
Vee= MAX, V I = 2.7V
itA itA
Vo= 0.5V V I = 7.0V
V itA
Vo=2.4V
Vee= MAX
UNIT
Max
0.5 4
. Vo=0.4V
Vee= MAX, V IH = MIN
Vee= MAX
Typ2
0.4
Vee= MAX
Supply current (total)
Min
0.25
Vo= 2.7V
Vee= MAX, V IH = MIN
Max
Mil
10l= 12mA
leez
lee
Min
Vee= MIN, 11= 11K
Off-state output current, HIGH-level voltage applied
54/74S373, 374
54/74LS373,374
TEST CONDITIONS1
PARAMETER
V OH
(Over recommended operating free-air temperature range unless otherwise noted.)
-40
- 0.25
rnA
-100
rnA rnA
105
'S373
160
rnA
leel
OE=OV
leez
OE=4.5V
'LS374
leel
All inputs grounded
'S374
102
140
rnA
leez
CP, OE= 4.0V 'S374 D inputs = GND
131
180
rnA
rnA
en o
NOTES For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at Vee =5V, TA =25°e. , 3. lOS is tested with VOUT = + O.5V and Vee =Vee MAX + O.5V. Not more than one output should be shorted at a time and duration of the short circuit shouldJ1ot exceed one second. 4. VOL = + O.45V MAX for 54S at TA = + 125°e only.
Q)
AC CHARACTERISTICS
1.
c
TA=25°C, V ee =5.0V
54/74S
54/74LS
.~
en
PARAMETER
TEST CONDITIONS
C l = 45pF, Rl = 6670 Min
f MAX
Maximum clock frequency
t plH t pHl
Propagation delay Latch Enable to output
tplH t pHl t plH t pHl t PZH
Waveform 6, '374
Max
C l = 15pF, Rl = 2800 Min 75
35
UNIT
Max MHz
Waveform 1, '373
30 30
14 18
Propagation delay' Data to output
Waveform 4, '373
18 18
13
. Propagation delay Clock to output
Waveform 6, '374
28 28
15 17
ns
ns
9
ns
Enable time to HIGH level
Waveform 2
28
15
ns
t PZl
Enable time to LOW level
'373 Waveform 3, '374
36 28
18 18
ns
t pHZ
Disable time from HIGH level
Waveform 2, C l = 5pF
20
9
ns
tplZ
Disable time from LOW level
Waveform 3, C l = 5pF
25
12
ns
NOTE Per industry convention, fMAX is the worst case value of the maximum device operating frequency with no constraints on tr, tf, pulse width or duty
cycl~.
Signetics 786
See Page 809 for Ordering Information.
@
Ie
MASTER 1983
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
54/74LS373, 54/74LS374, S373, S374
AC WAVEFORMS LATCH ENABLE TO OUTPUT DELAYS AND LATCH ENABLE PULSE WIDTH
3·STATE ENABLE TIME TO HIGH LEVEL AND DISABLE TIME FROM HIGH LEVEL
=1.SV
Waveform 1
Waveform 2
3·STATE ENABLE TIME TO LOW LEVEL AND DISABLE TIME FROM LOW LEVEL
PROPAGATION DELAY DATA TO Q OUTPUTS
,
Waveform 3
Waveform 4
DATA SETUP AND HOLD TIMES
CLOCK TO OUTPUT DELAYS AND CLOCK PULSE WIDTH
U)
o
+""
Q)
C
0>
Waveform 5
en
Waveform 6 DATA SETUP AND HOLD TIMES
Waveform 7
=
=
VM 1.5V for 54/74 and 54S/74S, VM 1.3V for 54LS/74LS. The shaded areas Indicate when the Input Is permitted to change for predictable output performance.
Signetics © IC MASTER 1983
See Page 809 for Ordering Information.
787
OCTOBER 1982
LOGIC DIVISION
54/74LS373, 54/74L5374, 5373, 5374
LATCHES/FLIP-FLOPS AC SETUP REQUIREMENTS TA = 25°C, Vcc= 5.0V PARAMETER
I
54174S
54/74LS
TEST CON DITIONS
Min
Min
Max
UNIT
Max
tw(H) tw(L)
Latch Enable pulse width
Waveform 1, '373
15 15
6 7.3
ns
ts
Setup time, Data to Latch Enable
Waveform 5, '373
5
0
ns
th
Hold time, Data to Latch Enable
Waveform 5, '373
20
10
ns
6 7.3
ns
tw(H) tw(L)
Clock pulse width
Waveform 6, '374
15 15
ts
Setup time, Data to Clock
Waveform 7, '374
20
5
ns
th
Hold time, Data to Clock
Waveform 7, '374
0
2
ns
TEST CIRCUITS AND WAVEFORMS TEST CIRCUIT FOR 3·STATE OUTPUTS
INPUT PULSE DEFINITIONS
Vee ~----------tw----------~
.---AMP(V)
I'------------'il--+---- ov o
tTHL(tl)
tTLH(tr)
tTLH(tr)
tTHL(tl)
lJ----------__ SWITCH POSITION
en o
.....Q) C
.~
en
~--t---- AMP (V)
POSITIVE PULSE
Test
Switch 1
. Switch 2
tpZH tpZL tpHZ tpLZ
Open Closed Closed Closed
Closed Open Closed 'Closed
~------tw---------~
VM = 1.3V for 54LS/74LS; VM
DEFINITIONS RL = Load resfstor to VCC; see AC CHARACTERISTICS for value. CL = Load, capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT =Termination resistance should be equal to ZOUT of Pulse Generators. D = Diodes are 1N916, 1N3064, or equivalent. RX = 1kf! for 54/74, 54S/74S. RX =5kf! for 54LS/74LS. tTLH' tTHL Values should be less than or equal to the table entries.
=:=
'''---ov
1.5V for all other TTL families.
INPUT PULSE REQUIREMENTS
FAMILY Amplitude
Rep. Rate
Pulse Width
tTLH
54/74
3.0V
1MHz
500ns
7ns
7ns
54LS/74LS
3.0V
1MHz
500ns
15ns
6ns
54S/74S
3.0V
1MHz
500ns
2.5ns
2.5ns
tTHL
Signetics 788
See Page 809 for Ordering Information.
©
Ie
MASTER 1983
OCTOBER 1982
LOGIC DIVISION
54/745534
FLIP-FLOP
Octal 0 Flip-Flop With 3-State Outputs • 8-bit positive, edgetriggered register • Inverting outputs • 3-State output buffers • Common 3-State Output Enable • Independent register and 3-State buffer operation
TYPE
TYPICAL PROPAGATION DELAY
TYPICAL SUPPLY CURRENT (Total)
74S534
8ns
116mA
ORDERING CODE PACKAGES
DESCRIPTION The '534 is an 8-bit, edge-triggered register ceupled te eight 3-State inverting .output buffers. The twe sectiens .of the device are centrelled independently by the Cleck (CP) and Output Enable (OE) centrol gates. The register is fully edge triggered. The state .of each D input, .one setup time befere the LOW-te-HIGH cleck transitien, is transferred te the cerrespending flip-flep's Q .output. The cleck buffer has abeut 400mV .of hysteresis built in te help minimize preblems that signal and greund neise can cause en the clocking .operatien. The 3-State- inverting .output buffers are designed te drive heavily loaded 3-State buses, MOS memeries, .or MOS micreprocessers. The active LOW Output Enable (OE) centrels all eight 3-State buffers inde-
COMMERCIAL RANGES Vce = 5V :t: 5%; TA =O°C to + 70°C
Plastic DIP
N74S534N
Ceramic DIP
N74S534F
Vcc = 5V
MILITARY RANGES :t: 10%; TA = - 55°C to + 125°C S54S534F
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS
DESCRIPTION
All
Inputs
All
Outputs
54/74S 1Sul 10Sul
NeTE Where a 54/74S unit load (Sui) is 50l'A IIH and - 2.0mA IlL'
pendent .of the register eperatien. When OE is LOW, the data in the register ap-' pears at the .outputs. When OE is HIGH,
the .outputs are in the HIGH impedance ".off" state, which means they will neither drive ner lead the bus.
UJ
()
PIN CONFIGURATION
LOGIC SYMBOL
:;::
LOGIC SYMBOL (IEEElIEC)
Q)
C
0>
CIJ
3
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
11
Vee =Pln 20 GND=Pln 10
Signetics @
Ie MASTER 1983
See Page 809 for Ordering Information.
789
OCTOBER 1982
LOGIC DIVISION
54/745534
FLIP-FLOP LOGIC DIAGRAM
(2)
(15)
(5)
(19)
as
00
Q7
Vee =Pln 20 GND=Pln 10
MODE SELECT-FUNCTION TABLE INPUTS
OPERATING MODES
CP
On
Load and read register
L L
I
I
I h
L H
H L
Load register and disable outputs
H H
I I
I h
L H
(Z) (Z)
=
ABSOLUTE MAXIMUM RATINGS
I
=LOW voltage level one setup time prior to the LOW·to·HIGH clock transition
(l)= HIGH impedance "off" state
I
= LOW·to·HIGH clock transition
(Over operating free-air temperature range unless otherwise noted.)
PARAMETER
en
(.)
Q)
0 0-0 7
OE
H HIGH voltage level h = HIGH voltage level one setup time prior to the LOW·to·HIGH clock transition L = LOW voltage level
of-'
OUTPUTS
INTERNAL REGISTER
545
745
UNIT
7.0
7.0
V
Input voltage
-0.5 to + 5.5
- 0.5 to + 5.5
V
Input current
- 30 to + 5
- 30 to + 5
rnA
Voltage applied to output in HIGH output state.
- 0.5 to + Vcc
-0.5 to + Vcc
V
Operating free-air temperature range
- 55 to + 125
o to 70
°C
Vcc
Supply voltage
V IN liN V OUT
TA
c
.2> RECOMMENDED OPERATING CONDITIONS
en
54/745
PARAMETER
Vcc
Supply voltage
V IH
HIGH-level input voltage LOW-level input voltage
11K
Input clamp current
IOH
HIGH-level output current
10L
LOW-level output current
TA
Operating free-air temperature
=
790
= + 125°C only.
Nom
Max
Mil
4.5
5.0
5.5
V
Com'l
4.75
5.0
5.25
V
2.0
V IL
NOTE VIL + O.7V MAX for 545 at TA
UNIT
Min
V
Mil
+0.8
Com'l
+0.8
V
-18
V
Mil
-2.0
Com'l
-6.5
Mil
20
Com'l
20
rnA rnA rnA rnA rnA
Mil
-55
+ 125
°C
Com'l
0
70
°C
Signetics See Page 809 for Ordering Information.
@
Ie MASTER 1983
LOGIC DIVISION
OCTOBER 1982
54/745534
FLIP-FLOP
DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.)
VOH
HIGH-level output voltage
Vcc= MIN, V IH = MIN, VIL = MAX, 10H= MAX
LOW-level output voltage
V IK
Input clamp voltage
10ZH
Off-state output current, HIGH-level voltage applied
Vcc= MAX, V IH = MIN
10ZL
Off-state output current, LOW-level voltage applied
Vcc= MAX, V IH = MIN
Input current at maximum input voltage
IIH
HIGH-level input current
IlL
LOW-level input current
los
Short-circuit output current 3
Icc
Supply Current (total)
10L= MAX
Vcc = MIN, V IH = MIN, V IL = MAX
VOL
II
54/745534
TEST CONDITIONS 1
PARAMETER
10L= 12mA
Min
Typ2
Mil
2.4
3.0
Com'l
2.4
3.1
Max
V V
Mil
0.5 4
V
Com'l
0.5
V
-1.2
V
74LS
V
Vcc= MIN. 11= 11K
p,A
Vo= 2.7V
p,A
50
Vo=2.4V
p,A
Vo= O.4V -50
Vo= 0.5V
p,A rnA
VI = 7.0V
Vcc= MAX
1.0
VI = 5.5V
rnA p,A
50
Vcc= MAX, VI = 2.7V VI = O.4V
Vcc= MAX
rnA
VI = 0.5V -40
Vcc= MAX
Vcc= MAX
UNIT
-0.25
rnA
-.100
rnA
ICCL
All inputs grounded
102
140
rnA
Iccz
CP, OE=4.0V D inputs = GND
131
180
rnA
NOTES 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, TA= 25 ·c. 3. lOS is tested with VOUT= + O.5V and VCC = VCC MAX + O.5V. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second. 4. VOL = + O.45V MAX for 545 at TA= + 125·C only.
AC CHARACTERISTICS TA=25°C, Vcc =5.0V
en C..> ......
545/745 PARAMETER
TEST CONDITIONS
C L = 15pF, RL
=2800
Min
UNIT
Q)
C
Max
0> MHz
f MAX
Maximum clock· frequency
Waveform 3
tpLH tpHL
Propagation delay Clock to output
Waveform 3
15 17
ns
tpZH
Enable time to HIGH level
Waveform 1·
15
ns
tpZL
Enable time to LOW level
Waveform 2
18
ns
tpHZ
Disable time from HIGH level
Waveform 1, C L= 5pF
9
ns
t pLZ
Disable time from LOW level
Waveform 2, C L= 5pF
12
ns
75
en
AC SETUP REQUIREMENTS TA=25°C, Vcc =5.0V PARAMETER . tw(H) tw(L)
TEST CONDITIONS
545/745 Min
Max
UNIT
Clock pulse width
Waveform 3
6 7.3
ns
ts
Setup time, Data to Clock
Waveform 4
5
ns
th
Hold time, Data to Clock
Waveform 4
2
ns
NOTE Per industry convention, fMAX is the worst case value of the maximum device operating frequency with no constraints on tr, tf, pulse width or duty cycle.
Signetics ©
Ie MASTER 1983
See Page 809 for Ordering Information.
791
OCTOBER 1982
LOGIC DIVISION
54/745534
FLIP-FLOP AC WAVEFORMS 3-STATE ENABLE TIME TO HIGH LEVEL AND DISABLE TIME FROM HIGH LEVEL
3-STATE ENABLE TIME TO LOW LEVEL AND DISABLE TIME FROM LOW LEVEL
::::1.SV
a
Waveform 1
Waveform 2
CLOCK TO OUTPUT DELAYS AND CLOCK PULSE WIDTH
DATA SETUP AND HOLD TIMES
Waveform 3
Waveform 4
=
=
VM 1.5V for 54/74 and 54S/74S, VM 1.3V for 54LS/74LS. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUITS AND WAVEFORMS TEST CIRCUIT FOR 3·STATE OUTPUTS
en ()
INPUT PULSE DEFINITIONS
Vee
......
~-----------tw------------~
Q)
.,.....-- AMP (V)
C C')
en ~----------------------'I---~-----OV
o
tTHUtf)
tTLH(tr)
tTLH(tr)
tTHL(tf)
I.-___- - - - - - - - - -__..j---t-"'----- AMP (V) POSITIVE PULSE
SWITCH POSITION Test
Switch 1
Switch 2
tpZH tpZL tpHZ tpLZ
Open Closed Closed Closed
Closed Open Closed 'Closed
~-----------tw------------~
VM
DEFINITIONS RL =Load resfstor to VCC; see AC CHARACTERISTICS for value. CL =Load. capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT =Termination resistance should be equal to ZOUT of Pulse Generators. D = Diodes are 1N916, 1N3064, or equivalent. RX = 1kf! for 54174, 54S174S, RX = 5kf! for 54LSI74LS. tTLH' tTHL Values should be less than or equal to the table entries.
''''--- OV
=1.3V for 54LSI74LS; VM = 1.5V for all other TTL families.
INPUT PULSE REQUIREMENTS
FAMILY Amplitude
Rep. Rate
Pulse Width
tTLH
54174
3.0V
1MHz
500ns
7ns
7ns
54LSI74LS
3.0V
1MHz
500ns
15ns
6ns
. 3.0V
1MHz
500ns
2.5ns
2.5ns
545/74S
tTHL
Signetics 792
See Page 809 for Ordering Information.
© Ie MASTER 1983
LOGIC DIVISION
OCTOBER 1982
8TS805,806
LATCHES/FLIP-FLOPS • 8·bit transparent latch 8TS805 • 8·bit positive, edge· triggered register 8TS806 • 3·State output buffers • Common 3·State Output Enable • Independent register and 3·State buffer operation
8TS805 Octal Transparent Latch With 3·State Outputs 8TS806 Octal D Flip·Flop With 3·State Outputs TYPE
TYPICAL PROPAGATION DELAY
TYPICAL SUPPLY CURRENT (Total)
8TS805
10ns
105mA
8TS806
8ns
116mA
ORDERING CODE COMMERCIAL RANGES Vcc =5V % 5%; TA =ooe to + 70 0 e
PACKAGES Plastic DIP
N8TS805N
Ceramic DIP
N8TS805F
• •
Vcc =5V
MILITARY RANGES % 10%; TA = - 55°e to + 125°e
N8TS806N N8TS806F
S8TS805F
•
S8TS806F
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE DESCRIPTION The 8TS805 is an octal, transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Latch Enable (E) and Output Enable (OE) control gates.
All
Inputs
1Sul
All
Outputs
10Sul
NOTE An 8TS unit load (Sui) is 50!,A IIH and - 2.0mA IlL'
The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is HIGH. The latch remains transparent to the data inputs while E is HIGH, and stores the data present one setup time before the HIGH-to-LOW enable transition. The enable gate has about 400mV of hysteresis built in to help minimize problems that signal and ground noise can cause on the latching operation.
active LOW Output Enable (OE) controls all eight 3-State buffers independent of the I~tch operation. When OE is LOW, the latched or transparent data appears at the outputs. When OE is HIGH, the outputs are in the HIGH impedance "off" state, which means they will neither drive nor load the bus.
The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The
The 8TS806 is an 8-bit, edge-triggered register coupled to eight 3-State output buffers. The two sections of the device are
PIN CONFIGURATION
8TS
DESCRIPTION
PINS
controlled independently by the Clock (CP) and Output Enable (OE) control gates. The register is fully edge triggered. The state of each D input, one setup time before the LOW-to-HIGH clock' transition, is transferred to the corresponding flipflop's Q output. The clock buffer has about 400mV of hysteresis built in to help minimize problems that signal and ground noise can cause on the clocking operation.
en u ......
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
Q)
C
0>
8TS805
8TS805
en
8TS806
23458781
8TS805
11
E
11
11
17
18
15
14
13
12
Vee. Pin 20 GND.Pln 10
8TS806 23458181
DO
11
ep
8TS806 8 11
11
11
18
15
14
13
12
Vee ·Pln 20 GND-Pln 10
Signetics ©
Ie
MASTER 1983
See Page 809 for Ordering Information.
793
OCTOBER 1982
LOGIC DIVISION
LATCHES/FLIP-FLOPS The 3·State output buffers are designed to drive heavily loaded 3·State buses, MOS memories, or MOS microprocessors. The active LOW Output Enable (OE) controls
8TS805,806 all eight 3-State buffers independent of the register operation. When OE is LOW" the data in the register appears at the out· puts. When OE is HIGH, the outputs are in
the HIGH impedance "off" state, which means they will neither drive nor load the bus.
LOGIC DIAGRAM, 8TS805
Vcc •
Pin 20 OND- Pin 10
(12)
01
07,
LOGIC DIAGRAM, 8T5806
Vce •
Pin 20 OND. Pin 10
(III)
ao
en o
(15)
(111)
(12)
(13)
O.
01
06
07
MODE SELECT -FUNCTION TABLE, 8TS805
..... Q)
OPERATING MODES
C
OUTPUTS
INTERNAL REGISTER
OE
E
On
Enable and read register
L L
H H
L H
L H
L H
Latch and read register
L L
L L
I h
L H
L H
Latch register· and disable outputs
H H
L L
' I h
L H
(Z) (Z)
C)
en
INPUTS
0 0 -0 7
MODE SELECT-FUNCTION TABLE, 8TS806 OPERATING MODES
H h
INPUTS
OUTPUTS
INTERNAL REGISTER
OE
CP
On
Load and read r'egister
L L
t t
I h
L H
L H
Load register and disable outputs
H H
t t
I h
L H
(Z) (Z)
=HIGH voltage level =HIGH voltage level one setup time prior to the LOW·to·HIGH clock transition or
HIGH-to-LOW OE transition L = LOW voltage level .
I,
0 0-0 7
=LOW voltage level one setup time prior to the LOW-tO-HIGH clock transition or
HIGH·to-LOW OE transition IZ)= HIGH impedance "0"" state t LOW·to-HIGH clock transition
=
Sigletics 794
See Page 809 for Ordering Information.
@
Ie MASTER 1983
OCTOBER 1982
LOGIC DIVISION
8TS805, 806
LATCHES/FLIP-FLOPS
ABSOLUTE MAXIMUM RATINGS (Over operating free·air temperature range unless otherwise noted.) Vcc
N8TS
S8TS
PARAMETER
UNIT
7.0
7.0
V
:... 0.5 to + 5.5
- 0.5 to + 5.5
V
- 30 to + 5
rnA
Supply voltage
V,N
Input voltage
liN
Input current
VOUT
Voltage applied to output in HIGH output state.
- 0.5 to + Vcc
- 0.5 to + Vcc
V
TA
Operating free·air temperature range
-55 to + 125
o to 70
°C
- 30 to
+5
RECOMMENDED OPERATING CONDITIONS 8TS
PARAMETER
Vcc
Supply voltage
V,H
HIGH·level input voltage
V,L
LOW·level input voltage
1'K
Input clamp current
IOH IOL
TA
LOW·level output current
=
Max
Mil
4.5
5.0
5.5
V
Com'l
4.75
5.0
5.25
V V
Mil
+0.8
V
Com'l
+0.8
V
-18 Mil
-2.0
Com'l
-6.5
Mil
20 20
rnA rnA rnA rnA rnA
Mil
-55
+ 125
°C
Com'l
0
70
°C
Com'l
Operating free·air temperature
NOTE V,L + O.7V MAX for SaTS at T A =
Nom
2.0
HIGH·level output current
UNIT
Min
+ 12SoC only.
en
()
:;::: Q)
c
en
CI)
Signetics ©
Ie MASTER 1983
See Page 809 for Ordering Information.
795
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
8TS805,806
DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.)
VOH
HIGH-level output voltage
8TS805,806
TEST CONDITIONS1
PARAMETER
Vcc= MIN, VIH = MIN, VIL = MAX, 10H= MAX ~
VOL
LOW-level output voltage
VIK
Input clamp voltage
10zH
Off-state output current, HIGH-level voltage applied
Off-state output current, 10ZL. LOW-level voltage applied II
Input current at maximum input voltage
IIH
HIGH-level input current
IlL
LOW-level input current
los
Short-circuit output current 3
Supply current (total)
Typ2
Mil
2.4
3.0
Com'l
2.4
3.1
Max
UNIT V V
Mil
0.5 4
V
Com'l
0.5
V
Vcc= MIN, 11= 11K
-1.2
V
Vcc=MAX, VIH=MIN, Vo=2.4V
50
/LA
Vcc= MAX, VIH = MIN, Vo=0.5V
-50
/LA
Vcc= MAX, VI = 5.5V
1.0
rnA
Vcc= MAX, VI = 2.7V Vcc= MAX, VI = 0.5V
50
/LA
-0.25
rnA
-100
rnA
Vcc= MIN, VIH = MIN, VIL = MAX
I
10L= MAX
-40
Vcc= MAX 8TS805
105
160
rnA
ICCL
All inputs grounded, 8TS806
102
140
rnA
Iccz
C~, OE = 4.0V 8TS806 D Inputs = GND
131
180
rnA
ICCL Icc
Min
Vcc= MAX
NOTES 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable Iype. 2. All typical values are at VCC= 5V, TA= 2S"C. 3. lOS is tested with VOUT= + O.SV and VCC= VCC MAX+ O.SV. Not more than one output should be shorted at a time and duration of the short circuit should nol exceed one second. ' . 4. VOL = + O.4SV MAX for S8TS at TA = + 12S"C only.
UJ
AC CHARACTERISTICS TA=25°C, Vcc =5.0V
(.)
8TS
+"'
PARAMETER
(])
c:
TEST CONDITIONS
en
f MAX
Maximum clock frequency
tpLH tpHL
Propagation delay Latch Enable to output
tpLH tpHL
Waveform 6, 8TS806
UNIT
CL= 1SpF, RL = 2800 Min
0)
Max
75
MHz
Waveform 1, 8TS805
14 18
ns
Propagation delay Data to output
Waveform 4, 8TS805
9 13
ns
tpLH tpHL
Propagation delay Clock to output
Waveform 6, 8TS806
.15 17
ns
tpZH
Enable time to HIGH level
Waveform 2
15
ns
tpZL
Enable time to LOW level
8TS805 Waveform 3 8TS806
18 18
ns
Disable time from HIGH level 9 Waveform 2,C L= 5pF tpHZ Disable time from LOW level Waveform 3, CL= 5pF 12 tpLZ NOTE .' Per industry convention, fMAX is the worst case value of the maximum device operating frequency with no constraints on Ir' If, pulse width or duly cycle.
ns ns
Signetics 796
See Page 809 for Ordering Information.
©
Ie MASTER 1983
OCTOBER 1982
LOGIC DIVISION
8TS805,806
LATCHES/FLIP-FLOPS AC WAVEFORMS LATCH ENABLE TO OUTPUT DELAYS AND LATCH ENABLE PULSE WIDTH
3·STATE ENABLE TIME TO HIGH LEVEL AND DISABLE TIME FROM HIGH LEVEL
Waveform 1
Waveform 2
3·STATE ENABLE TIME TO LOW LEVEL AND DISABLE TIME FROM LOW LEVEL
PROPAGATION DELAY DATA TO a OUTPUTS
Waveform 3
Waveform 4
DATA SETUP AND HOLD TIMES
CLOCK TO OUTPUT DELAYS AND CLOCK PULSE WIDTH
1;::=1/fMAXi CP
J.VM
\VM
l'-V-M-"""\'\ooo__
l-tW(H)-~tw(L):j
E
~_tP_H_L~ _
I
~l-tPLHI ,.-_ _ __
___ Q
~VM
I VM
en
o
+-'
Q)
C
0>
Waveform 5
en
Waveform 6 DATA SETUP AND HOLD TIMES
Waveform 7 VM = 1.5V for 54/74 and 545/745, VM f' 1.3V for 54L5/74L5. The shaded areas indicate when the input is permitted to change for predictable output performance.
Signetics @
Ie MASTER 1983
See Page 809 for Ordering Information.
797
LOGIC DIVISION
OCTOBER 1982
LATCHES/FLIP-FLOPS
8TS805,806
AC SETUP REQUIREMENTS TA=25°C, Vcc =5.0V 8TS
UNIT
PARAMETER
TEST CONDITIONS
tW------'
~
a:
PRODUCT REGISTER
ASYNCHRONOUS MULTIPLIER ARRAY
Rp (16)
Ry
I-
(12)
OE
TC>----~------------------------~
ClKM~----~~----------------------------~~-----------
TRW reserves the right to change product and specifications without notice. This information does not convey any licen.se under patent rights of TRW Inc. or others.
LSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 9203B
814
© TRW Inc. 19B2 40GOOB17 Rev. A-6/B2 Printed in the U.S.A.
Phone: (6191457-1000 Telex: 697-957 TWX: 910·335·1571 @
Ie MASTER 1983
... ••,
~.-.
MPY016K Advance Information VLSI Multiplier 16 x 16 Bit, 50 nsec
Features
The TRW MPY016K is a 16 x 16 bit VLSI multiplier that operates on a 50-nsec cycle (20 MHz multiplication rate). Individually clocked input and output registers are provided to maximize system throughput and simplify bus interfacing. The Most Significant Product (MSP) and Least Significant Product (LSP) are multiplexed through a dedicated output port, or the LSP can share a bidirectional port with the Y input. Three-state outputs are employed throughout. Built in TRW's OMICRON-B™ 1-micron bipolar process, the MPY016K is pin-compatible with the industry standard MPY016H and operates with three times the speed at no increase in power dissipation. The MPY016K is the industry's first true video-speed 16-bit multiplier.
• True Video-Speed Performance (20 MHz) • Double Precision Product • Includes Input And Output Registers • Two's Complement, Unsigned Magnitude, Or Mixed Mode Operation • Output Registers Can Be Made Transparent • Three-State Outputs • Pin-Compatible With MPY016H • Proven Hi-ReI, Rad-Hard Bipolar Process • Single + 5V Power Supply Applications
• Array Processors • Video Processors • Radar Signal Processors • FFT Processors
• General Digital Signal Processors • MicrocomputerIMinicomputer Accelerators
Functional Block Diagram
en ..... o
:::J "C MSP OUT / LSP OUT
o
'a.
en
--'
s:a:
I-
TRW reserves the right to change product and specifications without notice. This information does not convey any license under patent rights of TRW Inc. or others. LSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 92038 © Ie MASTER 1983
Phone: (619) 457-1000 Telex: 69],957 TWX: 910-335-1571
© TRW Inc. 1982 40G00817 Rev. A-6182 Printed in the U.S.A.
815
ii~·-·
TOC 1030 Advance Information First-In First-Out Memory 64 Words by 9 Bits The TDC1030 is an expandable high speed First-In First-Out (FIFO) memory organized as 64 words by 9 bits. A 20 M Hz data rate makes it ideal in applications such as video time base correction, A/D input buffers, input/output formatter for digital filters and FFT's, disk controllers and voice synthesizers.
AND configuration. The device has all output pins directly opposite the corresponding input pins, facilitating board layouts in expanded configurations.
The Shift In (SI) and Shift Out (SO) controls allow asynchronous data transfers. The Input Ready (IR) flag indicates that the FIFO input stage is empty and available to receive newdata. When IR is valid, SI may be asserted, thus loading the data present at DO through DS into the FIFO. From this stage, data "falls-through" in an asynchronous manner. The data will stack up at the end of the device while empty locations will "ripple" to the front. Output Ready (OR) indicates that the FIFO output stage contains valid data which may be transferred out via the Shift Out control. Additional control inputs include; Master Reset (MR) to clear all data within the device and a three-state control signal, Output Enable, (OE).
Features 64 words by 9-bit organization
•
20 MHz typical shift-in, shift-out rates
•
Readily expandable in word and bit dimension
•
Asynchronous or synchronous
•
TTL inputs and outputs
•
Devices can be interconnected to expand in word and bit dimensions. This operation is simplified by the resistive pullups provided at the OR and IR outputs which allow the use of a wired-
...en
•
-Three state outputs
•
Master reset input to clear data and control
•
Output pins directly opposite corresponding input pins
•
OR, IR have resistive pull-ups to allow wiredAN D Configuration
•
Ceramic 2S-pin dual-in-line package
Functional Block Diagram
(.)
::s
"C
o
DATA INPUT
FIFO INPUT STAGE
INPUT READY FLAG
INPUT CONTROL
Jo-
DC/) -I
MAIN REGISTER I - - - - - - - - - - v
FIFO OUTPUT STAGE
MAIN REGISTER CONTROL LOGIC
OUTPUT - SHIFT OUT CONTROL LOGIC
~
a:
II--------~'"
.........,...,.-.... OUTPUT READY FLAG MASTER RESET TRW reserves the right to change product and specifications without notice. This information does not convey any license under patent rights of TRW Inc. or others.
lSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 92038
816
Phone: (619) 457-1000 Telex: 697-957 TWX: 910·335-1571
© TRW Inc. 1982 40G00817 Rev. A-6182 Printerl in the U.S.A.
@
Ie MASTER 1983
ii~·-·
TDC1022 Floating Point Arithmetic Unit 22 Bit The TDC1022 is a high speed, TIL compatible, 22-bit VLSI floating point arithmetic unit. It operates on two binary numbers, each with a 16-bit two's complement significand and a 6-bit two's complement exponent. Its high performance results from a proven method developed and patented by TRW (U.S. Patent No. 3,900,724). The main internal adders and shifters achieve a speed power product of less than 1.0 picojoule per equivalent gate. One output and two input data registers are provided along with three-state outputs. These registers are positive-edge triggered type D flip-flops with a common clock. An input. latch is provided to demultiplex the two input operands from a single input bus. The TDC1022 allows parallel loading and outputting of data and several external command and flag options. An internal pipeline register may be enabled to ensure a full arithmetic throughput rate of 10MHz, (100 nsec, Typ.).
Features • • • • • • • • •
• Single 5V Supply • 64 Pin DIP or 68 Contact Ceramic Leadless Chip Carrier
Applications • • • • • •
Image Processing ALU in Array Processor Conversion between Fixed and Floating Point Numbers Digital Filters FFT's Secure Communications
Instructions A. Denormalize - A Denormalize Limit (LMT) Round (RND) -;- 2, Scale (SCA) Accumulate (ACC)
Zero A+B
A-B B-A B Normalize - S Normalize
Floating Point, Two's Complement Dynamic Range Equivalent to 64 Bits Fixed Point Selectable Pipelining, 100 nsec stage time Three-State TIL Output Selectable Add/Accumulate Function 12 Function Data/Arithmetic Control -;- 2 Scaling Function for FFT's Selectable Saturating Arithmetic Parallel Data 110
Flags Exponent Overflow Significand Overflow
Zero Exponent Underflow
Functional Block Diagram ACCUMULATOR PATH
01
n
LOI
CLK
~OE~~~~~~IZE-.-J
LALU-.J
LRENORMAlIZE~ SECTION
L
LIMIT ~ SECTION
TRW reserves the right to change product and specifications without notice. This information does not convey any license under patent rights of TRW Inc. or others. LSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 92038 @
Ie MASTER 1983
Phone: (619) 457-1000 Telex: 697-957 TWX: 910-335-1571
© TRW Inc. 1982 40G00817 Rev. A-6/82 Printed in the U.S.A.
817
--~.-.
••,
TDC1028 Advance Information' Features
FIR Digital Filter Building Block The TRW TDC1028 is a video-speed, TIL compatible bit-slice "building block" for Finite Impulse Response IFIRl digital filters and for multi-bit digital correlators. It is implemented as a bitslice processor independently in the coefficient and signal data word dimensions. Word lengths can be multiples of four bits. Two's complement or unsigned magnitude operation is independently selectable for both coefficients and signal data words. .
• 20 MegaSamples Per Second IMSPSl Throughput Rate • Eight Coefficients . • Cascadable ITo>36 Tapsl Without External Components • 4 Bit Coefficient And Signal Data Words • Independently Expandable Coefficient And Signal Word Length • Independently Selectable Format For Coefficients And Signal Data Words ITwo's Complement Or Unsigned Magnitudel
.48-Pin DIP Or 58-Contact Leaded Or Leadless Chip Carrier • Single + 5V Power Supply • TIL Compatible
The TDC1028 provides eight delay stages, eight multipliers, and eight adders in a single integrated circuit. Eight coefficient Applications storage registers are also provided for ease in programming filter characteristics. One coefficient may be changed every clock. • Digital Video Filters cycle. The delay registers and the adder pipeline registers have • Matched Filters been merged for efficiency. • Pulse Compression
• Multi-Bit Correlation • Waveform Synthesis • Adaptive Filters
Functional Block Diagram CLOCK IN (CLK) >>-------1~ SUM IN (SI0.12)
DATA IN (010.3)
COEFFICIENT IN (CI0.3)
DATA OUT (000·3)
>------------.....------...."/~
TO ALL MULTIPLIERS
COEFFICIENT ADDRESS (CAo.2) >----tl~ COEFFICIENT WRITE ENABLE (CWE) > - - - - - - - - - - - - - ' TWO'S COMPLEMENT DATA (TCD) TWO'S COMPLEMENT COEFFICIENTS (TCC) > - - - - - - - - - - - - - - - - - ' "
TRW reserves the right to change product and specifications without notice. This information does not convey any license under patent rights of TRW Inc. or others.
LSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 92038
818
Phone: 16191457-1000 Telex: 697-957 . TWX: 910-335-1571
© TRW Inc. 1982 40G00817 Rev. A-6/82 . Printed in the U.S.A. © Ie MASTER 1983
. TDC1023 Preliminary Information
ii~·-·
Digital Output Correlator
Applications
64 Bit
• Check Sorting Equipment • High-Density Recording • Bar Code Identification • Radar Signature Recognition • Video Frame Synchronization .. Electro-Optical Navigation • Pattern And Character Recognition • Cross-Correlation Control Systems • Error Correction Coding
The TRW TDC1023 is a 64-bit monolithic, all digital correlator with a 7-bit three-state buffered digital output. This device consists of three 64-bit independently clocked shift registers, one 64-bit reference holding latch (exclusive ORed with the A data register), and a 64-bit independently clocked digital summing network. The device is capable of a 20 MHz (typical) parallel correlation rate. The 7-bit threshold register allows the user to pre-load a binary number from 0 to 64. Whenever the correlation score is equal- to or greater than the number in the threshold register, the threshold flag goes active.
Functional Block Diagram AOUT
The 64-bit mask register (M register) allows the user to mask or selectively choose "no compare" bit positions, enabling total word length flexibility.
elK S
The correlation process begins when the reference word is serially shifted into the B register. Then by clocking LOR, . the data is parallel loaded into the Rreference latch. This allows the user to serially load a new reference word into the Bregister while correlation is taking place between the A register and R latch. The two words are continually compared bit-for-bit by exclusive OR circuits. Each exclusive OR provides one bit to the digital summer. The output is a 7-bit word representing the sum of positions which· agree at anyone time between the A register and Rlatch. A control provides either true or inverted binary output formats. Features .20-MHz (Typical) Correlation Rate • Bipolar, TTL Compatible .AII Digital • Single 5V Power Supply • Serial Data Input, Parallel Correlation Output • Programmable Word Length .• Independently Clocked Registers • Power Dissipation: 900 mW (Typical) • Available In 24-Pin DIP And 28-Contact Leadless Chip Carrier • Output Format Flexibility • Three State Outputs
PIPE LINED DIGITAL SUMMER
TS
elK T
UJ
+'"'
o
BOUT
::J
"C
o
MOUT
"-
a..
en ..J
--- Vee --- GND
~
ex:
I-
TRW reserves the righ·t to change product and specifications without notice. This information does not convey any license under patent rights of TRW Inc. or others.
LSI Products Division TRW Electronic Components Group P.O. Box 2472 La Jolla, Ca. 92038 ©
Ie MASTER 1983
Phone: (619)457-1000 Telex: 697-957 TWX: 910-335-1571
© TRW Inc. 1982 40G00817 Rev. A-6/82 Printed in the U_SA
819
For Key Data On Every Ie On This Board, The Place To Look Is ...
The Blue Chip Computer STD-NSC800 is a CMOS standard bus compatible central processor card.
Equipment and system design often require the use of a wide variety of integrated circuits in order to obtain optimum performance. One way for an engineer to be certain that he hasn't overlooked the best device for his application is to refer to the pages of Ie MASTER. Surveys conducted by Ie MASTER, integrated circuit manufacturers, and independent research agencies confirm that four out of five Ie MASTER users have specified one or more products as the result of using Ie MASTER.
Device No. NMC27C16 NSC800 74SC245 MD74SC373 ICL8212C MM74PCOO MM74PC32 MM74PC08 MD74SC139 MM74PC74. MSC74PC07 MM74C30'
Description Erasable CMOS PROM 8-bit Microprocessor 3-State Octal Bus Driver Noninverted D-Type Transparent Latch Micropower Voltage Detector Quad 2-lnput NAND Gate Quad 2-lnput OR Gate Quad 2-lnput AND Gate Octal Decoder IDemultiplexer Dual Type-D Flip-Flop Hex Inverter 8-lnput NAND Gate
Representative list of ICs on the Blue Chip Computer STDNSCBOO card. Key specifications for al/ of these ICs can be found in IC MASTER.
rclCMA5TER BE SURE. BEGIN WITH THE Ie MASTER
TEXAS INSTRUMENTS INCORPORATED
Bipolar Digital Logic Circuits Functional Index and Product Guide
.....cUJ Q)
E :J
.....UJ J....
e SSI, MSI, and LSI Circuits
C
UJ
fit
«S X
Microprocessors and Support Circuits
{E.
e Field-Programmable Logic Arrays .
"In
Advanced Low-Power Schottky, Advanced Schottky, Low-Power Schottky, Schottky, and Original TTL Families © Ie MASTER 1983
821
FUNCTIONAL INDEX/SELECTION GUIDE
Page 823, 824
Gates and Inverters , , , , , , , , , , , , , , , , Expanders and Expandable Gates ,",'
',,,,,,,,,,,,,,,,,
,,,,,"
824
Buffers " " " , " ' , , " ' , , " , " " ' , ' , , " " , " , " , , " ' , ' , ' , ' , ' , " ' , " ' , " ' , , " , , " " " ' , " ' , " , , , , ' , , , , 824, 825 Drivers, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , . , , , , , .. , , ... , , , , ' , , .. , , , , , , , , , , , , , , , . , , 824, 825 , , 824,825 Transceivers " Clock Generators
825
Flip-Flops
826
Latches ' . " ' . ' , ' " . , Monostable Multivibrators
826
826
Registers, , ' , , , , , , , , ' Programmable Logic Arrays
827 827
Counters "',,,.,,"""
828 829
Decoders/Demultiplexers Code Converters ","
829 829
Priority Encoders ,,' ' Display Decoders/Drivers
, " , ,",' "
Controllers, Memory and Microprocessor Voltage-Control'led Oscillators
830 830 830
Arithmetic Circuits (Adders, Accumulators, Multipliers)
831
,Comparators .,','"".,.""",,.',.,',,.,.,",',",',',," Error Detection and Correction Circuits " .. , ... ,',',',." .. , , " " " " " , " , , ' Bit-Slice Processors " ,,,,,,,,,,,,.,,,'
831
Programmable Read-Only Memories (PROMs) "'," ,,,,,,,,,,, ,,.,,,,, Read-Only Memories (ROMs) .. ,' . , , , , , , , , , , , , , . , , , , , , , , , ' . , , , , " ,.,,,,,,,. ,,,."
831 831
,,,,,,,,,,
832 832
Random-Access Memories (RAMs) .,',',.,.".,',',',.,', .. "'.,",',.,,".,', .. ,,',,., .. ,',.'
832
First-In, First-Out Memories (FIFOs) " " " " , . , " ' , .. " .. , .. , " " " " , . , . , " ' , . , . , " " ' , . " . ' , ' , . , " " , .. "., 832
en s::: (l) E ::s :... +-' en s::: en res >< (l)
+-'
....
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
822
© Ie MASTER 1983
FUNCTIONAL INDEX/SELECTION GUIDE GATES AND INVERTERS POSITIVE-NAND GATES AND INVERTERS
POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
TECHNOLOGY DESCRIPTION Hex 2-lnput Gates
TYPE STD ALS TTL '804 .a.
•
'04 Hex Inverters '1004
•
'00 Quadruple 2-lnput Gates
• Triple 3-lnput Gates
'10 '1010
Dual 4-lnput Gates
•
'20
.a. A
•
Ii
L
LS
•
• • • •
• • • •
.a. A
• • • •
A
•
• • • •
A
'30
• •
• • • • A
13-lnput Gates
S
A
'1020 8-lnput Gates
A
•.a. •
'1000
AS
'133
•
•
BooKt ADV TTL ADV ADV CF TTL ADV CF ADV CF TTL ADV CF ADV TTL ADV CF ADV TTL ADV CF TTL ADV
PAGE NO. 5-7
DESCRIPTION
Hex Inverters
TYPE STD ALS TTL
•
'05 '1005
• • • A • • • • A
'03 '1003
Triple 3-lnput Gates Dual 4-lnput Gates
• A
'01 Quadruple 2-lnput Gates
AS
'12 '22
H
L
LS
•
• •
•
• • • • • • •
•
5-B
Hex 2-lnput Gates
•
'08
Quadruple 2-lnput Gates
'1008 '11
Triple 3-lnput Gates
'1011 Dual 4-lnput Gates Triple 4-lnput ANDINAND
'21 '800
AS A
•
• • • •
H
LS
• •
A A
• • • A
• A A
AS
H
LS
S
• •
• •
• • •
BooKt TTL ADV TTL ADV
PAGE NO. 5-8 5-10
POSITIVE-OR GATES TECHNOLOGY TYPE STD ALS AS LS TTL '832 A A
Hex 2-lnput Gates
'32
•
• •
Quadruple 2-lnput Gates '1032 'B02
5-10 Triple 4-lnput oRINoR
S
• •
A
.a.
BooKt ADV TTL ADV CF ADV
PAGE NO 5-13
A
POSITIVE-NOR GATES 5-12 TECHNOLOGY DESCRIPTION
TYPE STD ALS TTL '80S A
5-38 Hex 2-lnput Gates Quadruple 2-lnput Gates
'02 '1002
Triple 3-lnpul Gates
'27
•
•
5-7 Dual 4-lnput Gates with Strobe DualS-Input Gates
'25 '260
•
AS A
L
LS
A
•
A
•
•
A
•
•
BOoKt ADV TTL ADV CF ADV TTL ADV CF TTL TTL
PAGE NO. 5-6
5-12
5-11 5-57
SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS
5-7 DESCRIPTION 5-9 5-11
S
• • •
5-7
Hex Inverters Dual 4-lnput Positive-NAND
PAGE BOoKt S NO. AOV TTL ADV CF ADV TTL ADV CF ADV TTL ADV CF ADV
•
'15
Quadruple 2-lnput Positive-NAND TECHNOLOGY
TYPE STD ALS TTL '808 A
Gates
'09
DESCRIPTION
POSITIVE-AND GATES
DESCRIPTION
3-I~put
5-6
PAGE BOOKt S NO. TTL ADV ADV TTL ADV TTL ADV ADV TTL ADV TTL ADV
TYPE STD ALS TTL
Quadruple 2-lnput Gates Triple
POSITIVE-NAND GATES AND INVERTERS WITH OPEN-COLLECTOR OUTPUTS TECHNOLOGY
TECHNOLOGY DESCRIPTION
TECHNOLOGY TYPE STD ALS AS LS TTL '14 '19 '13 '18 '24 '132
• •
S
• • • • •
• •
BOOKt
PAGE NO.
TTL SUP TTL SUP SUP TTL
5-9 17 5-9 17 17 5-37
CURRENT-SENSING GATES
5-8
PAGE BOOKt TYPE ALSI AS I LS NO. '63 I I· TTL 5-20
Hex
Q)
E
:::::s
....."-
DELAY ELEMENTS
5-9
C/)
TECHNOLOGY DESCRIPTION 5-11
Inverting & Non-inverting Elements, 2-lnput NAND buffers
TYPE '31
, ,.
ALSI AS I LS
BOoKt
PAGE NO.
C C/)
CU
CF
>
< Q)
positive logic: V
= AB+CDE+FGH+IJ
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
nu - make no external connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
850
© Ie MASTER 1983
PRODUCT GUIDE
55
logic symbol, 'H55 t
typical performance TYPE
2-WIDE 4-INPUT AND-OR-INVERT GATES
POWER
DELAY
'H55
30mW
6.8 ns
'L55
1.5 mW
43 ns
2.75 mW
12.5 ns
'LS55
&
J, N PACKAGES
~1
A
8
Y
(3) C-
2
8
9
X
3
e
10
E
(4)
4
l'
F
0-
5
0 X
12
G
6
ne
13
H
7
GND
14
Vee
E(10)
SN74H55 (J,N)
SN54H55 (J) SN54L55 (J) SN54LS55 (J,FH)
A~ B~
pin assignments, 'H55
&
~y
(11 ) F(12)
SN74LS55 (J,N,FN)
1
G-
(13) H(5)
x-
\
x~
JE = ABCD+E FGH+X
positive logic: Y
pin assignments, 'L55, 'LS55
logic symbol, 'L55, 'LS55 t
X - Output of SN54H60/SN74H60 or SN54H62/SN74H62
(1 )
J. N PACKAGES
FH. FN PACKAGES
1
A
8
Y
1
ne
11
ne
(2)
2
B
9
ne
2
A
12
Y
B-
3
E F
3
B
13
ne
4
e 0
10
C~
4
e
14
E ne
~1
&
A-
(4)
~y
0-
E(10)
&
11
5
ne
12
G
5
ne
15
6
ne
13
H
6
0
16
F
7
GND
14
Vee
7
ne
17
ne
8
ne
18
G
9
ne
19
H
GND
20
Vee
F~ (12)
10
G-
(13)
H-
= ABCD+EFGH
positive logic: V
56
pin assignments
logic symbol t
50-TO-1
typical performance ClKA TYPE 'LS56
JG, P PACKAGES
CTR ClR (6)
FREQUENCY DIVIDER
CLOCK FREQUENCY 25 MHz
SN54LS56 (JGI
CLEAR HIGH
POWER
ClKS
(5) ....... (1) ........
.,
CT=O j'"
OlV5 +
CT=4
1
elKB
5
elKA
2
Vee
6
elR
3
OA
7
08
4
GND
8
Oe
(3)
OA
OlV10 +
(7)
CT=4,9 CT>4
85 mW
(8)
Os Oc
For chip carrier information, contact the factory.
SN74LS56 (JG,PI
tPin numbers shown on logic symbols are for J, JG, N, and P.packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
©
Ie MASTER 1983
851
PRODUCT GUIDE logic symbol t
57
pin assignments
60-TO-1
CTR (6)
FREQUENCY DIVIDER
ClR
typical performance TYPE
CLOCK FREQUENCY
'LS57
25 MHz
SN54LS157 (JG)
(5) ,....,
ClKA
CLEAR
POWER
HIGH
85 rriw
TYPE SN7460 (J,N) SN74H60(J,N)
SN54H61 (J)
(1) ,....., ClKB
POWER
GT=4,9
(8)
OB Oc
lB~
6mW
C (3) 1-
I TYPE I POWER I 'H61 I 13 mW SN74H61 (J,N)
lD~ 2A~ 2B~ 2C~ 2D~
pin assignments & (11) lX E[
~lX
&
J, N PACKAGES 1A B 20 1B 9 2X 1C 10 2X 11 1X 2A 2B 12 1X 2C 13 10 GND 14 VCC
~2X
logic symbol t lA.....!.!l-
1 2 3 4 5 6 7
--....!!!U. 2X E[
pin assignments &
E~lX
lB~ lC~ 2A~ 2B~ 2C~
&
(11) 3A-
&
E~2X
3B~
en
OA (7)
+
lA-llL
4mW
typical performance
positive logic: X = ABC when connected to X input of SN54H52/SN74H52
+-'
(3)
CT>2
CT>4
'60
'SO positive logic: X = ABCD when connected to X and X inputs of SN5423/SN7423, SN5450/SN7450, or SN5453/SN7453 'HSO positive logic: X = ABCD when connected to X and X inputs of SN54H50/SN74H50, SN54H53/SN74H53, or SN54H55/SN74H55
EXPANDERS
+ DIV1Q
'H60
EXPANDERS
TRIPLE 3-INPUT
r DIV6
typical performance logic symbol t
DUAL 4-INPUT
61
CT=Q
JG, P PACKAG!,S ClKB 5 ClKA 6 ClR vcc 7 QB QA GND 8 Qc
SN54LS 157 (JG, P)
60 SN5460 (J) SN54H60 (J)
-.
1 2 3 4
1 2 3 4 5 6 7
J, N PACKAGES 1A 8 2X 1B 9 1X 1C 10 3X 3A 11 2A 12 3B 2B 13 3C 2C GND 14 VCC
E~3X
(13) 3C-
C
Q)
E ::::J
'-
+-'
en C
en >< Q)
as
I-
tPin numbers shown on logic symbols are for J, JG, N, and P packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
852
©
Ie MASTER 1983
PRODUCT GUIDE typical performance
logic symbol t
4-WIDE AND-OR
I TYPE I POWER I
EXPANDERS
I 'H62 I
(1 ) A(2)
62 SN54H62 (J)
25mW I
SN74H62 (J,N)
pin assignments ~1
&
J. N PACKAGES X
8-
1
A
8
c~ D~ E~
2
B
9
F
3 - C 4 0
10 11
G
5 6
E X
12
I
13
J
7
GND
14
Vee
&
(9)
E[
&
F(10) G(11 ) H(12)
(8)
~X
~(6)
-
H
X
&
1(13)
J-
63
logic symbol t
typical performance
HEX CURRENT- I TYPE
I POWER
I 'LS63 I
SENSING
3.3mW
IDELAY
I
I
I
21 ns
1A
INTERFACE 2A
GATES
3A
SN54LS63 (J,FH)
SN74LS63 (J,N,FN)
4A 5A 6A
b
(3) (6)
(9)
(8)
(10)
(11)
(13)
(12)
A2L
INVERT GATES
B~
OUTPUT TOTEM POLE OPENCOLLECTOR
&
POWER 29mW 36mW
SN54S64 (J,FH) SN54S65 (J,FH)
DELAY 3.5 ns 5.5 ns
SN74S64 (J,N,FN) SN74S65 (J,N,FN)
G--.!!!...-. H~ I~ J~ K~
1A
8
4Y
2
1Y 2Y
9
4A
10
5A 5Y
3 4
2Y
13 14
4A
11 12
6Y
5
nc
15
nc
1Y
4
3Y
5
2A 3A
4Y
6 7
3Y
13
6A
6
2A
16
5Y
GND
14
Vee
7
nc
17
nc
8
3A
18
6Y
9 10
3Y
19
6A
GND
20.
Vcc
5Y 6Y
5A
pin assignments
;;'1
J. N PACKAGES A 8 Y 9 J 2 E 1
-
1
2Y
c~
D~ E~ F~
FH. FN PACKAGES 11 nc nc 12 4Y 1A 2
1 3
(111
typical performance
'S65
1Y
[.;;50 pAl
(5)
4-2-3-2 INPUT AND-OR-
'S64
(2)
[;.200 pAl
logic symbol, 'S64 t
64,65
TYPE
J. N PACKAGES
IIV
(1) (4)
pin assignments
&
~Y &
3 4
F
10
K
G
B
5
H
11 12
6 7
I
13
C 0
GND
14
VCC
FH. FN PACKAGES nc 11 nc 12 Y 2 A 1
3 4
E
13
J
F
14
K
5
nc
15
nc
6 7
G nc
16 17
nc
8
H
18
9 10
I
19 20
GND
B e 0 Vee
&
CD
E
logic symbol, 'S6S t
A~
&
::s
.....en ~
;;'1
(111
c:
B~
c....!.!!L
en
D~ (21
E-
ttl
>
+
o ~10B
CTl2
f"
CTRDIV 10
-.~
2ClR (9) 2ClK ,....,.
SN74lS68 (J,N,FN)
SN54lS68 (J,FHI
r
CTRDIV 5
1ClKB (15) ......
POWER
~10A
CT=O
1ClR
typical performance
t>
CT=O
I>
~10C
~10D ~20A ~20B ~20c
CT13 ~20D
+
I
J. N PACKAGES 1 lClKA 9 2ClK 10 2QB 2 lQB 11 2ClR 3 . 1Qo 4 lClR 12 2Qo 13 lQC 5 2QC 14 1QA 6 nc 7 2QA 15 lClKB 16 vCC 8 GNO
PACKAGES 11 nc lClKA 12 2ClK 13 2QB lQB 14 2ClR 1QO lClR 15 2QO 16 nc nc lQC 2QC 17 18 lQA nc 19 lClKB 2QA 20 VCC GNO
FH. FN
1 2 3 4 5 6 7
8 9 10
nc
nc - no internal connection
69
logic symbol t
pin assignments
DUAL 4-BIT BINARY COUNTER
•
CTRDIV 2 1ClKA (1)
High-drive outputs (tal rated at 8 mA/1 6 rnA)
,.....
-{
COUNT FREQUENCY
CLEAR
70 MHz
lOW
1ClKB (15),.....,
POWER DISSIPATION 180 mW
I>
,--0
CT=O
+
..........ill. 1OB ~10C
CT
2G~
'2A~
3G~ 3A~
(13) 4G4A i!!L-
\]
J. N PACKAGES
1 2 3 4 5 6 7
1G 1A 1Y 2G 2A 2Y GND
8
9 10 11 12 13 14
3Y 3A 3G 4Y 4A 4G
Vee
FH. FN PACKAGES 1 nc 11 nc 2 1G 12 3Y 3 1A 13 3A 4 1Y 14 3G 5 nc 15 nc 6 2G 16 4Y 7 nc 17 nc 8 2A 18 4A 9 2Y 19 4G 10 GND 20 Vcc
~1Y
~2Y (8) I - - - 3Y
.....c:UJ (J)
~4Y
E ::J
..... UJ L.
positive logic: Y=A
c: UJ
as
X
(J)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
875
PRODUCT GUIDE 128
logic symbol t
LINE DRIVERS
1A
(SN54128 ... 75 !~ DRIVER
18
SN74128 ... 50
n
DRIVER)
;;.1[>
1 2 ;3 4 5 6 7
2A
typical performance
TYPE
pin assignments
28
LOW· LEVEL
HIGH· LEVEL
OUTPUT
OUTPUT
3A
DELAY
38 4A
CURRENT CURRENT SN54128
48 rnA
-29 rnA
7 ns
SN74128
48 rnA
-42.4 rnA
7 ns
SN54128 (J,FH)
positive logic: Y
ClK
DEMULTIPLEXERS WITH
(4)
X/V C8 (15) YO
A
(combines decoder and 3·bit B
address register and incorporates
C
2 enable inputs to simplify cascading) typical performance
8.5 ns
nc
2Y nc
2A 2B GND
11 12 13 14 15 16 17 18 19 20
nc
3A 3B 3Y nc
4A nc
4B 4Y Vee
pin assignments
0
ADDRESS REGISTERS
'ALS131
1Y lA 1B
A+B
logic symbols t
TO OUTPUT
nc
SN74128 (J,N)
3- TO 8·L1NE DECODERS!
TYPE
FH PACKAGE
1 2 3 4 5 6 7 8 9 10
48
131
CLOCK
J. N PACKAGES 1Y 8 3A 1A 9 38 18 10 3Y 2Y 11 4A 2A 12 4B 2B 13 4Y GND 14 Vee
4
ENABLE TIME 10 ns
SN54ALS131 (J,FH)
1 2 3 4 5 6 7 8
J. N PACKAGES A 9 Y6 B 10 Y5 C 11 Y4 ClK 12 Y3 G'2 13 Y2 G1 14 Y1 Y7 15 YO GND 16 Vec
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc A
B C ClK nc • G'2 G1 Y7 GND
11 12 13 14 15 16 17 18 19 20
nc
Y6 Y5 Y4 Y3 nc
Y2 Y1 YO VCC
Y5
TOTAL POWER
Y6 Y7
25mW
SN74ALS131 (N,FN)
OR
DMUX
(4)
C8
ClK
0
( 1) A
:}Gt
B
C
(15) YO
2
4 5
Y5
6
Y6
7
Y7
t Pin numbers shown on logic symbols are for J and N packages only.
nc -
no'internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265
876
©
Ie MASTER 1983
PRODUCT GUIDE logic symbol t
132
TYPE
HYSTERESIS
DELAY
'132
0.8 V
15 ns
'LS132
0.8 V
15 ns
2A~ 2B~ 3A~ 3B~
'S132
0.55 V
8 ns
4A~
typical performance
SN74132 (J,N) SN74LS132 (J,N,FN) SN74S132 (J,N,FN)
TYPE
POWER
'S133
GATES SN54ALS133 (J,FH) SN54S133 (J,FH)
~2Y
~3Y
positive logic: Y
A~
8 ns
B~
19 rnW
3 ns
SN74ALS133 (N,FN) SN74S133 (J,N,FN)
J, N PACKAGES 1A 8 3Y 18 9 3A 10 38 1Y 11 4Y2A 12 4A 28 2Y 13 48 GND 14 Vee
~4Y
4B~
DELAY
2rnW
'ALS133
POSITIVE-NAND
1 2 3 4 5 6 7
=
FH, FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
1A 18 1Y nc
2A nc
28 2Y GND
11 12 13 14 15 16 17 18 19 20
nc
3Y 3A 38 nc
4Y nc
4A 4B
Vee
AB
logic symbol t
typical performance
13-INPUT
~1Y
1B-EL...
NAND SCHMITT TRIGGERS
133
&IT
1A-1!.L
QUADRUPLE 2-INPUT POSITIVE-
SN54132 (J,FH) SN54LS132 (J,FH) SN54S132 (J,FH)
pin assignments
pin assignments &
(2)
1 2 3 4 5
(3)
c(4)
D(5) E-
F~ (7)
~ . Y
G(10)
J, N PACKAGES A 9 y
B
e D E
6
F
7 8
G GND
10 11 12 13 14 15 16
FH. FN PACKAGES
K
1 2 3 4 5
D
L
6
nc
H
I J
M
Vee
H~
7 8 9 10
nc A
B
e E F
G GND
11 12 13 14 15 16 17 18 19 20
nc y
H
I
J nc
K L
M
Vee
(11 )
1(12)
J(13) K-
positive logic: Y
L~
=
ABCDEFGHIJKLM
(15) M-
134
logic symbol t
12-INPUT POSITIVE-NAND GATES
Oc~ A~
WITH THREE-STATE OUTPUTS typical performance
TYPE
DELAY
MAX
MAX
SOURCE
SINK
CURRENT CURRENT SN54S134
4.5 ns
-2 rnA
20 rnA
SN74S134
4.5 ns
-6.5 rnA
20 rnA
SN54S134 (J,FH)
SN74S134 (J,N,FN)
pin assignments &
EN
B~ c~ D~ E~ F~ G~ H~ I~
\J
~Y
1 2 3 4 5 6 7 8
J, N PACKAGES A 9 y
B
e D E F
G GND
10 11 12 13 14 15 16
FH. FN PACKAGES
K
1 2 3 4 5
L
6
H
I
J
~
Vee
7 8 9 10
nc A
B
e 0 nc
E F
G GND
11 12 13 14 15 16 17 18 19 20
nc y
C
Q)
H
E
I J
L. ......
::J
CIJ C
nc
K
CIJ
L
De
Vee
(12)
J~
(13)
K~
L~ positive logic: Y
=
ABCDEFGHIJKL
t Pin numbers shown on logic symbols are for J and N packages only.
nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265 @
Ie MASTER 1983
CIJ ......
877
«S X
Q)
I-
PRODUCT GUIDE 135
logic symbol t
typical performance
QUAD EXCLUSIVE
I TYPE I
OR/NOR GATES
I 'S135 1 325 mW I
POWER
IDELAY 11c 2C 8 ns
j . 1A
SN54S135 (J,FH)
(4)
pin assignments
( .1L-
=1
18~
SN74S135 (J,N,FN)
2~1Y
2A~ 28~ 3C,4C (12)
~2Y N2
3A~ 38
positive logic: Y
QUAD EXCLUSIVE·OR
=
A (f) B (f) C
DELAY 1 A -
TYPE
POWER
'136
150mW
27 ns
30mW
18 ns
COLLECTOR OUTPUTS 'LS136
SN74136 (J,N) SN74LS136 (J,N,FN)
18~ 2A~ 28~ 3A~ 38~ 4A
3Y 3A 3B 3C.4C 4Y 4A 4B VCC
1 2 3 4 5 6 7 8 9 10
FH, FN PACKAGES nc 11 nc 1A 12 3Y 1B 13 3A 1Y 14 3B 1C,2C 15 3C.4C nc 16 nc 2A 17 4Y 2B 18 4A 2Y 19 4B GND 20 VCC
pin assignments =1
Q
~lY ~2Y ~3Y
.DlL-
~4Y
48~ positive logic: Y
9 10 11 12 13 14 15 16
= ABC + ABC + ABC + ABC
(1)
GATES WITH OPEN· SN54136 (J,FH) SN54LS136 (J,FH)
1A 1B 1Y 1C,2C 2A 2B 2Y GND
~4Y
logic symbol t
typical performance
1 2 3 4 5 6 7 8
2~3Y
=1
..!.!!L
4A~ 48~
136
J, N PACKAGES
J
N2
=
A (f) B
= AS + AB
N PACKAGES 1A 8 3Y 1S 9 3A 1Y 10 3B 11 4Y 2A 2B 12 4A 13 4B 2Y GND 14 VCC
J,
1 2 3 4 5 6 7
FH, FN PACKAGES 11 nc 1 nc 12 3Y 2 1A 13 3A 3 1B 14 3B 4 1Y 15 nc 5 nc 16 4Y 6 2A 17 nc 7 nc 18 4A 8 2B 19 4B 9 2Y 10 GND 20 VCC
en ..... c
Q)
E ::l
'..... en
c en
as x Q) I-
t Pin numbers shown on logic symbols are for J and N packages only,
nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
878
,© Ie MASTER 1983
PRODUCT GUIDE logic symbol t
137 3· TO 8·L1NE DECODERS!
pin assignments A
9
Y6
1
nc
11
nc
2
B
10
Y5
2
A
12
Y6
3
e
11
Y4
3
B
13
Y5
4
GL
12
Y3
4
e
14
Y4
B
5
(;2
13
Y2
5
GL
15
Y3
c
6
G1
14
Y1
6
nc
16
nc
a
ADDRESS LATCHES typical performance
'ALS137 'LS137
A
SELECT ENABLE TOTAL TIME TIME POWER 11 ns 10 ns 25 mW 17.5 ns
SN54ALS137 (J,FH) SN54LS 137 (J,FH)
16 ns
FH. FN PACKAGES
1
DEMUL TIPLEXERS WITH
TYPE
J. N PACKAGES
X/V
Gl
7
Y7
15
YO
7
G2
17
Y2
8
GND
16
Vee
8
G1
18
Y1
9
V5
55 mW
10
Y7
19
YO
GND
20
Vee
V6
SN74ALS137 (N,FN) SN74LS137 (J,N,FN)
V7 OR
DMUX
a A B C
V5 V6 V7
en ...... C
(])
E :J s.... ...... en c en
as X
{E.
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
879
PRODUCT GUIDE logic symbol t
138
pin assrgnments BIN/OCT
3· TO 8·L1NE DECODERS/
J, N
1 2 3 4 5 6 7 8
DEMUL TIPLEXERS typical performance TYPE 'ALS138 'LS138 'S138
SELECT ENABLE TOTAL TIME TIME POWER 8.5 ns 22 ns 8 ns
9 ns 21 ns
25 mW
31 mW 7 ns 245 mW
EN
\
e C!2A G2B Gl Y7 GND
CKAGES
9 10 11 12 13 14 15 16
Y6 Y5 Y4 Y3 Y2 Yl YO
Vee
Y6
G2B
FH'. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
A B
e G2A nc ~2B
Gl Y7 GND
11 l2 13 14 15 16 17 18 19 20
nc
Y6 Y5 Y4 Y3 nc
Y2 Yl YO
Vee
Y7
SN74ALS138 (N,FN) SN74LS138 (J,N,FN) SN74S138 (J,N,FN)
SN54ALS138 (J,FH) SN54LS138 (J,FH) SN54S138 (J,FH)
P~
A B
OR
DMUX
:}Gt
0
2
3
logic symbol t
139
pin assignments J, N PACKAGES
DUAL 2· TO 4·LINE
1 2 3 4 5 6 7 8
DECODERS/DEMULTIPLEXERS typical performance TYPE
SELECT ENABLE TOTAL TIME
TIME
POWER
'ALS139 'LS139
'22 ns
'S139
7.5 ns
19 ns
34mW
6 ns 300 mW
lG lA lB lYO lYl lY2 lY3 GND
9 10 11 12 13 14 15 16
2Y3 2Y2 2Yl 2YO 2B 2A 2G
Vee
FH, FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
lG lA lB lYO nc
lYl 1Y2 lY3 GND
11 12 13 14 15 16 17 18 19 20
nc
2Y3 2Y2 2Yl 2YO nc
2B 2A 2G
Vee
SN54ALS139 (J,FH) SN54LS139 (J,FH) SN54S139 (J,FH) (4)
"""'--1 YO (5)
.......--.(_9)_2Y3
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
880
@
Ie MASTER 1983
PRODUCT GUIDE logic symbol t
140 DUAL 4-INPUT POSITIVE-
lA-1!.L
NAND 50-OHM LINE DRIVERS
lB~
typical performance
lC~ lD~
TYPE
LOW-
HIGH-
LEVEL
LEVEL
OUTPUT
OUTPUT
POWER
CURRENT CURRENT 'S140
60mA
-40mA
SN54S140 (J,FH)
PER
2A..J2.L.-
GATE
2B..i!&-
44mW
2C~ 2D~
DELAY
4 ns
pin assignments
~lY
1
1A
8
2Y
1
nc
11
nc
2
16
9
2A
2
1A
12
2Y
3 4
nc
26
13
2A
nc
3 4
16
1C
10 11
nc
14
26
5
10
12
2C
5
nc
15
nc
6
1Y
13
20
6
1C
16
nc
7
GNO
14
VCC
7
nc
17
nc
8
10
18
2C
9 10
1Y
19
20
GNO
20
Vce
~2Y
SN74S140 (J,N,FN) positive logic: Y
=
ABCD
logic symbol t
141
00
I
DECODER/DRIVER
1,0
typical performance
'141
pin assignments BCD/DEC [>
BCD-TO-DECIMAL
TYPE
FH. FN PACKAGES
J. N PACKAGES
&[>
OUTPUT
OFF-STATE
SINK
OUTPUT
CURRENT
VOLTAGE
7 mA
60 V
A
TOTAL
B
POWER
C D
(3)
1
(6) (7) (4)
I--..
(15)
~
(8) (9)
~
(13)
~
(14)
2
40 50
8
60 70
aEN
(16)
20 30 1'-0..
4
80mW
~
~ ~
...... 80
SN74141 (J,N)
90
.....
J. N PACKAGES
0
1
8
9
1
2
9
10
7
2
3
A
11
6
3 4
5 (11) 6
3
4
0
12
GNO
5
13
4
6
VCC 6
14
5
7
C
15
1
8
2
16
0
(10) 7 (1) 8 (2) 9
>9Za --
logic symbol t
142
ffiB
COUNTE R/LATCH/
(13)
Cll
DECODER/DRIVER typical performance OUTPUT TYPE '142
CTR DIV10
OFF-STATE
SINK
OUTPUT
CURRENT
VOLTAGE
7 mA
55 V
TOTAL POWER 340mW
SN74142 (J,N)
pin assignments
1
BCD/DEC 110 ~
(15) ClK -
-
~+
110
2
~
CLR~
R
110
4
~
110
~O 10 ~1 20 ~2 30 ~3 40 ~4 50 ~5
1 [>00
60 70
8
80 90
,
CT~8
J, N PACKAGES 1 ClR 9
2
7
10
0
3
6
11
8
4
4
12
5
5
13
9 STRB
6
3
14
Go
7
2
15
ClK
8
GND
16
VCC
~6 ~7
::::....J..!2l
8
~9
~QD
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
881
PRODUCT GUIDE logic symbol t '
143,144
iii/ABo
COUNTE RS/LATCH ES/ DECODERS/DRIVERS
typical performance TYPE
OUTPUT SINK
CURRENT SN54143 15 rnA· 15 rnA· SN74143 20 rnA SN54144 25 rnA SN74144
BI OFF-5TATE OUTPUT
RBi STRs
VOLTAGE 7V 7V 15 V 15V
SN54143 (J)
SN74143 (J,N)
SN54144 (J)
SN74144 (J,N)
(61
pin assignments
.....
... L.:::
(5)
~1
......
(4) (21)
-,
CIR PcEi SCEi
......
(3) (23) (1)
V11
(2) ClK
R V11
l....t:...
G12 11+
130
Z14 1
CT=0l-
130
Z15 2
-,
130
Z16 4
BCOnSEG [T3]
a18
" Q ""' ""'"b18 c18 Q i'-o..
d18Q ....... e18Q .....
-'12CT=9
[>
18Q
• Constant current
logic symbol t
145
[>
DRIVERS FOR LAMPS, RELAYS, MOS
TYPE
'145
OFF-8TATE
SINK
OUTPUT
CURRENT
VOLTAGE
A TOTAL
B
POWER
C
80 mA
15 V
'54LS145
12 mA
15 V
35mW
'74LS145
80mA
15 V
35mW
215mW
C
Q)
E
::J
Jo...
+-"
en
c
en
co
x Q)
D
(15) (14) (13) (12)
SN74145 (J,N)
SN54LS145 (J,FH)
SN74LS145 (J,N,FN)
1
3Q
--
2
4Q
4
50
8
...... 60 70 ......
-~QEN
8Q
.......
9Q"-
(1) (2) (3) (4) (5) (6) (7) (9) (10) (11)
0 1 2 3 4 5
1 (11),....., 1
6
typical performance
'LS147
225mW 60mW
DELAY
1 2 3 4 5 6 7 8
BI
Qo
(16) (14) (9)
(11) (10) (13)
--
(22) (8)
a b c d
6
ClR RBI BI/
ABo
7
DP
8
dp
15 a 16 b 17 OA 18 OB 19 QC 20 aD 21 STRB
9 10
d
e
f
22
MAX
f
11
e
23
PCEI
9
12
GND
24
VCC
MAX dp
J, N PACKAGES 9 7 0 10 8 1 11 9 2 12 0 3 4 13 C 14 8 5 15 A 6 GND 16 Vee
FH, FN PACKAGES 11 nc 1 nc 12 7 2 0 13 8 3 1 14 9 4 2 15 0 5 3 16 nc 6 nc 17 C 7 4 18 B 8 5 19 A 9 6 10 GND 20 VCC
pin assignments HPRI/BCD
J, N PACKAGES
4 (1) ....... 4
1:::::...J2L A
5...m.-t::. 5
2::::-iZL B
6..E.L..t:::.. 6
4~C
7~7
8~D
10 ns 15 ns
SN54147 (J,FH) SN54LS147 (J,FH)
5
Oc
13 9 14 c
8
3..illb 3
'147
ClK
9
2~2
ENCODERS
POWER
2 3 4
7
logic symbol t
4·LINE BCD PRIORITY
TYPE
SCEI
OB
>9Zo:
SN54145 (J,FH)
10·LlNE DECIMAL TO
en
"-
2 Q .....
147 +-"
oQ
1 Q ......
typical performance OUTPUT
1
pin assignments BCD/DEC
BCD·TO·DECIMAL DECODERS/
......
g18Q .....
Z17 8
OP (7)
(15)
Q
f18Q -, 130
OA
r G18
I-
[>
-,
(20)
17
I
C13
-,
(19)
16
&
CTROIV10
(18)
15
~1
J, N PACKAGES
(17)
14
~
SN74147 (J,N) SN74LS147 (J,N,FN)
1 2 3 4 5 6 7 8
4 5 6 7 B
C B
GND
9 10 11 12 13 14 15 16
A 9 1 2 3 0 nc
Vec
FH, FN PACKAGES 11 nc 1 nc 12 A 2 4 13 9 3 5 14 1 4 6 15 2 5 7 16 nc 6 nc 17 3 7 B 18 0 8 c 19 nc 9 8 10 GND 20 Vcc
8~8 9 (10) ........ 9
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
882
@
Ie MASTER 1983
PRODUCT GUIDE logic symbol t
148
pin assignments
PRIORITY ENCODERS
0
typical performance
1
DELAY
TYPE
POWER
'148
190mW
12 ns
'LS148
60mW
15 ns
SN54148 (J,FH) SN54LS148 (J,FH)
2 3. 4
SN74148 (J,N) SN74LS148 (J,N,FN)
5 6 7
(101 ( 111 (121 (131
...... ......
----......
(11 (21 (31
......
(41
-
FH. FN PACKAGES
J. N PACKAGES
HPRI/BIN
8· TO 3·LlNE OCTAL
;;;'1
AO
1
nc
11
nc
10
0
2
4
1
5
'2 13
0
6
14
1
7
15
2 nc
1
4
9
2
5
0/Z10
10
1/Z11
11
-
3 4
6
11
7
12
2
3 4
2/Z12
12- ~
5
El
13
3
5
3/Z13
13 .... 18
4/Z14
14-1-
5/Z15
15-1-
6/Z16
16-1-
7/Z17
17-1-
~EO
a~GS
AO
6
A2
14
GS
6
nc
16
7
Al
15
EO
7
El
17
3
8
GND
16
Vee
8
A2
18
GS
9 10
Al
19
EO
GND
20
Vee
1a~AO EI
r- V18 1 """'"- ENa
(51
150
logic symbol t
1·0F·16 DATA
G~EN
SELECTORSI typical performance DATA TYPE
TO INV OUTPUT
'150
.!.illo l.!1!....EO .!!!L.E1 lZ.!...C
FROM
TOTAL
ENABLE POWER
11 ns
18 ns
SN54150 (J,FH)
200 mW SN74150 (J,N)
:::::....J!L A 1
::=:......ili.. A2
pin assignments
B~O A~
MULTIPLEXERS
2a 4a
}
3
G
FH PACKAGE
J. N PACKAGES
MUX
is
0 1
1
E7
13
e
1
nc
15
2 3
E6
14
B
E7
16
e
E5
15
A
E6
17
8
4
E4
16
E15
E5
18
A
5
E3
17
E14
E4
19
E15
6
E2
18
E13
2 3 4 5 6
E3
20
E14
7
E1
19
E12
7
E2
21
E13
8
EO
20
Ell
8
nc
22
nc
9
G
21
E10
9
E1
23
E12
nc
E2~ E3~ E4~ E5~
2
10
W
22
E9
10
EO
24
Ell
3
11
0
23
E8
11
25
El0
12
GND
24
Vee
12 13
G W
26
E9
0
27
E8
.!!!...--
6
GND
28
Vee
E6
~w
4 5
14
E7~7 E8~8 E9~9 E10 ~ 10 E11 ~ 11 E12 ~ 12 E13 ~ 13
..!.!Zl..-
C
Q)
E ::J
~
;
~
,
;
,
15 .
.
14 .
~
L
E14 E15
UJ
+'"
+'"
_ _ _- '
UJ C UJ
ca
X
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
© Ie MASTER 1983
883
PRODUCT GUIDE logic symbol t
151
MUX
1-0F-8 DATA SELECTORS/MULTIPLEXERS typical performance
G .!ZLt:::... A
TYPE '151 A 'ALS151 'AS 151 'LS 1 51 'S 151
DATA TOINV OUTPUT 8 ns 6 ns 3 ns 11 ns 4.5 ns
DELAY TIMES DATA TO FROM NON-INV ENABLE OUTPUT 22 ns 16 ns 5 ns 4.5 ns ·3.5 ns 5 ns 18 ns 27 ns 8 ns 9 ns
SN54151 A (J,FH) SN54ALS151 (J,FH) SN54AS151 (J,FH) SN54LS151 (J,FH) SN54S151 (J,FH)
8-
c .!2Loo~
TOTAL POWER 145 mW 30mW 130 mW 30 mW 225 mW
SN74151 A (J.N) SN74ALS151 (N,FN) SN74AS151 (N,FN) SN74LS151 (J,N,FN) SN74S 151 (J,N,FN)
01
SN54152A (J,FH) SN54LS152 (J,FH)
05~ 06~ 07~
02
OUTPUT
en c en
as x Q)
I-
1 2 3 4
~w
2
1G
FROM
TOTAL
ENABLE
POWER
.ill...J:::..
ICO~ 1C1~ 1C2~
14 ns
17 ns
180 mW
5 ns
4.5 ns
31.5 mW
'AS153
3.5 ns
5 ns
105 mW
'L153
27 ns
34 ns
90mW
2C1
'LS153
14 ns
17 ns
31mW
2C2~
'S153
6 ns
9.5 ns
225 mW
SN54153 (J,FH) SN54ALS153 (J,FH) SN54AS153 (J,FH) SN54L 153 (J) SN54LS 153 (J,FH) SN54S153 (J,FH)
1C3
.EL.-
2G~
17
06
18 19 20
05 04
GNO
vcc
5 6 7
J. N PACKAGES 04 8 C 03 9 B 02 10 A 07 01 11 00 12 06 W 13 05 GNO 14 Vcc
FH. FN PACKAGES
1
nc
11
nc
2 3 4
04
c
w
12 13 14 15 16 17 18 19
GNO
20
vcc
5 6
7 8 9 10
03 02 nc 01 nc 00
B A
nc
07 nc
06 05
pin assignments
0
1 2 3 4
G3
r'
MUX
'ALS153
'153
1
Y W '?j
pin assignments
MUX
04~ 4 (13) 05- 5 (12) 06- 6 (11 ) 07- 7
.,0)
7 8 9 10
6
EL(2)
A~ B~
FH. FN PACKAGES 11 nc 1 nc 12 c 2 03 13 B 3 02 4 01 14 A 15 07 5 00 16 nc 6 nc
7
logic symbol t
NON-INV
8
03- 3 ~
SN74LS152 (J,N,FN)
DATA TO
5 6 7
J. N PACKAGES 03 9 C 02 10 B A 11 01 12 07 00 13 06 Y W 14 05 15 04 G GNO 16 Vcc
5
(5) 00- 0 (4) 01- 1
DELAY TIMES
+-'
~w
(8)
SELECTORS/MULTIPLEXERS
l.-
~y
]G~ c-
typical performance
:J
(5)
EL-
B~
DUAL 4-LlNE TO 1-LlNE DATA
TYPE
0
(10) A-
153
Q)
:}G4
logic symbol t
DELAY TIMES DATA FROM TOTAL TYPE TOINV ENABLE POWER OUTPUT '152A 8 ns 130 mW 'LS 152 11 ns 18 ns 28 mW
E
2 3 4
1 (2) 02- 2 ( 1) 03~ 3 (15) 04~ 4
1-of-8 DATA SELECTORS/MULTIPLEXERS typical performance
C
1
EN
.illL(10)
152
en +-'
pin assignments
EN 0 1
~1Y
2
5 6 7 8
J, N PACKAGES lG 9 2Y 10 2CO B 2Cl lC3 11 lC2 12 2C2 13 2C3 lCl lCO 14 A lY 15 2G GNO 16 Vcc
FH, FN PACKAGES ·11 nc 1 nc 2 lG 12 2Y 13 2CO 3 B 4 lC3 14 2Cl 5 lC2 15 2C2 16 nc 6 nc 17 2C3 7 rCl lCO 18 A 8 19 2~ lY 9
10
3
GNO
20
Vcc
(10)
2CO~
.ll.!t(12)
~2Y
2C3~
SN741 53 (J,N) SN74ALS153 (N,FN) SN74AS153 (N,FN) SN74LS 153 (J,N,FN) SN74S153 (J,N,FN)
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
884
© Ie MASTER 1983
PRODUCT GUIDE logic symbol t
154
pin assignments
x/v
4·LINE TO 16·LlNE DECODERS/ DEMUL TIPLEXERS
typical performance
O~
(1 )
1~
(2)
2 ......
TOTAL
3!'oo..
TIME
POWER
4!'oo..
(S)
'154
23 ns
19 ns
170 mW
1
S .....
(6)
'L154
46 ns
38 ns
85mW
2
6~
(7)
4
7 .....
(S)
S
s!'oo..
SN54154 (J,FH) SN54L 154 (J)
SN74154 (J,N)
(23)
B
(22)
c
(21)
D
(20)
9 ..... 10 ..... 11 .... 12 .....
Gl 02
(lS) (19)
...... 13 ...... 14
-...~
-...1
I
EN
1.... !'oo..
2
(4)
ENABLE
TIME
A
1
(3)
SELECT
TYPE
0
(9)
3 4 S 6
7 S
(10) (11 )
9 10
(13)
11
(14)
1 2 3 4 5 6 7 8 9 10 11 12
J. N PACKAGES 13 11 0 14 12 1 15 13 2 16 14 3 17 15 4 18 G1 5 19 G2 6 20 D 7 21 C 8 22 B 9 10 23 A GND 24 VCC
FH PACKAGE
1 2 3 4 5 6 7 8 9 10
nc
"12
B
13 14
0 1 2 3 4 5 nc
6 7 9 10 GND
15 16 17 18 19 20 21 22 23 24 25 26 27 28
nc
11 12 13 14 15 G1 nc
G2 D C B
A VCC
12
(1S)
13
(16)
14
(17)
lS
OR
DMUX 0 ...... (1)
0
1 ....... (2t
1
.....;. (3) 2 3!'oo.. (4) 4 ..... (S)
3
(6)
A
(23)
S .....
B
(22)
6 .....
(7)
c
(21)
7 .....
(S)
S~ (9) 9 t--... (10)
D (20)
10 11 12
~
(11)
~
(13)
t--... (14) (lS)
13 '" 14 lS
~
(16)
~
(17)
2
4 S 6 7
S 9 10 11 12 13 14 lS
en
of-'
c:
Q)
E ::l
s-
of-'
en
c:
en
ctl
X
,
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
©
Ie MASTER 1983
885
PRODUCT GUIDE logic symbol t
155 DECODERS/DEMUL TIPLEXERS
TYPE
'&'"" ENABLE TIME
TIME
TOTAL
1G (2)
POWER
'155
21 ns
16 ns·
125mW
'LS155
18 ns
15 ns
30mW
1C (1) (13) A (3) B
SN74155 (J,N) SN74LS155 (J,N,FN)
SN54155 (J,FH) SN54LS155 (J,FH)
,..."
2G
2C
00: 1 0:
EN 0:
20: 30:
~
1 2
(14) .......
I'-.. (7) ~
(S)
~
(5)
~
(4)
O~ ~
~
......
1~ 2~ .....
EN~
(15) ......
......
3~
1Y0 1Y1 1Y2 1Y3
(9)
2YO
(10)
FH. FN PACKAGES
J. N PACKAGES 1C 9 2YO 1G 10 2Y1 B 11 2Y2 1Y3 12 2Y3 1Y2 13 A 1Y1 14 2G 1YO 15 2C GND 16 VCC
1 2 3 4 5 6 7 8
XIV
(totem pole outputs) typical performance SELECT
pin assignments
2-line to 4-line Decoder
,1
2Y1
(11)
I
2 3 4 5 6 7 8 9 10
nc 1C 1G B
1Y3 nc 1Y2 1Y1 1YO GND
11 12 13 14 15 16 17 18 19 20
nc 2YO 2Y1 2Y2 2Y3 nc
2Y2
(12)
A
2G 2C VCC
2Y3
logic symbol t 1-line to 4-line DMUX
logic symbol t 3-line to B-line Decoder A
XIV (13)
A B
2
(1)
C
~ J4 J2)r.....
G
~
JEN
B
2YO
1 ...... (10) 2 ..... (11) (12) 3"(7) 4"'(S)
1
(3)
(9)
0 ......
0 ) G0 3
(3)
1G
2\'3 1YO
(5) s"" (4) 7"-
1Y2
r" A
DMUX
2Y2
1Y1
DMUX
..,.1
2Y1
5~
1C
(2)
O~
,....",
G4
(1)
1"2~
4
~
2G
1Y3
(14) ...... (15) ,....",
...... ......
(10)
......
(12)
(11)
C
1Y2 1Y3 G 2YO
'&'""
TYPE
SELECT
ENABLE
TOTAL
TIME
TIME
POWER
23 ns
18 ns
125 mW
'156 'LS156
33 ns
26 ns
1G
,....",
(1 ) 1C (13) A (3) B
---
2G 2C
(14) .......
EN 0:
(7)
...... 1 o:Q
(S)
20:Q 30:Q o~Q
&""
1 ~O EN~
(15) ,....",
:J
......
00:0
1 2
31 mW
SN74156 (J,N) SN74LS156 (J,N,FN)
SN54156 (J,FH) SN54LS156 (J,FH)
(2)
(9)
(13)
1~
(10)
(3)
2~
(11 )
(1 )
Uill.. (21,....",
~
]:lG%
3"-
2YO 2Y1 2Y2
(12)
2Y3
(7) 4"" (S) 51'-0.. (5) Sl'--.. (4) 7""
]
2Y1
1YO 1Y1 1Y2 1Y3
2Y3 2Y4
1 2 3 4 5 6 7 8
XIV
typical performance
......
(5)
.......
(4)
......
(9)
.....
(10)
r-....
(11)
3~QI'-o..
(12)
2~0
1Y0 1Y1 1Y2 1Y3 2YO
FH. FN PACKAGES
J. N PACKAGES 1C 9 2YO 1G 10 2Y1 11 2Y2 B 1Y3 12 2Y3 1Y2 13 A 1Y1 14 2G 1YO 15 2C GND 16 VCC
1 2 3 4 5 6 7 8 9 10
2Y1 2Y2
nc 1C 1G B 1Y3 nc 1Y2 1Y1 1YO GND
11 12 13 14 15 16 17 18 19 20
nc 2YO 2Y1 2Y2 2Y3 nc A
2n 2C VCC
2Y3
1-line to 4-line DMUX
~
+-'
en
logic symbol t
logic symbol t
c
A
3-line to B·line Decoder
en
B
tU
>< Q) ......
(9)
1Y1
01'-0..
pin assignments
(open-collector outputs)
E
(5)
1Y0 B
2-line to 4-line Decoder
DECODERS/DEMULTIPLEXERS
Q)
(S)
logic symbol t
156
C
(7)
31"-0... (4)
2C
en +-'
logic symbol t 1-line to B-line DMUX
(13)
XIV A B C G
(13) (3)
o Q""'" 1 2
(1)
~
30 J4
J2)r.....
~
10""'" 2Q~
4Q 5Q
JEN
...... ...... ......
(9)
(10) (11)
(12) (7) (S)
-....
(5)
...... 7Q
(4)
SQ
(13)
1·line to B·line DMUX 0 ) G0 1 3 .
(3)
.,.
DMUX
2YO 2Y1
1< Q)
0
ENP GNO
nc
aB aA RCO VCC
(14)
~OD
CTRDIV16
lZ.L-
G4
ENP
pin assignments
5CT=0
--~
(15) i3CT=15 ~RCO
,.
CLK~ ..,C5/2,3,4+ A
..!.L..-
15D
B~'
ill-
(1)
(14)
---ri3i
I
OA
~OB
(2)
1 2 3 4 5 6 7 8
J, N PACKAGES c~ 9 rnA! ClK 10 ENT A 11 aD B 12 aC C 13 aB 0 14 aA ENP 15 RCO
GNO
16
Vcc
FH, FN PACKAGES 1 2 3 4 5 6 7 8 9 10
nc
m C.lK A B nc
C 0
ENP GNO
11 12 13 14 15 16 17 18 .19 20
nc
COAt5 ENT aD ac nc
aB aA RCO Vcc
---mi"
(4)
D~
Oc I - - - OD
(8)
logic symbol, 'LS163A, 'S163 t
CLR~
LOAD --~ (10)
J-
C
ENT aD aC
~Oc
(4) (8)
Ml
C
SN741 63 (J,N) SN74ALS163 (N,FN) SN74AS163 (N,FN) SN74LS163A (J,N,FN) SN74S1 63 (J,N,FN)
nc
nc [OJJ)
~OA ~OB
[1 ) (2)
ill-
M2 (10) E N T - G3
typical performance
ClK A B
11 12 13 14 15 16 17 18 19 20
~RCO
3CT = 9
...,C5/2,3,4+
LOAD
(binary, synchronous clear)
ern
(15)
M2
lZ.L-
CLR~
COUNTERS
nc
~OD
logic symbol, '163t
163
:J
~Oc
FH, FN PACKAGES 1 2 3 4 5 6 7 8 9 10
Ml
D~
Q)
~OB
(4)
m
CTRDIV10
B~
E
i~OA
(2)
J, N PACKAGES 9 mAO ClK 10 ENT 11 aD A 12 aC B 13 aB C 14 aA 0 15 RCO EN~ GNO 16 VCC
5CT=0
G3
C
C
(14)
[1 )
(8)
ENT~
A
+-'
r
~RCO
1 2 3 4 5 6 7 8
logic symbol, 'LS162A, 'S162 t
ENP CLK (2)
UJ
i3CT=9
C5/2,3,4+
A E L - l,5D
(10)
TYPE
pin assignments
CTRDIV16 5CT=0 Ml M2
ENT~
G3
lZ.L-
G4
ENP CLK (2)
(15)
3CT=15
C5/2,3,4+
A EL-
~5D
B~'
C~
D~
(1) (2)
,.
~RCO
(14)
~OA ~OB
(4)
·~Oc
(8)
OD
t Pin numbers shown on logic symbols are for J and N packages only_ nc -
no internal connection.
TEXAS
INSTRUMENTS
INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
890
. © .IC MASTER 1983
PRODUCT GUIDE logic symbol t
164
pin assignments
8-BIT PARALLEL OUT SERIAL SHifT REGISTERS
CLR~
(asynchronous clear)
ClK
,typical performance
TYPE '164
SHIFT FREQ 25 MHz
'ALS164
SERIAL
A ASYNC
TOTAL
CLEAR
POWER
GATED D
LOW
167 mW
GATED D
LOW
DATA INPUT
(8)
i!!....-
SRG8 R
,
Cl/-+
BEL-
r (3) ,..--- °A
110
&
~OB ~OC (6)
~
D
12 MHz
GATED D
LOW
84 mW
~OE
'LS164
25 MHz
GATED D
LOW
80mW
~OF ~OG I - - - OH
SN74LS164 (J.N,FN)
logic symbol t
8-BIT SHIFT REGISTERS SH/LD
(parallel-load with complementary outputs)
'165
FREQ
SRG8 Gl [SHIFT)
0
SERIAL DATA INPUT
25 MHz 35 MHz
SN54165 (J,FH) SN54ALS165 (J,FH) SN54LS165 (J,FH)
C3/-+
r
(10) ASYNC
TOTAL
CLEAR
POWER
D
NONE
210 mW
D
NONE
105 mW
SN74165 (J,N) SN74ALS165 (N,FN) SN74LS165 (J,N,FN)
SER -
A~ B~
C~ D~ E~ F~ G~
3D 2D 2D
166
'166
SHIFT FREQ
SH/LD SERIAL
'ALS166 'LS166
TOTAL
CLEAR
POWER
D
LOW
360 mW
D
LOW
D
LOW
INPUT
20 MHz 35 MHz
SN54166 (J,FH) SN54ALS166 (J,FH) SN54LS166 (J,FH)
R Ml [SHIFT)
,. .
M2 [LOAD)
ASYNC
DATA
~
110mW
SN74166 (J,N) SN74ALS 166 (N,FN) SN74LS166 (J.N,FN)
CLK'NH~O (7) C3/1 ClK-
(1) SER - - ' - - 1,3D A ~ 2,3D
B~
(4) C-
1 2 3 4 5 6 7 8 9 10
FH. FN PACKAGES 11 nc 12 ClR SER A 13 E 14 F B 15 G C nc 16 nc 17 OH D ClK INH 18 H 19 SH/lD ClK GND 20 VCC
pin assignments SRG8
typical performance
FH. FN PACKAGES nc 11 nc SH/lD 12 OH 13 SER ClK E 14 A F 15 B 16 nc nc 17 C G H 18 D 19 ClK INH ~H GND 20 VCC
~OH
8-BIT SHIFT REGISTERS
CLR~
1 2 3 4 5 6 7 8 9 10
(9)
logic symbol t
(parallel/serial input; serial output)
J. N PACKAGES SHim 9 OH ClK 10 SER E 11 A F 12 B 13 C G H 14 D 15 ClK INH OH GND 16 VCC
~OH
H~
TYPE
1 2 3 4 5 6 7 8
C2 [lOAD)
'ALS165 'LS165
~
pin. assignments
{1S1 ClK INH ; - - 1 ~1 ClK ~1
typical performance SHIFT
FH. FN PACKAGES 11 nc 1 nc 12 ClK 2 A 13 ITA 3 B 14 °E 4 °A 15 nc 5 nc 16 OF 6 °B 17 nc 7 nc 18 °G 8 Oc 19 OH 9 OD 10 GND 20 VCC
(11 )
SN74164 (J,N) SN74ALS164 (N,FN)
165
TYPE
J. N PACKAGES A 8 ClK B 9 ClR 10 °E OA 11 OF °B 12 °G Oc 13 OH °D GND 14 VCC
0
'L164
SN54164 (J,FH) SN54ALS164 (J,FH) SN54L 164 (J) SN54LS164 (J,FH)
1 2 3 4 5 6 7
1"
1 2 3 4 5 6 7 8
J. N PACKAGES SER 9 ern 10 E A 11 F B 12 G C D 13 OH ClK INH 14 H 15 SHim ClK 16 VCC GND
2,3D
nc
D~
(13) -OH
t Pin'numbers shown on logic symbols are for J and N packages only.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DAllAS, TEXAS 75265
Ie MASTER 1983
E
:::J :I...
...... UJ
C
UJ
CU
x
J-
nc - no internal connection.
@
C
(])
(])
(10) E(11 ) F-
G~ H~
UJ ......
891
PRODUCT GUIDE logic symbol t
167 SYNCHRONOUS DECADE RATE MULTIPLIERS
~
STROBE
(10) ,....." (11) _
ENABLE UNITY/CAS ClR
typical performance
SET·TO·9
COUNT TYPE
FREQ
TOTAL
CLEAR
POWER
'167 25 MHz ASYNC·H SN54167 (J;FH)
270mW
BO B1 B2 B3
(12) ,..."" (13)
NOUS COUNTERS
(15)
a
(2)
Q
(3)
TOTAL
FREQ
POWER
40 MHz
75mW
40 MHz
500 mW
E ...... en
s::::
en co
x
Q)
~
nc nc B2
11 12 13
4
B3
14
5
z
13
ClR
5
6 7 8
Y ENout GNO
14 15 16
BO B1 VCC
6 7 8 9 10
SETTO-9 nc Z
Y ENout GNO
15 16 17 18 19 20
nc ClK STRB ENin UNITYf CAS nc ClR BO B1 VCC
[RATEJ
/
pin assignments
CTRDIV10
.
ENT~ (7)
rfJP~ ClK
L
G5
3,5CT=9 4,5CT=0
tF-
RCO
G6 2,3,5,6+/C7
~2,4,5,6-
A~~7D B~ C~
r [1]
COUNT
TOTAL
FREQ
POWER 75 mW
40 MHz
SN54ALS 169 (J,FH) SN54AS 169 (J,FH) SN54LS 169B (J,FH) SN54S 169 (J,FH)
tFRCO
J2!..J::-. G6 L 2,3,5,6+/C7
SN74AS169 (N,FN) SN74LS169B (J,N,FN) SN74S169 (J,N,FN)
A~ 7.70
[1]
B..ill.-
[2]
D~
r
[4] [8]
FH. FN PACKAGES
J. N PACKAGES
ENP (2) ClK
C~
(
0 ENP GNO
11 nc 12 lOAD 13 00 14 00 15 Oc 16 nc 17 OB 18 'OA 19 RCO 20 Vce
pin assignments
ENf~
SN74ALS169 (N,FN)
nc UfO ClK A B nc
~QD
(8)
_(1~ M2 [COUNT] UlD-~ M3[UP] U:::.. M4 [DOWN] 3,5CT=15 G5 4,5CT=0
140 mW 500 mW
1 2 3 4 5 6 7 8 9 10
~Q~
[4]
>2,4,5,6-
35 MHz 40 MHz
em
(14) Q
CTRDlV16 _ _ (9) lOAD-p-t:::.. M1 [lOAD)
-i
FH. FN PACKAGES
J. N PACKAGES Ufl) 9 ClK 10 ENT 11 00 A 12 Oc B 13 OB C 14 OA 0 ENP 15 RCO GNO 16 VCC
~Q
[2]
D~
1 2 3 4 5 6 7 8
~A
logic symbol t
typical performance
~
ENABLE
M1 [lOAD] lOAD --i~
(binary)
::J
Y
FH PACKAGE
1 2 3
Gex/3
SN74ALS168 (N,FN) SN74AS168 (N,FN) SN74S168 (J,N,FN)
NOUS COUNTERS
'ALS169 'AS169 'LS169B 'S169
4
z
J. N PACKAGES nc 9 ClK B2 10 STRB B3 11 ENin SETUNITYf 12 CAS TO-9
4P
,
M4[DOWN]
4-BIT UP/DOWN SYNCHRO-
Q)
O}
(7)
""
M2 [COUNT]
169
TYPE
5CT=9
U/D~ M3[UP]
COUNT
SN54ALS168 (J,FH) SN54AS168 (J,FH) SN54S 168 (J,FH)
s::::
6
CT=9
'AS168
en ......
(6)
V6
(14)
(5)
'"
G5 CT=O
(4)
(decade) typical performance
'S168
LJG4
logic symbol t
4-BIT UP/DOWN SYNCHRO-
'ALS168
1 2 3
SN74167 (J,N)
168
TYPE
[~]
5[fJ
ClK (9)_
pin assignments
1 2 3 4 5 6 7 8
ufD ClK A B C 0 ENP GNO
9 10 11 12 13 14 15 16
mAD tNT 00 Oc OB OA RCO VCC
1 2 3 4 5 6 7 8 9 10
nc UfO ClK A B nc C 0 ENP 'GNO
11 12 13 14 15 16 17 18 19 20
nc lOAD ENT 00 Oc nc OB OA
ReO VCC
(14) I---QA
~QB ~Qc ~QD
t Pin numbers shown on logic symbols are for J and N packages only.
nc - no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
892
©
Ie MASTER 1983
PRODUCT GUIDE pin assignments
logic symbol t
170 4-BY-4 REGISTER FILES typical performance TYPE T·YPE
OF
'LS170
RAM 4x4
(14)
WA~ O} 1A Q
ADDRESS
POWER
TIME
PER BIT
WBw-
30 ns
40mW
RB-
1
GW!.!3.!...c::..
C4 [WRITE)
OUTPUT '170
O·C O·C
27 ns
1
3
RA~ O}2A
7.8mW
G
SN74170 (J,N) SN74LS170 (J,N,FN)
SN54170 (J,FH) SN54LS170 (J,FH)
R
[READ)
1A,4D
-11L
CLR
• Double-Rail Outputs
CLK
• Buffered Clock and Clear Inputs 10
• Individual Data Inputs to Each Flip-Flop typical performance
'LS 171
r 2AQ~ 01 ~02
FREQ 30 MHz
POWER PER F-F 17.5 mW
DELAY TIMES SETUP 20 nsf
2D
30
I Rising edge of clock pulse 40 SN54LS171 (J,FH)
.hCl
(14)
r;
10
(15)
........
.......
(2) (6)
(5)
r--...
(7) (10)
(11 )
r--...
SN74LS171 (J,N,FN)
(1 ) (3)
(4)
HOLD 5 nsf
nc
02 03 04 RB nc
RA 04 03 GNO
11 12 13 14 15 16 17 18 19 20
nc
02 01 GR Gw nc
WB WA 01
Vee
-
(13),.........1 R (12)
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
pin assignments
logic symbol t
QUAD D-TYPE FLIP-FLOPS WITH CLEAR
J. N PACKAGES 02 9 02 03 10 01 04 11 GR 12 Gw RB 13 WB RA 04 14 WA 15 01 03 GNO 16 Vee
~03 ~04
D3~ D4~
171
Q 3
.!...!..!.L..t: I-tEN
D1~ 02
TYPE
1 2 3 4 5 6 7 8
(9)
10 10 20 20 30 30 40 40
1 2 3 4 5 6 7 8
J. N PACKAGES 9 40 10 10 40 20 11 40 20 12 ClK 20 13 ClR 3D 14 10 30 15 10 30 GNO 16 Vce
FH. FN PACKAGES
1 2 3 4 5 6 7 8
9 10
nc
10 20 20 20 nc
3D 30 30 GNO
11 12 13 14 15 16 17 18 19 20
nc
40 40 40 ClK nc
ClR 10
10 VCC
For chip carrier information. contact the factory.
en C
Q)
E
:J :I...
en c en
ctS X
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
©
Ie MASTER 1983
893
PRODUCT GUIDE logic symbol t
172 16-BIT REGISTER FILES typical performance
ORG
OF
ADDRESS
POWER
1W2
TIME
PER BIT
1RO
33 ns
35mW
OUTPUT '172
8X2
RAM 8x2
(2)
1W1
TYPE TYPE
1WO
pin assignments
:}
1 2 3 4 5 6
lA~
1R1
3-State
7
1R2
SN74172 (J,N)
8 9 10 11 12
1GW 1GR 2VV/RO 2W/R1
J, N PACKAGES lWl 13 20A lWO 14 lOA lGW 15 lGR lOB 16 2'GT{ 20B 17 2W/RO elK 18 2W/Rl lR2 19 2W/R2 lRl 20 2GW lRO 21 20A lOA 22 laB 23 lW2 20B GNO 24 Vee
2W/R2' 2GW 2GR CLOCK
C8 10A
lOA
20A
20A lOB 20B
10B
1A.4,80
20B
logic symbol. '173 t
173
pin assignments
CLR (15)
4-BIT D-TYPE REGISTERS
M (1)
(3-state outputs) typical performance TYPE
FREQ
ASYNC
TOTAL
CLEAR
POWER
'173
25 MHz
HIGH
250mW
'LS173A
50 MHz
HIGH
85mW
SN54173 (J,FH) SN54LS173A (J,FH)
10 20
SN74173 (J,N) SN74LS173A(J,N,FN)
30
1 2 3 4 5 6 7 8
J, N PACKAGES M 9 G1 N 10 G2 10 11 40 20 12 3D 30 13 20 40 14 10 elK 15 ClR GNO 16 VCC
FH. FN PACKAGES 11 nc 1 nc 12 G1 2 M 13 G2 3 N 14 40 4 10 5 20 15 3D 6 nc 16 nc 17 20 7 30 18 10 8 40 9 ClK 19 ClR 10 GNO 20 VCC
40
logic symbol, 'LS173At
en
+-"
CLR (15)
Q)
M 1)
c:
E
::s
'-
+-"
en
c:
en
as
10
X
~
20
30
40
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
894
© Ie MASTER 1983
PRODUCT GUIDE logic Iymbol t
174
ClR~R
HEX OoTYPE FLIP-FLOPS
ClK
(single-rail outputs, common
FREQ
POWER PER F-F
'174
35 MHz
38 mW
80 MHz
6.7 mW
175 MHz
38 mW
40 MHz
10.6 mW
20 nsf
5 nsl
110 MHz
75 mW
5 nsf
3 nsl
'LS 174 'S174
C1
~.
20~ 30~ DELAY TIMES 40~ SETUP HOLD .50~
'ALS174 'AS174
(9)
(3) 1 0 - 10
direct clear) typical performance TYPE
pin assignments
20 nsf
5 nsf
~10
--12L (7)
20
-30
~40 (12)
~
(14) 60-
50
1 2 3 4 5 6 7 8
J. N PACKAGES 9 eLK 10 10 40 11 40 10 12 50 20 13 50 20 14 60 30 15 60 30 GNO 16 Vee
rn
-60
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
CIA 10 10 20 nc
20 30 30
GNO
11 12 13 14 15 16 17 18 19 20
nc
eLK 40 40 50 nc
50 60 60
Vee
I Rising edge of clock pulse
SN54174 (J,FH) SN54ALS 174 (J,FH) SN54AS 174 (J,FH) SN54LS 174 (J,FH) SN54S 174 (J,FH)
SN74174 (J,N) SN74ALS174 (N,FN) SN74AS174 (N,FN) SN74LS 174 (J,N,FN) SN74S174 (J.N,FN) logic symbol t
175
ClR~R
QUAD OoTYPE FLIP-FLOPS (complementary outputs,
ClK (9)
common direct clear)
TYPE
FREQ
.
C;
10~
typical performance POWER PER F-F
pin assignments
DELAY TIMES SETUP
HOLD
20 nsl
5 nsl
'175
35 MHz
38 mW
'ALS175
80 MHz
7.5 mW
'AS175
11.5 MHz
41mW
'LS175
40 MHz
10.6 mW
20 nsl
5 nsl
'S175
110 MHz
75 mW
5 nsf
3 nsf
C1
10
20~ (12) 30(13) 40-
(2) -10
:::::-E!.
1Q
~20 ~26 ~30 ~3Q ~40 ~46
1 2 3 4 5 6 7 8
J. N PACKAGES CIA 9 eLK 10 10 30 11 30 '-0 10 12 30 20 13 40 14 40 20 15 40 20 GNO 16 VCC
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
CLR 10 10 10 nc
20 20 20
GNO
11 12 13 14 15 16 17 18 19 20
nc
CLK 30 30 30 nc
40 4Q 40
Vce
I Rising edge ·of clock pulse
SN54175 (J,FH) SN54ALS175 (J,FH I SN54AS175 (J,FH) SN54LS 175 (J,FH) SN54S 175 (J,FH)
SN74175 (J,N) SN74ALS175 (N,FN) SN74AS175 (N,FN) SN74LS175 (J,N,FN) SN74S175 (J,N,FN)
til ......
c:
Q)
E :::s :10-
...... til c: til
«S
>
< Q) I-
PRODUCT GUIDE 218
logic symbol t
AO~ A1~ A2~ A3~ A4~
MEMORIES WITH THREE-STATE OUTPUTS (32 words of 8 bits each)
typical performance TYPE 'ALS218
ADDRESS
ENABLE
POWER/
TIME
TIME
BIT
'30 ns
20 ns
0.9 mW
Sl~
S2~
J, N PACKAGES
JAf.
C}
R/W~ 1 EN
[WRITE] 1 C2 (READ]
SN74ALS218 (N,FNI
SN54ALS218 (J,FHI
pin assignments RAM 32 X 8
256-BIT RANDOM-ACCESS READ/WRITE
..r:
"l
DOO.~ V'3
A.2D
FH, FN PACKAGES
1
AO
11
nc
1
AO
11
nc
2
Al
12
000
2
Al
12
000
3
A2
13
001
3
A2
13
001
4
A3
14
002
4
A3
14
002
5
A4
15
003
5
A4
15
003
6
nc
16
004
6
nc
16
004
7
R/W
17
005
7
R/W
17
005
8
Sl
18
006
8
Sl
18
006
9
S2
19
007
9
S2
19
007
GND
20
VCC
10
GND
20
VCC
10
i
A,Z3
001~ 002~
003~~
004~ 005~~ 006~ 007~ logic symbol t
219
AO-.!.!l-
MEMORIES
A1~ A2~
(16 words of 4 bits each;
three-state non-inverting
A3~
output)
]A~
-~ G1
~ (3) R/W~ 1 EN [READ) 1 C2 [WRITE)
typical performance ADDRESS
'LS219A
TIME
..,
ENABLE POWERI TIME
50 n5
SN54LS219A (J,FHI
35 n5
BIT 2.7 mW
SN74LS219A (J,N,FNI
D1~ A,2D D2~ D3~ ( 12)
logic symbol t
221 en
C
1A
:::J
OUTPUT
en
TYPE
c
PULSE RANGE
en
as x Q) I-
1B
typical performance
~
2
FH, FN PACKAGES
9
03
1
nc
11
nc
S
10
03
2
AO
12
03
3
R/W
11
04
3
S
13
03
4
01
12
04
4
R/W
14
04
5
01
13
A3
5
01
15
04
6
02
14
A2
6
nc
16
nc
7
02
15
Al
7
01
17
A3
8
GND
16
VCC
8
02
18
A2
9
Q2
19
Al
GND
20
VCC
I
pin assignments FH, FN PACKAGES
J,N PACKAGES
, MUL TIVIBRATORS
+-'
AO
10
DUAL MONOST ABLE
Q)
E
1
r AV~01 ~02 ~03 (11 ) r - - 04
D4~
+-'
J, N PACKAGES
RAM 16 X 4
64-BIT RANDOM-ACCESS
TYPE
pin assignments
TOTAL POWER
SN54221
20n5-215
130 mW
SN74221
20 ns - 285
130 mW
SN54LS221
20 n5 - 495
23 mW
SN74LS221
20 n5 - 705
23mW
SN74221 (J,NI SN54221 (J,FHI SN54LS221 (J,FHI SN74LS221 (J,N,FNI
1ClR
(1 )
U'L
&
--"""-
(2)
(3) (14)
1Cext 1Rex t l (15) Cext 2A (9)
>
r.::: ~ ....
(4) 10
RX/CX
--'o.L
"' .......
...
-
R
lA
9
2A
1
nc
11
2
lB
10
2B
2
lA
12
2A
3
lClR
11
2ClR
3
lB
13
2B
4
10
12
20
4
lClR
14
2ClR
5
20
13
10
5
10
15
20
6
2C ext
14
lC ext
6
nc
16
nc
7
2R ext l Cext
15
GND
16
1~
&
--""0.
(11).r.::::::
2Cex t (6) 2R ext l (7) Cext
~
CX
".... "
8
>
28 (10)
2CLR
(13) 10
1
.
1 Rextl
7
20
17
10
8
2C ext
18
lC ext
9
2R ext l Cext
19
GND
20
Cext VCC
(5) 20 ~
(12)
lei
nc
10
1 Rext! Cext VCC
I
CX
RX/CX
:
I j t Pin numbers shown on logic symbols are for J and N packages only.
nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
906
©
Ie MASTER 1983
PRODUCT GUIDE
222
logic symbol t
64-BIT FIFO MEMORIES
pin assignments FIF016X4
16 4-BIT WORDS
J, N PACKAGES
eTR
(input-ready enable, outputready enable, and three-state output) typical performance TYPE 'LS222
DELAY TIME
TOTAL
FROM CLOCK
POWER
47 ns
433mW
SN54LS222 (J)
4,5
1 2 3 4 5 6 7 8 9 (17) OR 10
11 12 IR 13 LOCK 14 DO 15 nc 16 01 17 02 18 03 19 GNO 20 DE
CLR
IRE
03 02 01 nc 00 OR ORE UNCK VCC
SN74LS222 (J,N) For chip carrier information, contact the factory.
DO
00
01
01
02 (8)
02
(9)
03
03
logic symbol t
224
pin assignments
64-BIT FIFO MEMORIES
FIF016X4
16 4-BIT WORDS OE _(_1)--tEN5
. (three-state output) typical performance TYPE 'LS224
DELAY TIME
~_(_9)_at (2)
TOTAL
FROM CLOCK
POWER
47 ns
433mW
SN54LS224 (J)
J, N PACKAGES
CTR
IR (3)
LOCK...;....;......!.......
.....
----~
SN74LS224 (J,N)
CT>O (15)
UNCK~...;....--I
1 2 3 4 5 6 7 8
OE
~
IR
03 02 01 00
9 10 LOCK 11 DO 12 01 13 14 02 15 03 GNO 16
OR UNCK VCC
& Z3
CT=O
en ......
c:
For chip carrier· information, contact the factory.
&
Q)
E
:J ~
...... DO (4)
10
en
(13) 00
01 (5)
(12) 01
02-(;....6)~~ 03 (7) ~-----------1
(11) 02
c: en
CU
X
Q)
f-
t Pin numbers shown on logic symbols are for J and N packages only.
nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
©
Ie MASTER 1983
907
PRODUCT GUIDE pin assignments
225
logic symbol t
SO-BIT FIFO MEMORIES 16 5-BIT WORDS
OE~
typical performance OUTPUT 3-State
J. N PACKAGES
FIFO 16 X 5
DELAY TIME
TOTAL
FROM CLOCK
POWER
50 ns
400mW
CLA-~
CTA
ENS CT=O
\3)
3~UNCK
CT+
OUT
~
\1) CLKA-
SN74S225 (J,N,FN) Cl
t> \19) CLKB_
1
ClK A
11
04
2
IR
12
03
3
UNCKOUT
13
02
4
DO
14
01
5
01
15
00
6
02
16
UNCK IN
7
03
17
OR
8
04
18
CLR
9
N
19
ClK B
GNO
20
VCC
10
c) G2/Z3 FN PACKAGES
\2) 2 CT< 16 - I A
1
ClK A
11
04
2
IR
12
03
3
UNCK OUT
13
02
4
DO
14
01
c T > o F t>\16) UNCKIN
\17)
4-0R
Z4
r
I
(15) 5 ' 7 - 00 \14)
(4) 00-10 (5) 01(6) 02-
~02
S1 (2)
BUS TRANSCEIVERS
S2 (14)
(three-state outputs) typical performance
~ TYPE
'S226
1
GBA (1)
r--.....
C4
""'-
C5
MAX
OCAB (9)
EN6
MAX SOURCE
SINK
OCBA (7)
EN7
CURRENT
CURRENT
-6.5 mA
20 mA
1...
3
r
(2/3)4D
\77
(0/1/2) D
(0/1/2) D
6 \7
(0/3)5D
A2 (4) U) +-'
A3 (5)
Q)
A4 (6)
C
E
03
17
OR
04
18
ClR
OE
19
ClK B
GNO
20
VCC
J. N PACKAGES
....,
A1 (3)
SN54S226 (J,FH) SN74S226 (J,N,FN)
00 UNCK )N
pin assignments
O}MJl
GAB (15)
7 8 10
~ 04
(8)
04-
4-BIT PARALLEL LATCHED
15 16
9
(12) -03
\7)
logic symbol t
01 02
,~01
03-
226
5 6
1
nc
11
nc
10
B4
2
GBA
12
OCAB
A1
11
B3
3
S1
13
B4
A2
12
B2
4
A1
14
B3
GBA
2
S1
3 4
9
5
A3
13
B1
5
A2
15
B2
6
A4
14
S2
6
nc
16
nc
7
OCBA 15
GAB
7
A3
17
B1
8
GNO
VCC
8
A4
18
S2
9
OCBA 19
GAB
20
VCC
16
10
GNO
(13) B1
~l .... ....
.-
FH. FN PACKAGES
OCAB
1
_ (12) B2 (11 )
B3
- (10) B4
~
L.
+-'
U)
C U)
as >
O
(17) OR
8 9 10
OE
Wf
IRE
03 02 01
11 12 IR 13 LOCK 14 DO 15 nc 16 01 17 02 18 03 19 GND 20
nc
00 OR ORE
UNCK VCC
(19)
UNCK (18)
'LS227
SN54LS227 (J)
ORE
G5
SN74LS227 (J,Nl DO
00
01
01
02
02
03
03
228
logic symbol t
For chip carrier information, contact the factory.
pin assignments J, N PACKAGES
54-BIT FIFO MEMORIES FIFO 16 X 4
15 4-BIT WORDS
CTR
(open-collector outputs) typical performance
OE-(_1_)-
ern
.... EN5
(9)
CT=O (2)
DELAY TYPE
IR
TIME
TOTAL
FROM
POWER
1 2 3 4 5 6 7
LOCK-(~3.;..)...,&,.;::111
8
OE
CiJf
IR
03 02 01 00
9 10 LOCK 11 12 DO 13 01 02 14 03 15 GNO 16
OR
UNCK VCC
CLOCK 'LS228
57.5 ns
SN54LS228 (J)
433mW
CT>O
(15) UNCK----I
SN74LS228 (J,N)
DO (4)
For chip carrier information, contact the factory.
10
UJ ..... c:
01 (5)
Q)
(6)
02-';""--1 03 (7)
E
1------------1
::::s
.....UJ ~
c:
UJ Cd X
Q)
J-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
909
PRODUCT GUIDE 230,231
logic symbol, 'AS230 t
OCTAL BUFFERS AND LINE DRIVERS
10 (11
(three-state outputs)
• •
-
MAX
MAX
SOURCE
SINK
20 (191
CURRENT
CURRENT
2Al.!!!!..(131 2A22A3 (151
-15 mA
64 mA
2A4-
~lY3
~lY4 EN
\l~2Yl ~2Y2
C>
~2Y3 ~2Y4
(171
SN74AS230 (N,FN) SN74AS231 (N.FN)
SN54AS230 (J.FH) SN54AS231 (J.FH)
lYl
~lY2
lA4~
typical performance
3.5 ns
\l~ (161
C>
lA2(61 lA3(81
'AS231 has complementary G and G inputs
·DELAY
J. N PACKAGES
EN
lAl~ (41
'AS230 has true and complementary outputs
pin assignments 1
1~
11
2
1A1
12
1Y4
3 4
2Y4
13
2A2
1A2
14
1Y3
5
2Y3
15
2A3
6
1A3
16
1Y2
7
2Y2
17
2A4
8
1A4
18
1Y1
9
2Y1
19
2G
10
GND
20
Vee
2A1
logic symbol, 'AS231 t FH. FN PACKAGES 1(; (11
EN
(21 lAl-
\l~lYl
C>
lA2~
~1Y2 ~lY3 ~lY4
(61 lA3-
lA4~ 2G
(191
EN
(111
2Al~
\l~
C>
(131 2A2-
2Yl
~2Y2 ~2Y3 ~2Y4
2A3~ 2A4~
1
1(j
11
2
1A1
12
1Y4
3
2Y4
13
2A2
4
1A2
14 . 1Y3
5
2Y3
15
6
1A3
16
1Y2
7
2Y2
17
2A4
2A1
2A3
8
lA4
18
1Yl
9
2Y1
19
2G
10
GND
20
Vee
"2G on 'AS231
240
logic symbolt
OCT AL BUFFERS/LINE
_
typical performance
TYPE
DELAY
MAX
MAX
POWER
SOURCE
SINK
DISSIPATlaN
CURRENT
CURRENT
SN54ALS240
5.5 ns
-12 mA
12 mA
SN74ALS240
5.5 ns
-15 mA
24 mA
SN74ALS240-1
5.5 ns
-15 mA
48 mA
SN54AS240
3.5 ns
-12 mA
48 mA
SN74AS240
3.5 ns
-15 mA
64 mA
..... en
SN54LS240
10 ns
-12 mA
12 mA
c:
SN74LS240
10 ns
-15 mA
24 mA
en
SN54S240
5 ns
-12 mA
48 mA
x
SN74S240
5 ns
-15 mA
64 mA
en ..... c: Q)
E
:J
L.
ttS
Q)
.....
SN54ALS240 (J.FH) SN54AS240 (J,FH) SN54LS240 (J,FH) SN54S240 (J.FH)
EN
(2) lAl-
(inverted three-state outputs)
52 mW
J. N PACKAGES
(1)
lG
DRIVERS/LINE RECEIVERS
pin assignments
[>
lA2~ lA3~ lA4~ 2(; (19)
2Al~
2A2~ 2A3~ 2A4~
\J~lYl
~lY2 ~ 1Y3 ~1Y4
EN
C>
\J~
p:-.iZ.L
2Yl 2Y 2
~2Y3 ~2Y4
1
1~
11
2
1Al
12
lY4
3
2Y4
13
2A2
4
lA2
14
1Y3
5
2Y3
15
2A3
6
1A3
16
lY2
7
2Y2
17
2A4
2A1
8
lA4
18
1Yl
9
2Yl
19
2G
10
GND
20
Vee
235 mW FH, FN PACKAGES
120 mW 467 mW
SN74ALS240 (N,FN) SN74ALS240-1 (N,FN) SN74AS240 (N,FN) SN74LS240 (J,N,FN) SN74S240 (J,N,FN)
1
1(j
11
2
1A1
12
1Y4
3
2Y4
13
2A2
4
lA2
14
1Y3
5
2Y3
15
2A3
6
1A3
16
1Y2
7
2Y2
17
2A4
2A1
8
1A4
18
1Y1
9
2Yl
19
2G
10
GND
20
Vee
t Pin numbers shown on logic symbols are for; and N packages only,
nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
910
© IC MASTER 1983
PRODUCT GUIDE 241
logic symbolt
pin assignments
OCTAL BUFFERS/LINE
J. N PACKAGES
DRIVERS/LINE RECEIVERS
(non-inverted three-state outputs) typical performance MAX TYPE
DELAY
MAX
SOURCE
SINK
01551-
CURRENT
CURRENT
PATION
SN54ALS241
7 ns
-12 rnA
12 rnA
SN74ALS241
7 ns
-15 rnA
24 rnA
SN74ALS241-1
7 ns
-15 rnA
48 rnA
SN54AS241
4 ns
-12 rnA
48 rnA 64 rnA
SN74AS241
4 ns
-15 rnA
SN54LS241
10 ns
-12 rnA
12 rnA
SN74LS241
10 ns
-15 rnA
24 rnA
5 ns
-12 rnA
48 rnA
5 ns
-15 rnA
64 rnA
SN54S241 SN74S241 SN54ALS241 (J,FH)
POWER
68 rnW
lA4 2G 2Al (13) 2A2 115) 2A3 (17) 2A4
127 rnW 558 rnW
242
(9)
2Yl (7) 2Y2 (5) 2Y3 (3) 2Y4
1 2 3 4 5 6 7 8 9 10
logic symbolt
11 12 13 14 15 16 17 18 19 20
2A1 1Y4 2A'2 1Y3 2A3 1Y2 2A4 1Y1 2G
Vee
pin assignments
QUADRUPLE BUS
J. N PACKAGES
TRANSCEIVERS
(inverted three-state outputs) typical performance
TYPE
11; 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Yl GND
FH. FN PACKAGES 1 1rr 11 2A1 2 1A1 12 1Y4 3 2Y4 13 2A2 4 1A2 14 1Y3 5 2Y3 15 2A3 6 1A3 16 1Y2 7 2Y2 17 2A4 ·8 1A4 18 1Y1 9 2Y1 19 2G 10 GND 20 Vee
SN74ALS241 (N,FN) SN74ALS241-1 (N,FN) SN74AS241 (N,FN) SN74LS241 (J,N,FN) SN74S241 (J,N,FN)
SN54AS241 (J,FH) SN54LS241 (J,FH) SN54S241 (J,FH)
(18) 1Yl (16) lY2 (14) lY3 (12) lY4
DELAY
MAX
MAX
POWER
SOURCE
SINK
01551PATION
CURRENT
CURRENT
6 ns
-12 rnA
12 rnA
SN74ALS242
6 ns
-15 rnA
24 rnA
SN74ALS242-1
6 ns
-15 rnA
48 rnA
SN54AS242
3.5 ns
-12 rnA
48 rnA
SN74AS242
3.5 ns
-15 rnA
64 rnA
SN54LS242
11 ns
-12 rnA
12 rnA
SN54ALS242
SN74LS242
11 ns
SN54ALS242 (J,FH) SN54AS242 (J,FH) SN54LS242 (J,FH)
-15 rnA
24 rnA
68 rnW
133 rnW
SN74ALS242 (N,FN) SN74ALS242-1 (N,FN) SN74AS242 (N,FN) SN74LS242 (J,N,FN)
1 2 3 4 5 6 7
GAB nc
A1 A2 A3 A4 GND
8 9 10 11 12 13 14
B4 B3 B2 B1 nc
GBA
. Vee
FH. FN PACKAGES 1 nc 11 nc 2 GAB 12 B4 3 nc 13 B3 4 A1 14 B2 5 nc 15 nc 6 A2 16 B1 7 nc 17 nc 18 nc 8 A3 19 GBA 9 A4 10 GND 20 Vee
UJ ..... C (])
E
:l
..... UJ :I....
C UJ
ctS
X
{E.
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFiCe BOX 225012 .' DALLAS. TeXAS 75265
© Ie MASTER 1983
911
PRODUCT GUIDE 243
logic symbolt
pin assignments
QUADRUPLE BUS
J. N PACKAGES
TRANSCEIVERS
GBA
(non-inverted three-state outputs)
GAB
typical performance
TYPE
DELAY
MAX
MAX
POWER
SOURCE
SINK
DISSI-
CURRENT
CURRENT
PATION
SN54ALS243
8 ns
-12 mA
12 mA
SN74ALS243
8 ns
-15 rnA
24 rnA
SN74ALS243-1
8 ns
-15 mA
48 mA
SN54AS243
4.5 ns
-12 rnA
48 mA
SN74AS243
4.5 ns
-15 rnA
64 rnA
SN54LS243
12 ns
-12 rnA
12 mA
SN74LS243
12 ns
-15 rnA
24 rnA
SN54ALS243 (J,FH)
93 mW
A1
B1
A2
B2
A3
B3
A4
B4
138 mW
SN74ALS243 (N,FN) SN74ALS243-1 (N,FN) SN74AS243 (N,FN) SN74LS243 (J,N,FN)
SN54AS243 (J,FH) SN54LS243 (J,FH)
244
1 2 3 4 5 6 7
1G
. (non-inverted three-state outputs) typical performance
.....Cen
DELAY
MAX
MAX
POWER
SOURCE
SINK
DISSI-
CURRENT
CURRENT
PATION
SN54ALS244
7 ns
-12 mA
12 rnA
SN74ALS244
7 ns
-15 rnA
24 rnA
68 mW
2A1 2A2 2A3
SN74AS244
4.5 ns
-15 rnA
64 rnA 12 mA
-15 mA
24 mA
E ..... en
SN54S244
6 ns
-12 rnA
48 rnA
SN74S244
6 ns
-15 mA
64 rnA
Q)
2G
48 mA
-12 mA
I-
1Y4
48 rnA
12 ns
X
1Y3
1A4
-12 mA
12 ns
CCS
1Y2
1A3
-15 rnA
SN54LS244
c en
1Y1
7 ns
SN74LS244
~
1A1 1A2
4.5 ns
Q)
:J
SN54ALS244 (J,FH) SN54AS244 (J,FH) SN54LS244 (J,FH) SN54S244 (J,FH)
Vee
J. N PACKAGES
DRIVERS/LINE RECEIVERS
SN54AS244
84 83 B2 B1 nc GBA
pin assignments
logic symbolt
SN74ALS244-1
8 9 10 11 12 13 14
FH. FN PACKAGES 11 nc 1 nc 2 GAB 12 B4 13 B3 3 nc 4 A1 14 B2 15 nc 5 nc 16 B1 6 A2 7 nc 17 nc 18 nc 8 A3 19 GBA 9 A4 10 GND 20 Vee
OCTAL BUFFERS/LINE
TYPE
GAB nc A1 A2 A3 A4 GND
235 rnW
2A4
(13)
2Y1
"V (5)
( 17)
(3)
558 rnW
SN74ALS244 (N,FN) SNALS244-1 (N,FN) SN74AS244 (N,FN) SN74LS244 (J,N,FN) SN74S244 (J,N,FN)
1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
11 12 13 14 15 16 17 18 19 20
2A1 1Y4 2A2 1Y3 2A3 1Y2 2A4 1Y1 2 [til ~[n=O)
-~[n
B.l!L-
SN54LS292 (J,FH)
00
(5) 0 ----, B (4)
DIV5 { CKB (11) r-.
I
8 9 10 11 12 13 14
3CT=1
SN74290 (J,N) SN74LS290 (J,N,FN)
f max TYPE POWER 'LS292 200 mWI 50 MHz
R9(1) nc R9(2) Oc OB nc GND
DIV2
CKA (10),....
FH. FN PACKAGES 11 nc 1 nc 2 R911 ) 12 00 °A CKA 13 OA 3 nc CKB 4 R9(2) 14 CKA ROIl) 5 nc 15 nc RO(2) 6 Oc 16 CKB 17 nc 7 nc VCC 18 ROIl) 8 °B 19 RO(2) 9 nc 10 GND 20 VCC
J. N PACKAGES
1 2 3 4 5 6 7
CT=O
R9(2)~
TOTAL
32 MHz
SN54290 (J,FH) SN54LS290 (J,FH)
pin assignments CTR
&
RO(1)~ RO(2)~ R9(1)~
by-five)
FH, FN PACKAGES 11 nc 1 nc 12 03 2 AO 13 03 3 S 4 R/W 14 04 15 04 5 01 16 nc 6 nc 17 A3 7 0'1 18 A2 8 02 19 Al 9 02 10 GNO 20 VCC
~04
SN74LS289A (J,N,FN) D4.J..!3.L. SN74S289A (J,N,FN)
290
Rrw 01 Ql 02 02 GNO
Q3 03 04 04 A3 A2 Al VCC
~Q2 ~Q3
D3.J..!!!L.
SN54LS289A (J.FH) SN54S289A (J,FH)
~
9 10 11 12 13 14 15 16
A~~Q1
A.2D
D2-12L
5.9mW
AO
[TP2)
= 1]
[TP3]
~TP1 ~TP2 ~TP3
io--
:}lnl ~,
1 2 3 4 5 6 7 8
B
9 E 10 TPl 11 ClKl 12 ClK2 13 TP2 14 15 0 GNO 16
nc A n~
nc TP3 0 C VCC
FH. FN PACKAGES 11 nc 1 nc 12 nc 2 B 13 A 3 E 14 4 TPl 5 CL.K1 15 nc 16 nc 6 nc 7 ClK2 17 TP3 8 TP2 18 0 19 C 9 0 10 GND 20 VCC
m
~o=~ ~O
t Pin numbers shown on logic symbols are for J and N packages only.
nc '- no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
924
© Ie MASTER 1983
PRODUCT GUIDE
293
logic symbol t
pin assignmonts &
4-BIT BINARY COUNTERS
RO(1) (12)
(divide-by-two and divide-
CT=O
RO(2) (13)
by-eight) typical performance TYPE '293
COUNT FREO
CLEAR
TOTAL POWER
32 MHz
HIGH
160 mW
'LS293 32 MHz
HIGH
39mW
SN54293 (J,FH) SN54LS293 (J,FH)
DiVa
+
CT
f
OA_
(digitally programmable from 22 to 2 15 )
1
nc
11
2
nc
9
2
nc
12
aD
3
nc
TO
-OA CKA
3
nc
13
OA
4
Oc
11
CKB
4
nc
14
CKA
5
OB
12
RO(11
5
nc
15
nc
6
nc
13
RO(21
6
Oc
16
CKB
7
GND
14
VCC
7
nc
17
nc
8
OB
18
RO(1 I
9
nc
19
RO(21
GND
20
VCC
10
nc
OD
J. N PACKAGES
[tn] ClK1
typical performance
ClK2
[TP)
[fil
SN74LS294 (J,N,FNI
295
r LO
filJ
= 2
n
(3)
TP
4-BIT BIDIRECTIONAL REGISTERS
2 3
nc
nc
11
nc
A TP
10
nc
B
12
nc
11
CLR
3
A
13
nc
4
CLK1
12
nc
4
TP
14
CLR
5
CLK2
13
nc
5
CLK1
15
nc
6
nc
14
D
6
nc
16
7
a
15
C
7
CLK2
17
8
GND
16
VCC
8
nc
18
D
9
a GND
19
C
20
VCC
pin assignments J. N PACKAGES
INPUT
FH. FN PACKAGES
(8)
1
SER
8
oe
1
nc
11
nc
lD/SH
(6)
2
A
9
eLK
2
SER
12
oe
SER
DATA
nc
o
ClK--.....~D
SERIAL
FH. FN PACKAGES
9
OC
typical performance
SN54LS295B (J,FHI
B
SRG4
UNIVERSAL SHIFT
0
1
10
(7)
logic symbol t
'LS295B 30 MHz
aD
pin assignments
DIVIDERS/DIGITAL TIMERS
FREO
8
Oc
logic symbol t
SHIFT
nc
OB
2
PROGRAMMABLEFREOUENCY
TYPE-
1
SN74293 (J,N) SN74LS293 (J,N,FN)
294
SN54LS294 (J.FH)
FH. FN PACKAGES
J. N PACKAGES
CTR
A
TOTAL
8
POWER
C
D
70mW
3
B
10
aD
3
A
13
eLK
4
e
11
Oe
4
B
14
°D
5
D
12
OB
5
nc
15
nc
6
LD/SH 13
OA
6
e
16
Oe
7
GND
Vee
7
nc
17
nc
8
D
18
OB
14
08
9
Oc OD
10'
LD/SH 19
OA
GND
Vee
20
UJ
C
(])
E
:::J
~
UJ C
SN74LS295B (J,N,FNI
UJ
CO X
(])
J-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS' INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
925
PRODUCT GUIDE
297
pin assignments J. N PACKAGES
DIGITAL PHASE-LOCKEDLOOP FILTERS
,1' B
9
2
A
10
FH. J:N PACKAGES
+A1
1
nc
11
nc
2
B
12
+A1
(cascadable for higher-
3
ENCTR
11
+B XOPRD
3
A
13
order loops)
4
K ClK
12
ECPD
4
ENCTR
14
+B XOPRD
5
110 ClK
13
K ClK
15
ECPD
6
DIU
14
+A2 D.
5
typical performance
6
nc
16
nc
7
lID OUT
15
C
7
110 ClK
17
+A2
8
GND
16
VCC
8
DIU
18
0
9
110 OUT
19
C
GND
20
VCC
simplified block diagram t DELAY
f max
(FROM I/DCLK I/DCLK) 'LS297 375 mW 50 MHz 35 MHz 18.5 ns TYPE POWER
~ A 0
C
B
14) 15) (1)
SN54LS297 (J,FH)
(2)
SN74LS297 (J,N,FN) K·COUNTER CLOCK DOWNIUP CONTROL K·COUNTER ENABLE
110 CLOCK
PHASE Al
PHASE B PHASE A2
(4) (6)
MODUlO·K COUNTER
(3)
'l
(5)
(9)
Lf~
(13)
ClK (111 ......
typical performance POWER DELAY·
'LS298
65mW
20 ns
(12)
EDGE·CONTROLLED PHASE DETECTOR OUTPUT
pin assignments J. N PACKAGES
G1
,
C2
~QA
B1..1&-
~QB
B2..l!L.-
* From clock to non-inverted output· SN74298 (J,N) SN74LS298 (J,N,FN)
r
A1....ill- I 1,20 A2~ 1,20
C1...iID-
SN54298 (J,FH) SN54LS298 (J,FH)
EXClUSIVE·OR PHASE DETECTOR OUTPUT
MUX
wsillL
WITH STORAGE
20 ns
(11) (10)
QUAD 2-INPUT MULTIPLEXERS
195mW
110 OUTPUT
\
logic symbol t
'298
(7)
INCR EMENT IDECR EM ENT CIRCUIT
298
TYPE
10
MODULO CONTROLS
KCLK
C2~ 01~
02~
~QC
FH. FN PACKAGES
1
B2
9
C1
1
nc
11
2
A2
10
WS
2
B2
12
C1
3
A1
11
ClK
3
A2
13
WS
4
Bl
12
aD
4
Al
14
ClK
5
C2
13
ac
5
B1
15
aD
6
02
14
aB
6
nc
16
nc
7
01
15
aA
7
C2
17
aC
8
GND
16
VCC
8
02
18
aB
9
01
19
aA
GND
20
VCC
10
nc
~QO
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFiCe BOX 225012 • DALLAS, TeXAS 75265
926
@
Ie MASTER 1983
PRODUCT GUIDE
299
logic Iymbo. t
pin assignments J, N PACKAGES
8·BIT BIDIRECTIONAL
SRG8
1 2 3 4 5 6 7 8 9 10
UNIVERSAL SHIFT/STORAGE REGISTERS (three-state outputs) typical performance SHIFT
TYPE
FREQ
SERIAL DATA INPUT
ASYNC
TOTAL
CLEAR
POWER
'ALS299
30 MHz
0
LOW
100 mW
'LS299
35 MHz
0
LOW
175 mW
'S299
50 MHz
0
LOW
750 mW
SN54ALS299 (J,FHI SN54LS299 (J,FHI SN54S299 (J,FHI
5 6 7 8 9 10
logic symbol t
A1
;3
A2
collector output)
o
A3
A 255
A4
typical performance
A5
TYPE '5301
ADDRESS ENABLE POWER/ TIME
BIT
A7
42 ns
13 ns
1.9 mW
51
4 5 6 7 8
A6
TIME
5N745301 (J,NI
G/OG
1,\ E/OE 15 C/OC 16 A/OA 17 18 °A' 19 GND 20
m
5A ClK BlOB D/OD F/OF H/OH °H'
5l 51 VCC
52
11 12 (;2 13 G/OG 14 E/OE 15 C/OC 16 A/OA 17 18 OA 19 GND 20 50
~1
ern
5A ClK BlOB DiaD F/OF H/OH °H'
Sl S1 VCC
J, N PACKAGES
1 2
AO
(256 '·bit words, open·
~2
11 12 13
pin assignments RAM 256 X 1
256·B.T RANDOM·ACCESS MEMORIES
~1
FH, FN PACKAGES
1 2 3 4
SN74ALS299 (N,FNI SN74LS299 (J,N,FNI SN74S299 (J,N,FNI
301
50
AO Al S1 S2 53
Q A3
GND
9
10 11 12 13 14 15 16
A4 A5 A6 A'W
D A7 A2 Vee
G1
t Pin numbers shown on logic symbols are for J and N packages only,
nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
927
PRODUCT GUIDE 317
logic Iymbol t
pin assignments RAM 64 X 4
256-BIT RANDOM-ACCESS
]A~
MEMORIES WITH OPEN-COLLECTOR OUTPUtS (64 words of 4 bits each)
1 2 3 4 5 6 7 8 9 10
typical performance
TYPE 'ALS317
ADDRESS ENABLE
POWER I
TIME
TIME
BIT
30 ns
20 ns
0.9 mW
SN54ALS317 (J,FH)
Gl
SN74ALS317 (N,FN)
J. N PACKAGES FH. FN PACKAGES AD 11 nc 1 AD 11 nc A1 12 00 2 A1 12 00 A2 13 DO 3 A2 13 DO A3 14 01 14 01 4 A3 A4 15 01 15 01 5 A4 A5 16 02 16 02 6 A5 R/W 17 02 7 R/W 17 02 51 18 03 8 51 18 03 S2 19 03 19 03 9 52 GND 20 Vee' 10 GND 20 Vee
(121 00 (141 01 (161 02 (181 03
318
logic symbol t
256-BIT RANDOM-ACCESS
RAM 32 X 8
OUTPUTS (32 words of 8 bits each) typical performance
'ALS318
ADDRESS ENABLE
POWERI
TIME
TIME
BIT
30 ns
20 ns
0.9 mW
SN54ALS318 (J,FHI
,
AO (1) Al (2) A2 (3) A3 (4) A4 (5)
MEMORIES WITH OPEN-COLLECTOR
TYPE
pin assignments
2 3 4 5 6 7 8 9 10
Gl
SN74ALS318 (N,FNI
FH. FN PACKAGES
J. N PACKAGES
A.o A' A2 A3 A4 nc
RW
51 52 GND
"'2 ,3 14 15 16 17 18 19 20
,
nc
2 3 4 5 6 7 8 9 10
000 DO' 002 003 D04 005 006 D07
Vee
AO A' A2 A3 A4 nc
RW
51 S2 GND
"'2 13 14 15 16 17 18 19 20
nc
000 DOl 002 D03 D04 005 D06 D07
Vee
A.Z3
en ....... c: Q)
E
:J
:r.... .......
en
c:
en
ell X
~
t Pin numbers shown on logic symbols are for J and N packages oni y .
nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
928
©
Ie MASTER 1983
PRODUCT GUIDE logic symbol t
319
AO~
MEMORIES (16-four bit words, open-
A2~
(13) A3-
collector outputs)
s~
typical performance
'LS319A
JA~
A1....l.12.L
ADDRESS TIME
TIME
BIT
50 ns
35 ns
2.7mW
D1~ D2~
SN74LS319A (J,N,FN)
320
G1
R I W t 1 EN [READ) 1 C2 [WRITE)
ENABLE POWER/
SN54LS319A (J,FH)
J, N PACKAGES
RAM 16 X 4
64-BIT RANDOM ACCESS
TYPE
pin assignments
.,
,.
-EL
typical performance TYPE
f max
POWER
'LS320
30 MHz
210mW
FFD~ SN54LS320 (J)
~F
~F
TANK TANK
C>
XTAL XTAL
~C1 10
~F' ~F' ~FFO
TANK1
~
TANK
TANK2
~
'LS321
30 MHz
235mW
SN54LS321 (J)
R/W
11 12
04
3
S
13
01
04
4
R/W
14
5
01
13
A3
5
01
15
6
02
14
A2
6
nc
16
nc 03 03 04 04 nc
7
02
15
A1
7
01
17
A3
8
GNO
16
Vee
8
02
18
A2
9
02
19
A1
GNO
20
Vee
3 4
10
02
1
TANK1
9
F'
2
TANK2
10
F'
3
GN01
11
Vee'
4
FFQ
12
F
5
FFD
13
6
nc
14
7
F
15
nc XTAL1 XTAL2
8
GN02
16
Vee
1
TANK1
9
F'
~F
2
TANK2
10
F'
3
GND1
11
VeC'
(10)
4
FFO
12
F
~F'
~F'
TANK
(14)
POWER
(7)
~F
C>
outputs)
FREQ
12
J, N PACKAGES
G
.n.n..
OSCILLATORS
TYPE
AO
pin assignments
CRYSTAL~ONTROLLED
typical performance
2
For chip carrier information, contact the factory.
logic symbol t
(with F/2 and F/4 count-down
03
J, N.PACKAGES
JL..fL
SN74LS320 (J,N)
321
11
10
pin assignments
CRYSTAL-CONTROLLED
~ TANK2~ XTAL1 ~ XTAL2~
nc
s
2
( 11) -04
G TANK1
1
~03
D3...J.1QL... (12) D4-
logic symbol t
OSCILLATORS
03
AO
AQ~01
A,2D
FH, FN PACKAGES
9
1
XTAL1 ~ XTAL (15)
XTAL2 ~ XTAL
SN74LS321 (J,N)
FFD~ ~
CTRDIV4
)-
CT~
~F/2 (6)
~F/4
>C1
5
FFD
13
F/2
6 7
F/4
14
XTAL1
F
15
XTAL2
8
GND2
16
Vee
For chip carrier information, contact the factory.
~FFO
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
©. Ie MASTER 1983
929
PRODUCT GUIDE
322
logic symbol t
a-BIT SHIFT REGISTERS WITH
CLR'~
(three-state outputs,
OE~ G Jlli::::.
multiplexed I/O)
SIP
SIGN EXTEND
CLK
SHIFT
SRGS R
1
2EN15
2
G3
3 4
[SHIFT] -~ 3M1 3M2 [PAR LOAD)
typical performance
TYPE
pin assignments
SERIAL
FREQ
'LS322A 35 MHz
DATA INPUT
ASYNC CLEAR
POWER
SE
175 mW
DS~ DO
SN54LS322A (J,FH)
,
J1&-.
C6/1
6 7
~
r
S
t>
9 10
G4 S,4,1,6D
LOW
0
(11 )
5
J, N PACKAGES "'H, FN PACKAGES 11 ClK 11 ClK 1 G G 12 Ow SI15 12 OH' 2 SIP 13 H/OH DO 13 H/OH 3 DO 4 A/OA 14 F/OF A/OA 14 F/OF 5 C/OC 15 0/0 0 C/OC 15 0/0 0 6 E/OE 16 S/OS E/OE 16 S/OS 7 G/OG 17 01 G/OG 17 01 18 SE OE 18 SE 8 OE 19 OS 19 OS ClR 9 ClR GNO 20 VCC 10 GNO 20 VCC
SN74LS322A (J,N,FN)
--ill.-
D1~ (4) A/OA~ BlOB
G5 4,5,1,6D 4,5,1,6D Z7
2,6D
~
\77,15
-j;
t>
2,6D \7S,15
C/Oc~ D/OD~
ZS'~
E/OE/~ F/OF
~
G/OG,~ H/QHI~
2,6D \714,15
CLFi~
a-BIT BIDIRECTIONAL
G,J!L...c::::..
SHIFT/STORAGE REGISTERS
G2.ill...b.
(three-state outputs)
so.i!L.-
en
'ALS323 'LS323
c:
Q)
E
::J
SHIFT FREQ
4R
~-
3EN13
DATA
CLK.!l.2) - ~C4/1"/2+-
POWER
SR-41L- 14D
INPUT 0
0
35 MHz
(7)
A/OA~3,4D
100mW ,
175 mW
(13)
SO
11
SR
Gl
12
ClK
2
Gl
12
ClK
3
G2
13
3
G2
13
BlOB
4
G/OG 14
S/OS 0/0 0
4
G/OG 14
0/0 0
15
15
F/OF
5
E/OE
F/OF
5
E/OE
6
C/OC 16
HIOH
6
C/OC 16
HIOH
7
A/OA 17 lS Oi-
7 8
A/OA 17 18 OA
°H' Sl
9
ern
19
S1
10
GNO
20
VCC
9
rot
19
OH' Sl S1
10
GNO
20
VCC
8
(S)
~OA'
1
Z5
\7 5,13
C>Z6 ...
(6) \7 6,13 C/Oc~
:ii::
~
c:
DOD (5 I E/OE
en
G/O
x Q)
G(16) H / O H t 3,4D
en
r---r:>
B/OB~ 3,4D
SN74ALS323 (N,FN) SN74LS323 (J,N,FN)
+oJ
"
l"
FH, FN PACKAGES
J, N PACKAGES SR 11 SO
2
1
.,
SERIAL
30 MHz
SN54ALS323 (J,FH) SN54LS323 (J,FH)
pin assignments SRGS
S1~ o1 }M!. 3
typical performance
+oJ
~ Ow
logic symbol t
323
TYPE
C> Z14·t-
'---
F/Q~Jl.:= (4
co
J-
C>
\712,13 SL ..!.l.!!L- 2,4D
Z12'
"""'--
~
(17)
0
~H'
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
930
© Ie MASTER 1983
PRODUCT GUIDE
347
-.. --
BCD~O~EVEN~EGMENT
DECODERS/DRIVERS
(~ ....
(open-collector outputs, low-voltage version of 'LS47) typical performance
TYPE
pin assignments
logic symbol t
RBI
OUTPUT
OFF~TATE
SINK
OUTPUT
CURRENT
VOLTAGE
POWER
I
~
......
(5)
12 mA
7V
35mW
SN74LS347
24 rnA
7V
35mW
~ &
o
5
C G21
0 A GND
7
(7)
CT=OL,a 20,21 Q
(2) (6)
8
.......
(12)
c 20,21Q .......
(11)
2
d 20,21Q t---..
(10)
4
e 20,21 Q t--...
(9)
8
f 20,21Q ~ 9 20,21Q ~
(15) (14)
1
nc
11
nc
2
B
12
e
d
3 4
e
13
[l
14
d c
5
BI/ABO
15
b
6
nc RBI
16
nc
17
a
0 A GND
18
9
7
9
logic symbol t
B-LlNE TO 3-LlNE ( 11)
typical performance
2 3 4
SN54LS348 (J,FH)
5
SN74LS348 (J,N,FN)
(12) (13) (1)
0/Z10
10
1/Z11
11
2/Z12
12
3/Z13
13
4/Z14
14
(2)
~1
18
(15) EO
Vee
2
5
10
3
6
11
0 1
4
7
12
2
5
E1
13
3
6
A2
14
GS
7
A1
15
EO
8
GND
16
Vee
15
(3)
FH. FN PACKAGES
6 7
f
20
J. N PACKAGES AO 4 9
[> 0
19
pin assignments HPRI BIN
(with three-state outputs)
Vee
c
10
(10)
f
16
FH. FN PACKAGES
9
PRIORITY ENCODERS
9
15
b
8
348
14
(13)
b 20,21 Q .....
1
B C
3 4 6
(1)
SN74LS347 (J,N, FN)
2
~1
....t::... V20 A
J. N PACKAGES B 9 e 10 d e IT 11 c BI/RBO 12 b RBI 13 a
1
(3)
I
SN54LS347
SN54LS347 (J,FH)
IT
BIN/7-SEG [> [T1)
(4)
7/Z17
17
V18 (5)
A1
nc
11
nc
2
4
12
AO 0
3
5
13
4
6
14
1
5
7
15
2
6
nc E1 A2 A1 GND
16
nc 3
7
G19
EI
1
8 9 10
17 18
GS
19
EO
20
Vee
en ...... c: Q)
E :::J L. ...... en c:
en
ctS X
{E.
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
FONT TABLE T1 - NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS USING 'LS347
101 o
11213HI51b1l1819IcbIUI~It:i I 2
3
..
5
8
7
8
9
10
11
12
13
14
16
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
© Ie MASTER 1983
931
PRODUCT GUIDE logic symbol t
351
pin assignments
DUAL 8-L1NE T,O 1-L1NE DATA
G
SELECTORS/MUL TIPLEXERS
1 2 3 4 5 6 7 8 9 10
A
(three-state outputs; four
B
common data inputs)
C
typical performance DELAY TIMES DATA
TYPE
TOINV OUTPUT
'351
FROM ENABLE
10 ns
17 ns
100
TOTAL
101
POWER
102 103 , 04
220mW
J. N PACKAGES 11 07 lY 12 06 tr A 13 05 14 04 B 15 203 C 100 16 202 101 17 201 102 18 200 103 19 2Y GNO 20 VCC
1Y
05 06
SN74351 (J,N)
07 200 201 202 203
16,6 17,7
352
logic symbol t
pin assignments
DUAL 4-L1NE TO 1-L1NE DATA SELECTORS/MUL TIPLEXERS
A
(inverting version of 'LS153)
B
typical performance
TYPE
f/)
C
Q)
E
:J
'ALS352 'AS352 'LS352
DELAY TIMES DATA FROM TOINV ENABLE OUTPUT 4.5 ns 6 ns 2.7 ns 4.5 ns 15 ns 18.5 ns
SN54ALS352 (J,FH) SN54AS352 (J,FH) SN54LS352 (J,FH)
~
f /)
1G
TOTAL POWER
1CO
32.5 mW 122.5 mW 31mW
1C2
1Y
1C1
SN74ALS352 (N,FN) SN74AS352 (N,FN) SN74LS352 (J,N,FN)
1 2 3 4 5 6 7 8
J. N PACKAGES lG 9 2Y 10 2CO B 2Cl lC3 11 lC2 12 2C2 lCl 13 2C3 lCO 14 A lY 15 2G GNO 16 VCC
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
nc
lG B lC3 lC2 nc
lCl lCO lY GNO
11 12 13 14 "5 16 17 18 19 20
nc
2Y 2CO 2Cl 2C2 nc
2C3 A
2G VCC
2CO 2C1
2Y
2C2 2C3
C
f/)
C'CS
X
{E.
t Pin numbers shown on logic symbols are for J ~nd N packages only.
nc - no internal connection,
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
932
© Ie MASTER 1983
PRODUCT GUIDE
353
logic symbol t
J. N PACKAGES
DUAL 4·LINE TO 1·LlNE DATA
A~O) 0 B ..ill.- 1 G"j"
SELECTORS/MUL TIPLEXERS
-;
(three-state outputs, inverting version of 'LS253
1G~ 1CO~ 1C1~
typical performance DELAy:rIMES DATA TYPE
TOINV OUTPUT
FROM
TOTAL
ENABLE
POWER
'ALS353
6 ns
4.5 ns
40mW
'AS353
2.7 ns
5.5 ns
130 mW
'LS353
13 ns
12 ns
SN54ALS353 (J,FHl
1C2 1C3
.!ill.J:::.. iliL-
2C1
l!!!....-
2C2 2C3
43 mW
..!&-ill.....-
2CO
2G
SN74AS353 (N,FNl
SN54LS353 (J,FHl
SN74LS353 (J,N,FNl
354
MUX EN 0
\l ~1V
1 2 3
SELECTORS/MUL TIPLEXERS/ TRANSPARENT REGISTERS
(three-state outputs)
lC3 lC2 lCl lCO lY GNO
2Y 2CO 2Cl 2C2 2C3 A 2G VCC
FH. FN PACKAGES 11 nc 1 nc 12 2Y 2 lG 13 2CO 3 B 4 lC3 14 2Cl 5 lC2 15 2C2 16 nc 6 nc 7 lCl 17 2C3 8 lCO 18 A 19 2G 9 lY 10 GNO 20 vec
l1ZL--.!!!!..l:::.. iC8
S1
DATA TO
S2
TO,INV
NON·INV OUTPUT 23.5 ns
SN54LS354 (J,FHl
L)
~ C9
DO
~90
01 02
ill-
12L-
90 90
~ 90 D4 ~ 90 05 ~ 90 07
GJ!. ,7
..,
SN74LS354 (J,N,FN) 03
06
J. N PACKAGES
EN
illL- ~ JE.L ~
DC
ENABLE
16 ns
~
MUX
&
G3 SO
OUTPUT
-
.!ill.c:...
DELAY TIMES FROM
~
pin assignments
01 G,2
SC
typical performance
23.5 ns
B
9 10 11 12 13 14 15 16
illL..
logic symbol t
DATA
lG
~2V
jgL
8·LlNE TO 1·LlNE DATA
'LS354
r
1 2 3 4 5 6 7 8
SN74ALS353 (N,FNl
SN54AS353 (J,FHl
TYPE
pin assignments
ill..ilL-
,. 0
;;'1
1
[>
2
1 2 3 4 5 6 7 8 9 10
07 06 05 04 03 02 01 DO DC GNO
11 12 13 14 15 16 17 18 19 20
-S-c S2 Sl SO Gl G2 G3 W
Y VCC
FH. FN PACKAGES 1 07 11 SC 12 S2 2 06 13 Sl 3 05 14 SO 4 04 15 Gl 5 03 16 G2 6 02 17 G3 7 01 18 W 8 DO 19 Y 9 DC 10 GNO 20 vcc
\l ~V
3 4 5
90
6
90
7
\l ~w
en ..... C Q)
E :::J
'..... en
c
en
CIl
X
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265
© Ie MASTER 1983
933
PRODUCT GUIDE
355
logic symbol t MUX
a-LINE TO 1·LINE DATA SELECTORS/MUL TIPLEXERS/
61
TRANSPARENT REGISTERS (open-collector outputs)
~1Y3 ~1Y4
1A4~
40 rnW 40rnW 40 rnW 295 rnW 295 rnW 60 rnW 60 rnW
2
(14)
\l
2 3 4 5 6 7 8
1G 1A1 1Y1 1A2 1Y2 1A3 1Y3 GND
9 10 11 12 13 14 15 16
1Y4 1A4 2Y1 2A1 2Y2 2A2
iG' Vee
(11) 2Y1 (13) 2Y2
logic symbol t
AO A1
state outputs)
A2
typical performance
SN54S370 (J)
\l
1A3~
POWER DISSIPATION
(512 4-bit words; three-
x
1Y4
1Y4 1A4 2Y1 2A1 2Y2 2A2
pin assignments
1A2~
MEMORIES
ADDRESS TIME 'S370 45 ns
[>
(14)
2048-BIT READ-ONLY
TYPE
1Y3
EN
(12)
1A1 (2)
370
c
~
~
1Y1 1Y2
9 1A1 10 1Y1· 11 1A2 12 1Y2 13 1A3 14
1~
FH. FN PACKAGES 11 nc nc 1Y4 12 2 1G 13 1A4 3 1A1 14 2Y1 4 1Y1 5 1A2 15 2A1 1
6 7 8 9 10
nc 1Y2 1A3 1Y3 GND
16 17 18 19 20
nc 2Y2 2A2 2G
Vee
SN74368A (J,N) SN74ALS368 (N,FN) SN74ALS368-1 (N,FN) SN74LS'368A (J,N,FN)
SN54LS368A (J,FH)
Jo..
~
~
1G (1)
typical performance
E :J ..... en
\l~
logic symbo\t
HEX BUS DRIVERS (inverted three-state outputs organized
Q)
(3)
[>
1 2 3 4 5 6 7 8
SN74367A (J,N) SN74ALS367 (N,FN) SN74ALS367-1 (N,FN) SN74LS367A (J,N,FN)
SN54LS367 A (J,FH)
en ..... c
J. N PACKAGES
EN
ELill-
1A1
typical performance
( 1)
pin assignments
A3
ENABLE TIME 15 ns
POWER! BIT 0.26 mW
SN74S370 (J,N)
A4 A5 A6 A7 AS
S
pin assignments J. N PACKAGES
ROM 512 X4
(5)
1 2
0
(6) (7) (4)
A\l 0 Am
(3) (2)
A\l A\l
(1 ) A\l
(12) (11) (10) , (9)
01 02 03
3 4 5 6 7 8
A6 A5 A4
9 10 11
A3 AO A1 A2 GND
12 13 14 15 16
04 03 02 01
S A8 A7
Vee
04
(15) (14) (13) ~
S
EN
For chip carrier information. contact the factory.
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
936
©
Ie MASTER 1983
PRODUCT GUIDE 371
logic symbol t
2048·BIT READ-ONLY MEMORIES
AO
(256 8-bit words; three.
A1
state outputs)
A2 A3
typical performance
A4
TYPE '5371
ADDRESS TIME 45 ns
ENABLE
POWERI
TIME 15 ns
5N54S371 (J,FH)
A5
BIT
A6
0.26 mW
5N745371 (J,N,FN)
373
A7
51 82
pin assignments ..... ROM 256 X 8
(1)
0
(2)
A\l
(3)
A\l
(4)
0
A 2s5
(5) (17)
A\l A\l A\l
(18)
A~
(6) (7)
(8)
A\l
7,.
(15) ....
A\l
&
(16) ,.."
02 03
(9) 04 (11) (12)
v
(19)
Q1
(13) (14)
05 06
Oc 10
10
20
20
30
30
SN54ALS373 (J,FH) SN54AS373 (J,FH) SN54LS373 (J,FH) SN54S373 (J,FH)
SN74ALS373 (N,FN) SN74AS373 (N,FN) SN74LS373 (J,N,FN) SN74S373 (J,N,FN)
1 2 3 4 5 6 7 8 9 10
FH. FN PACKAGES 11 e ~ 1a 12 5a 10 13 50 14 60 20 2a 15 6a 16 7a 3a 3D 17 70 40 18 80 4a 19 8a GNO 20 Vee
pin assignments
(1)
typical performance
120 mW 525 mW
FH. FN PACKAGES 11 a5 AO 12 a6 A1 13 Q7 A2 14 a8 A3 15 S1 A4 16 ~2 a1 17 A5 a2 18 A6 a3 a4 19 A7 GNO 20 Vee
08
output control, common enable)
TOTAL POWER 70mW
1 2 3 4 5 6 7 8 9 10
EN
(three-state outputs, common
OUT· TYPE DELAY PUTS Q 'ALS373 8 ns 'AS373 Q 'LS373 19 ns Q 'S373 7 ns
J. N PACKAGES 11 a5 AO 12 a6 A1 13 a7 A2 14 a8 A3 A4 15 S1 16 52 a1 17 A5 a2 18 A6 a3 a4 19 A7 GNO 20 Vee
07
logic symbol, 'L5373, 'AL5373, 'AS373 t
OCTAL D·TYPE LATCHES
1 2 3 4 5 6 7 8 9 10
40
40
50
50
60
60
70 (17) 80 (18)
70 (19)
1 2 3 4 5 6 7 8 9 10
J. N PACKAGES 11 e ~ 1a 12 5a 10 13 50 14 60 20 2a 15 6a 16 7a 3a 3D 17 70 40 18 80 4a 19 8a GNO 20 Vee
80
c 10
10
20
20
30
30
40
40
50
50
60
60
70
70
.....c:en
80
80
E
< Q)
D7
(3)
......
(2) (4) (1) (22) (15)
CONTROLLER AND WR BUS DRIVER I/OW HLDA'S428/'S438 MEMW
-..,
DBIN
......
(17) ::---
STSTB BUSEN
-,
""I/OR "-
(27)
"-.
(24)
(10) (19) (21) (8)
,.
0
0
-..... ..... --
\l CPUD
---c-.
(25)
'.
-
...-..
'.
(2S)
MEMR INTA ~
(12) ...-..
(S)
1 2 3 4 5 6 7 8 9 10
FH PACKAGE nc 11 nc lG 12 3Y 13 3A lA 14 3G lY nc 15 nc 16 4Y 2G nc
17
nc
2A 2Y GNO
18 19 20
4A 4G
Vee
pin assignments
CONTROLLER
POWER
FH PACKAGE 11 nc nc 12 3Y lU" lA 13 3A lY 14 30 nc 15 nc 16 4Y 2G nc 17 nc 2A 18 4A 2Y 19 4~ GNO 20 Vee
positive logic: Y = A
SYSTEM FOR 8080A
1 2 3 4
~3Y
4A~
CURRENT CURRENT
J. N PACKAGES lG 8 3Y lA 9 3A lY 10 3G 11 4Y 2G 5 2A 12 4A 13 4G 6 2Y 7 GNO 14 Vee
1Y
~2Y
2A~
typical performance
TYPE
1 2 3 4 5 6 7 8 9 10
pin assignments
1A (2)
hhree-state outputs, active-high enabling)
DELAY
J. N PACKAGES lIT 8 3Y lA 9 3A lY 10 3~ 11 4Y 2G 12 4A 2A 2Y 13 4G GNO 14 Vee
SN74425 (J,N)
426
TYPE
1 2 3 4 5 6 7
positive logic: Y=A
QUAD GATES
C
1
EN
.ill..-
4G~
4A
CURRENT CURRENT SN54425
pin assignments
2G~ 2A~ 3G~ 3A~
typical performance
en
\
logic symbol t
DBUS\l
7
7
(23) - INTA (13) (1S)
--.
(11)
-
(5)
-..
I/OW
M'EMw' i7O"R MEMR
(9)
DBO DB1 DB2 DB3
1 2 3 4 5 6 7 8 9 10 11 12 13 14
DB4 (18) DB5
J. N PACKAGES 15 DO HLOA 16 OBl 17 01 Wff DB IN 18 OB5 OB4 19 05 04 20 OB6 OB7 21 06 07 22 lru-sm 23 1NfA OB3 24 MEMR 03 OB2 25 02 26 ME'MW OBO 27 IIOW GNO 28 Vee
mm
mm
1 2 3 4 5 6 7 8 9 10 11 12 13 14
FN PACKAGE 15 DO HLOA 16 OBl 17 01 OBIN 18 OB5 OB4 19 05 04 20 OB6 06 OB7 21 07 22 lffiSm OB3 23 iN'TA 24 MEMR 03 OB2 25 17rnf 02 26 ~ 27 ITOw 060 GNO 28 Vee
~
wrr
(20) DBS (7) DB7
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
946
@)
Ie MASTER 1983
PR'ODUCT GUIDE
436, 437
logic symbol t
EN
Drives high-impedance loads
G2~
Provides high-speed switching Requires minimum input current
r
I
Damping output resistor for reducing transients ('436)
•
t>
lA~
2A~
~2Y
3A~
::::...J2!...3Y
DELAY
4A~
~4Y
typical performance LOW-LEVEL HIGH-LEVEL OUTPUT
OUTPUT
CURRENT
CURRENT
'S436
150 mA
-lmA
5.5 ns
5A~
::::-.....!.!.!5Y
'S437
150 mA
-lmA
5.5 ns
6A~
~6Y
SN54S436 (J,FH) SN54S437 (J,FH)
FH, FN PACKAGES nc 11 nc 12 4Y m 1A 13 4A 1Y 14 5Y 2A 15 5A nc 16 nc 2Y 17 6Y 3A 18 6A 3Y 19 G2 GND 20 VCC
1 2 3 4 5 6 7 8 9 10
FH, FN PACKAGES 11 SO CS 61 12 S1 C1 13 A4 14 A3 C2 15 A2 62 63 16 A1 17 GA C3 C4 18 G6 64 19 G'c GND 20 vCC
pin assignments
QUAD TRIDIRECTIONAL
444
1 2 3 4 5 6 7 8 9 10
SN74S436 (J,N,FN) SN74S437 (J,N,FN)
BUS TRANSCEIVERS
440 441 442 443
m
~lY
Total power ... 70 mW
TYPE
1 2 3 4 5 6 7 8
G1 ..!.!L.r::a..
DRIVER CIRCUITS - MOS MEMORY INTERFACE
N PACKAGES 9 4Y 1A 10 4A 1Y 11 5Y 12 5A 2A 13 6Y 2Y 14 6A 3A 15 G2 3Y GND 16 VCC
J,
&
LINE DRIVER/MEMORY
• • • •
pin assignments
N PACKAGES 11 SO 12 S1 61 13 A4 C1 14 A3 C2 15 A2 62 16 A1 63 17 GA C3 18 G6 C4 19 GC 64 GND 20 VCC
J,
1 2
(OPEN-COLLECTOR OUTPUTS, NONINVERTED LOGIC) (OPEN-COLLECTOR OUTPUTS, INVERTED LOGIC)
3
(THREE-STATE OUTPUTS, NONINVERTED LOGIC) (THREE-STATE OUTPUTS, INVERTED LOGIC) (THREE-STATE OUTPUTS, INVERTED AND NONINVERTED LOGIC) ALSO SEE 'LS448
4 5 6 7 8 9 10
CS
typical performance TYPE
DELAY
MAX
MAX
SOURCE
SINK
CURRENT CURRENT SN54LS440
22 ns
-
12 mA
SN74LS440
22 ns
24 mA
SN54LS441
15 ns
SN74LS441
15 ns
-
SN54LS442
11.5 ns
-12 mA
12 rnA
SN74LS442
11.5 ns
-15 mA
24 rnA
SN54LS443
8 ns
-12 rnA
12 rnA
SN74LS443
8 ns
-15mA
24 rnA
SN54LS444
9 ns
-12 mA
12 rnA
SN74LS444
9 ns
- 15
r:n A
24rn~
en
+"'
C
12 mA
(J)
24 rnA
E ::J ~
+"'
en
C
SN54 LS440 SN54LS441 SN54LS442 SN54LS443 SN54LS444
(J,FH) (J,FH) (J,FH) (J,FH) (J,FH)
SN74LS440 SN74LS441 SN74LS442 SN74LS443 SN74LS444
en CO >< (J)
(J,FN) (J,FN) (J,FN) (J,FN) (J ,FN)
J-
For logic symbols see next two pages.
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265 @
Ie MASTER 1983
947
PRODUCT GUIDE 440, 441, 442, 443, 444
(continued)
logic symbol
so S1
(12)
1
10(1/2) EN11
(1S)
.....
10(0/2) EN12
(19)
,....."
(17)
A1
Cs ... (1... ) _
..,
10(0/1) EN13
.rr Z4
-I..rr -I.-
Q 7,11
B1
(2)
Z5
6- -2 [C)
(3)
I.A2
B2 C2 A3 B3 C3 A4 B4
C4
.rr Z6 Q9,13
4-
(14)
-,
o [A)
I..rr - I.-
--
....
-
~
6«2 [e)
Q 7,11
B1 (2) _.. ZS·~
Z5
4(-1)0 [A)
Q8,12 6 2 [e)
2 [C) C1 (3)
.rr Z6
l..
'
Q9,13
G10
r-.....
10(1/2) EN11
(1S)
...... ......
10(0/1) EN13
4,(~'>0 [A)
A1 (2)
Z8- •
< (])
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
948
©
Ie MASTER 1983
PRODUCT GUIDE
440, 441, 442, 443, 444
(continued) 'LS444 t
'LS443 t
O} 0
so (11) Sl (12)
Cs
1
(1)
Sl (12)
Cs
f"o... Gl0
GA(17)
GC (19)
10(0/2) EN12
OB (18)
,......" 10(0/1) EN13
GC (19)
I Al (16) ...
-I.-I.-
Bl (2)
r-....
10(1/2) ENll
..
Cl (3)
I.-
2 [e) o
[AI
ilZ5
4
\78,12
6
2 [e]
ilZ6
4
o
5
1 [S]
\79,13
,....,
r
ilZ4
[A]
Bl (2) Z8-
~
1.1.-
.1..-
A2 (15) ..
A2(15)
B2 (5)
B2 (5) _ ....
G.l0 10(1/2) EN11 10(0/2) EN12
-,
10(0/1) EN13
< Q)
9
•
indicators directly
:::J
B
• •
10+-"
FH. FN PACKAGES
1
10
A
19
f
GNO
20
Vee
C (2)
0(61
SN74LS447 (J,N,FN)
....
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
FONT TABLE T2 -
NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS USING '441
101 11213HlslbIlIBI91c!::JIUElcl o
2
3
•
15
•
7
•
•
10' "
12
13
1.
I 115
TEXA~INSTRUMENTS INCOR PORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
950
©
Ie MASTER 1983
PRODUCT GUIDE
448 logic symbol t
QUAD TRIDIRECTIONAL
pin assignments
so (11)
BUS TRANSCEIVERS
O} G0-
Sl (12)
(OPEN-COLLECTOR OUTPUTS,
1
~(1)
,.....,.
GA (17)
.......
OB (18)
,.."
GC(19)
.......
INVERTED AND NONINVERTED LOGIC)
typical performance MAX MAX TYPE DELAY SOURCE SINK CURRENT CURRENT SN54LS448 17.5 ns 12 rnA SN74LS448 17.5 ns 24 rnA
3
Gl0 10(1/2) ENll 10(0/2) EN12 10(0/1) EN13
:J
~
OUT fMSPI . . . - - - -__ COUT
TO WR
AO. MUX SELECT
•
CiN
{PGM CTR MEM CTR
Ea . . . - - - - - - EaUAL
---.~{ SHIF :;R T MUX - - -....
UJ ...... c
HI·Z
8110 SEL
Q)
E ::J
J... ......
CCO OVER FLOW IMSPI
UJ
C
UJ ctS
XWRLFT
X
~
XWRRT
DATA OUT PORT
ADDRESS OUT PORT
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
953
PRODUCT GUIDE
482
pin assignments
4-BIT-SLICE
J, N PACKAGES
1 2 3 4 5 6 7 8 9 10
EXPANDABLE CONTROL ELEMENTS SN54S482 (J,FH) SN74S482 (J,N,FN)
S4 53
Cout Cin 51 S2 A3 A2 A1 GND
11 12 13 14 15 16 17 18 19 20
AO F3 F2 F1 FO
ClR S6 55
ClK VCC
1 2 3 4 5 6 7 8 9 10
FH, FN PACKAGES 11 AO 54 12 F3 53 Cout 13 F2 14 F1 Cin 51 15 FO 16 ClR 52 17 56 A3 18 S5 A2 A1 19 ClK GND 20 VCC
functional block diagram CLOCK CLEAR
CARRY INPUT
DATA IN
CK 4-BIT FULL ADDER
Ij~
__~_
~
____________~~______~
PUSH !POP CARRY OUT
S1 52
en c:
STACK (FILO)
CLR
4-BIT REGISTER Fj
DATA OUT
H
o L D
S3S4
S5S6
+-"
Q)
E
::s
'-
+-"
en c: en ttS
X
Q)
.....
nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
954
©
Ie MASTER 1983
PRODUCT GUIDE logic symbol 'S484 t
484. 485
pin assignments
BCD-TO-BINARY AND
J. N PACKAGES
1 2 3 4 5 6 7 B 9 10
BINARY-TO-BCD CODE CONVERTERS ('484 BCD-to-binary)
EN
('485 binary-to-BCD) typical performance DELAY TIME
TOTAL
PER PKG LEVEL
POWER
'S484
45 ns
525mW
'S485
45 ns
525mW
TYPE
~u~
SN54S484 (J,FH) SN54S485 (J,FH)
LSD {
:_::_--1
2/Gn
Ac __ B
Y1
4/Gn
(3)
Y2
8
Y3
nV(3
~
{MSD
{
(2) (1)
GHF::(:~::):::
B
A Y1 Y2 Y3 Y4 GNO
Y5 Y6 Y7 YB G1 G2 .
1 2 3 4 5 6 7 8 9 10
H
G F
Vee
FH. FN PACKAGES 11 Y5 E 0 12 Y6 13 Y7 e B 14 YB A 15 G1 Y1 16 G2 Y2 17 H Y3 18 G Y4 19 F GNO 20 Vee
Y5
20
Y6
40
Y7
80
(17)
0
e
11 12 13 14 15 16 17 18 19 20
9-BIT BINARY
Y4
10
E
160 _ _ _ _...
Y8
r...;.~
SN74S484 (J,N,FN) SN74S485 (J,N,FN)
logic symbol 'S485 t
EN
>318Vn
9-BIT BINARY
A
2
B
4
C D
8 16
2nV 4nv 8nV
E
32
F G
64
20nV
128
40nV
H
256
80nV
~:
Y4} MSD}
m
pin assignments CTRDIV10
typical performance COUNT FREQ
1CLR
CLEAR
TOTAL POWER
'490
25 MHz
HIGH
225mW
'LS490
35 MHz
HIGH
75mW
SN54490 (J,FH) SN54LS490 (J,FH)
SN74490 (J,N) SN74LS490 (J,N,FNI
1SET9 1CLK
(2) (4)
~
> o
Y7 Y8
logic symbol t
DUAL DECADE COUNTERS
TYPE
LSD
10n V
160n V
490
Y1 } Y2 Y3
CT=O CT=9
(1)
+
(3)
CT{ 10D
2CLR (14)
20A
2SET9 (12)
20B
2C L K......I..1;,;:;5....,;;:1IC>
1 2 3 4 5 6 7 8
J, N PACKAGES 1ClK 9 200 1ClR 10 20C 10.6. 11 20R 1SET9 12 2SET9 10a 13 20A 10c 14 2ClR 100 15 2ClK GNO 16 VCC
FH, FN PACKAGES
1 2 3 4 5 6 7 8 9 0
11 1ClK 12 1ClR 13 10A 14 1SET9 15 nc 16 10B 17 10C 18 100 19 GNO 20
nc
nc
200 20c .20a 2SET9 nc
20A 2ClR 2ClK
t Pin numbers shown on logic symbols are for J and N packages only.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DAllAS. TEXAS 75265
Ie MASTER 1983
E :J
:...... en
c en
{!!.
2QD
nc - no internal connection.
@
C
Q)
ctS X
VCC
20C (9)
en .....
955
PRODUCT GUIDE 518,519,~20,
521,522
logic symbol 'ALS518, 'ALS519t
8-BIT MAGNITUDE COMPARATORS
TYPE ALS518 ALSS19 ALS520 ALS521 ALS522
INPUT PULL-UP RESISTOR yes no yes no yes
OUTPUT FUNCTION COMPARE AND POWER TIME CONFIGURATION 17.5 ns 50 mW P =0 open-collector P = 0 open-collector 17.5 ns 37.5 mW P = 0 totem-pole 9 ns 50 mW P=n totem-pole 9 ns 37.5 mW P=Q open-colLector lS.S ns SO mW
J. N PACKAGES
t>
G
Compares two 8-bit words
•
pin assignments, 'ALS518, 'ALS519
COMP 1
SN74ALS518(N,FN) SN74ALS519 (N,FN) SN74ALS520 (N,FN) SN74ALS521 (N,FN) SN74ALS522 (N,FN)
logic symbol 'ALS520, 'ALS521 t
FH. FN PACKAGES P4 11 ~
1
2
PO
12
04
2
PO
12
04
3
00
13
PS
3
00
13
PS
P2
4
P1
14
OS
4
Pl
14
OS
P3
S
01
1S
P6
S
01
1S
P6
P4
6
P2
16
06
6
P2
16
06
PS
7
02
17
P7
7
02
17
P7
P6
8
P3
18
8
P3
18
07
9
03
19
07 p=o
9
03
19
P=O
GND
20
Vee
10
GND
20
Vee
P7
lP=O Q
(19)
P=O
00 01
(7) 02 03 (91 04 (12) (14) OS (16) 06 (18) 07
0
logic symbol 'ALS522 t
pin assignments, 'ALS520, 'ALS521, 'ALS522
COMP
t>
P4
Pl
COMP
G
11
PO
10
SN54ALS518(J,FH) SN54ALS519 (J,FH) SN54ALS520 (J,FH) SN54ALS521 (J,FH) SN54ALS522 (J,FH)
G
J. N PACKAGES
t>
G
1
G
11
P4
1
FH. FN PACKAGES P4 G 11
PO
PO
2
PO
12
04
2
PO
12
04
Pl
Pl
3
00
13
PS
3
00
13
PS
P2
P2
4
Pl
14
OS
4
Pl
14
OS
P3
P3
S
01
1S
P6
S
01
lS
P6
P4
6
P2
.16
P2
16
06
7
02
17
06 P7
6
PS
7
02
17
P7
8
P3
18
07
8
P3
18
07
9
03
19
P=O
9
03
19
P=O
GND
20
Vee
10
GND
20
Vee
P
P4 PS
P6
P6 P7
lP=O
P=O
P7
lP=OQ
10
00 (3) 01 (S) 02 (7) 03 (9)
0 U)
0
04 (12) (14)
05
+J
C
Q)
7
E
(16) 06 (18) 07
7
:::J
:10... +J
U)
C U)
ctS X
Q)
I-
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 22S012 • DALLAS, TEXAS 75265
956
@
Ie MASTER 1983
PRODUCT GUIDE
533
logic symbolt'
OC
OCTAL OoTYPE TRANSPARENT LATCHES
pin assignme'1ts
(1) ,......" .. EN
C (11 )
~1
•
Three-state buffer-type outputs drive bus lines directly
10
(3)
20
(4)
•
Inverting outputs
3D
(7)
...... (6)
40
(8)
r-.. (9)
typical performance
TYPE ALS533 AS533
OUTPUTS
DELAY
Q Q
10 ns 5 ns
10
[>
'V
50 (13) 60 (14)
TOTAL POWER 60mW
..... (2)
10
...... (5)
20 30
...... (12) ....... (15)
70
( 17)
t---.. (16)
80
(18)
t--,..
(19)
40 50
1 2 3 4 5 6 7 8 9 10
J. N PACKAGES 11 C OC 10 12 50 10 13 50 14 60 20 2li 15 6li 30' 16 70' 3D 17 70 40 18 80 4~ 19 80 GNO 20 vCC
OC 10' 10 20 2li" 3eT 3D 40 4eT
GND
11 12 13 14 15 16 17 18 19 20
C 50 50 60 6li 70 70 80 8li
vcc
66 70 80
SN74ALS533 (N,FN) SN74AS533 (N,FN)
SN54ALS533 (J,FH) SN54AS533 (J,FH)
534
logic symbolt
pin assignments
OCTAL OoTYPE EDGETRIGGERED FLIP-FLOPS
OC (1) -..
1 2 3 4 5 6 7 8 9 10
• •
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
EN
(11 ) Three-state buffer-type outputs drive bus lines directly
C1
ClK
Inverting outputs
10 20
(3)
-, 10
r[>
'V
50 60 70 80
(2)
10
(4)
r-.....
(7)
r...... (6) 30
(8)
r...... (9)
( 13)
........ (12)
3D 40
to......
(5)
20
J. N PACKAGES oc 11 ClK 12 50 10 10 13 50 14 60 20 15 60 20 3li 16 7eT 17 70 3D 40 18 80 40 19 80 GNO 20 vCC
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
DC 10 10 20 20 3(l 3D 40 4Q
GNO
11 12 13 14 15 16 17 18 19 20
ClK 50 50 60 6li 7li 70 80 80
vCC
Q)
40
E
50
::l
(14)
........ (15) 65
..... en
( 17)
....... (16)
en
( 18)
r-.... (19) 85
typical performance
~
c:
70
as X
{E.
DATA TIMES PWRI F/F SET-UP HOLD ALS534 50 MHz 10.4 mW AS534 165 MHz TYPE
F-MAX
SN54ALS534 (J,FH) SN54AS534 (J,FH)
SN74ALS534 IN,FN) SN74AS534 (N,FN)
tPln numbers shown on logic symbols are for J and N packages only.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265 ~
Ie MASTER 1983
.....c:en
957
PRODUCT GUIDE
538
logic symbolt
pin assignments
x/v t>
3- TO 8-LINE DECODERS!
AL
DEMULTIPLEXERS
N/3
J. N PACKAGES
&
DE1 0E2
•
Three-state outputs
•
Output polarity control
•
Multiple enables for expansion
1
B
2 4
0, a,l3\l 1, a,/3\l 2, a,l3\l 3,a,/3\l 4, a,l3\l 5,a,/3\l 6, a,l3\l 7, a,l3\l
& ..
SELECT
ENABLE
TOTAL
TIME
TIME
POWER
'ALS538 SN54ALS538 (J,FH)
A C
typical performance TYPE
EN
SN74ALS538 (N, FN)
G2 G3 G4
Ga
(3)
OR
DMUX
AL
(12)
N10
t>
VO V1 V2 V3 V4 V5 V6 V7
Y2 Y1 YO l5'r1 cr2
1 2 3 4 5 6 7 8 9 10
A
11 12 13 14 15 16
Y7
AL G1 G2 G3 G4
B
17
e
Y5 Y6 GND
18 19 20
Y4 Y3
Vee
FH. FN PACKAGES
1 2 3 4 5 6 7 8 ·9 10
Y2 Y1 YO ~1
0£2
A B
Y5 Y6 GND
11 12 13 14 15 16 17 18 19 20
Y7
AL G1 G2 ~3
< Q) I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
958
@
Ie MASTER 1983
PRODUCT GUIDE
539
logic symbol.s t
2- TO 4-LINE DECODERSI
XIV
DEMUL TIPLEXERS
• •
pin assignments
Ni3
Three-state outputs
EN
Output polarity control
1 2
0, aJj\l 1,a,i3\l 2, aJj\l 3, a,i3\l
typical performance TYPE
SELECT
ENABLE
TOTAL
TIME
TIME
POWER
J, N PACKAGES
lYO 1Y1 lY2 1Y3
2YO 2Y1 2Y2 2Y3
'ALS539 SN54ALS539 (J,FH)
(3)
SN74ALS539 (N, FN)
OR
DMUX 1AL 10E
N10 EN
O}~ 1 3
0,10 1,10 2,10 3,10
\l \l \l \l
(3) 1YO (2) 1Y1 ( 1) 1Y2 (19) 1Y3
1 2 3 4 5 6 7 8 9 10
1Y2 1Y1 1YO 1AL 10E 2A 2B 2Y3 2Y2 GND
11 12 13 14 15 16 17 18 19 20
2Y1 2YO 2AL 20E 2G 1IT 1A 1B 1Y3
Vee
FH, FN PACKAGES
1 2 3 4 5 6 7 8 9 10
1Y2 1Y1 1YO 1AL 10E 2A 2B 2Y3 2Y2 GND
11 12 13 14 15 16 17 18 19 20
2Y1 2YO 2AL 20E 2G 1IT 1A 1B 1Y3
Vee
(12) 2YO (11) 2Y1 (9) 2Y2 (8) 2Y3
.. .. en
c: Q)
E :::s :10-
en
c:
en
ctS
x
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED
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959
PRODUCT GUIDE 540, 541
&
OCTAL BUFFERS AND LINE DRIVERS
G1
•
Th~ee-state
C1
Buffer-type outputs drive bus lines directly Inverted outputs
::J
12 13 14 15 16 17 1S 19 20
70
typical performance
+'"
10 20 3D 40 60 60 70 SO GNO
SO
TRIGGERED FLIP-FLOPS
TYPE
FH. FN PACKAGES 11 C OC
60
OCTAL D-TVPE EDGE-
•
1 2 3 4 6 6 7 S 9 10
SN74ALS563 (N,FN)
564 •
J. N PACKAGES 11 C OC 12 SCi 10 13 7Q 20 14 80 3D 16 6Ci 40 18 40 60 17 3Q 80 18 20 70 19 10 SO GNO 20 Vcc
(9)
+'"
FH. FN PACKAGES
1 2 3 4 5 6 7 8 9 10
oc 10 20 30 40 50 60 70 80 GNO
11 12 13 14 15 16 17 18 19 20
elK 80 70 60 50 40 30 20 10
Vec
70 80
en
c:
en >< CD ctS
I-
t Pin numbers shown on logic symbols are for J and N packages only.
TEXAS INSTRUMENTS INCORPORATED
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Ie MASTER 1983
PRODUCT GUIDE logic symbol t
568
Gl!ZLI::::::.
1.;:
ENT
'ALS568
Low
Ml (UP] M2 (DOWN]
CLK (2)_
typical performance CLEAR
EN10
U/D~
(decade, synchronous and asynchronous clear)
TYPE
J. N PACKAGES
CTROIV10
SYNCHRONOUS 4-81T UP/DOWN COUNTERS
COUNT FREQ 30 MHz
pin assignment
TOTAL POWER 93 mW
I--'
C5/1.4.7.8+/2.4.7.8-
Z6
1l.!L...r:::::.
G7
6.7.8.9
E N PJZ.L.r:::::,. G8
sClfi~
~RCO 2.7 (CT=O) G9
5CT=O
LOAD~
~CCO
1.7 (CT=9) G9
M3(LOAO]
FH. FN PACKAGES
1
u/t5
11
lOAD
1
U/D
11
lOAD
2
ClK
12
00
2
ClK
12
ENT
3
A
13
Co
3
A
13
Co
4
8
14
Cc
4
8
14
Cc
5
C
15
08
5
C
15
C8
6
0
16
CA
6
0
16
CA
17
(4)
3D
of'LS373 typical performance
10
(3)
20
Approximately half the power
TYPE
(2)
10
FH. FN PACKAGES
J. N PACKAGES
(1) _
DC
LATCHES Functioljlally equivalent to
(8)
(13)
(9)
(12)
30
1 2 3 4 5 6 7 8 9 10
OC 10 20 3D 40 50 60 70 80 GND
1 2 3 4 5 6 7 8 9 10
ClK
11 12 13 14 15 16 17 18 19 20
SO 70 60 50 40 30 20 10
Vce
OC 10 20 3D 40 50 60 70 80 GNO
11 12 13 14 15 16 17
18 19 20
elK SO 70 60 50 40 30 20 10
VCC
40 50 60 70 80
Rising edge of clock pulse
SN54ALS574 (J,FH) SN54AS574 (J,FH)
SN74ALS574 (N,FN) SN74AS574 (N,FN)
575
ac
OCTAL D-TYPE'EDGETRIGGERED FLIP-FLOPS
•
•
(14)
CLR
Noninverting outputs
10
typical performance
'ALS575 'AS575
f max
PWR/ F-F 50 MHz 8.4 mW
(21 ,.....".
ClK
3-state buffer-type outputs drive bus-lines directly
TYPE
pin assignment
logic symbol, 'AlS575. 'AS575
20
DATA TIMES SETHOLD UP 10 nst 4 nst
3D 40 50 60 70
tRising edge of clock pulse SN54ALS575 (J.FH) SN74ALS575 (N,FN) SN74AS575 (N.FN) SN54AS575 (J.FHI
(1) t-(3)
~
Cl lR
-, 10
FH. FN PACKAGES
J. N PACKAGES
EN
i' [>
(4) (5) (6) (7)
\l
(22) 10 (21) 20 (20) 30 (19) 40 (18) 50
(8)
(17)
(9)
(16)
(10)
(15)
80
60 70
1 2 3 4 5 6 7 S 9 10 11 12
ClR ~
10 20 3D 40 50 60 70 SO nc
GNO
13 14 15 16 17 1S 19 20 21 22 23 24
nc
ClK SO 70 GO SO 40 30 20 10 nc
Vce
1 2 3 4 5 6 7 8 9 10 11 12 13 14
nc
elR DC 10 20 3D 40 nc
50 60 70 80 nc
GNO
15 16 17 1S 19 20 21 22 23 24 25 26 27 2S
nc nc
ClK SO 70 60 50 nc
40 30 20 10 nc
Vee
SO
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED
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PRODUCT GUIDE 576
pin assignments
logic symbol t
OCTAL D-TYPE EDGE-
•
Buffer-type outputs drive bus
•
I nverted outputs
(1) ....
OC
(11 )
ClK
lines directly (2)
10
PWRI F-F 804 mW
f max
'ALS576 50MHz 'AS576
.,
Cl
10
(3)
60 70
SN54ALS576 (J,FH) SN54AS576 (J,FH)
EN
r C>
~
V
80
SN74ALS576 (N,FN) SN74AS576 (N,FN)
577
(19)
_ 10
:::-!.!!L 20 :::-!!ZL 30-
20 (4) 3D (5) 40 (6) 50
typical performance TYPE
FH, FN PACKAGES
J, N PACKAGES
TRIGGERED FLIP-FLOPS
........ (16) 40
1 2 3 4 5 6 7 8 9 10
OC 10 20 3D 40 50 60 70 80 GNO
11 12 13 14 15 16 17 18 19 20
-elK 80 70 60 50 40 30 20 10
Vee
1 2 3 4 5 6 7 8 9 10
DC
10 20 3D 40 50 60 70 80 GNO
11 12 13 14 15 16 17 18 19 20
elK 80 7IT 60 5IT 40 30 20 10
Vee
.......... (15) 50
(7)
::::-.ll& 60
(8)
~7a
(9)
...... (12)
_ 80
pin assignment
logic symbol. 'ALS577, 'AS577 \
OCTAL OoTYPE EDGETRIGGERED FLIP-FLOPS
• •
•
DC ClK
m
Buffer-type outputs drive bus lines directly Inverted outputs
10
Synchronous clear
20
3D 40 50 60 70
(2) .......... (14) (1) _
~ Cl
-, lR
(3)
10
FH, FN PACKAGES
J, N PACKAGES
EN
r [>
\l .......
(22) 10
(4)
~ (21) 20
(5)
........ (20) 30 ........ (19) 40 ......... (18) 50
(6) (7)
......... (17) 60 ...... (16) 70 ...... (15)
(8) (9) (10)
80
1 2 3 4 5 6 7 8 9 10 11 12
ern rrc 10 20 3D 40 50 60 70 80 nc
GNO
13 14 15 16 17 18 19 20 21 22 23 24
nc
elK 80 70 6IT 50 4IT 30 2IT
lIT nc
Vee
1 2 3 4 5 6 7 8 9 10 11 12 13 14
nc
m OC 10 20 3D 40 nc
50 60 70 80 nc
GNO
15 16 17 18 19 20 21 22 23 24 25 26 27 28
nc nc
elK 80 70 60 5IT nc
4IT 30 2IT 10 nc
Vee
80
\
typical performance
TYPE 'ALS577 'AS577
f max
POWER/ F-F 50 MHz 8.4 mW
"-
DATA TIMES SETHOLD UP 10 nst 4 nst
. tRising edge of clock pulse SN54ALS577 (J,FH) SN74ALS577(N,FN) SN54AS577 (J,FH) SN74AS577(N,FN)
t Pin numbers shown on logic symbols are for J and N packages only
0
nc -- no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
965
PRODUCT GUIDE pin assignments
logic symbol t
580 OCTAL D-TYPE TRANSPARENT
(1)
OC
LATCHES WITH INVERTED
...
(11)
C
OUTPUTS
•
Three-state buffer-type outputs
(2)
10
drive bus lines directly
20
typical performance TYPE
30
DELAY 11 ns
'ALS580 'AS580
TOTAL POWER 67.5 mW
50
(18) 2Q
(4)
.....
(17) 30
-
(12)
CCKEN~ CCK (11)
CCLR~
register outputs
•
Counter has direct clear
CTRS G1
.,
1+
4~RCO
(CT = 255) Z4 " ..
CT=O
r
[::>
r
3
\l
MAX FREQ 'LS590 'LS591
20 MHz 20 MHz
I
PARALLEL
I
LOAD
CLEAR
TOTAL
SYNC
SYNC-L 166.5 mW
SYNC
155 mW
SN54LS590 (J,FH) SN54LS591 (J,FH)
SYNC-L
B
~OC ~Oo ~OE
~OF
POWER
1 2 3 4 5 6 7
(15) a (1) A
~OB
typical performance
COUNT
e 80 70 60 5/l 4/l 30 20 1Q
Vee
pin assignments
20
TYPE
GNO
11 12 13 14 15 16 17 18 19 20
-
C2
'LS590 has three-state register 'LS591 has open-collector
10 20 3D 40 50 60 70 80
80
EN3
RCK (13)
outputs
C'e
~70
(9)
G~
8-BIT BINARY COUNTERS WITH OUTPUT REGISTERS
•
(16) 4Q (15) 50
FH, FN PACKAGES
1 2 3 4 5 6 7 8 9 10
::::-l!!!.. 60
(8)
80
(19) 10
~
J, N PACKAGES 11 e ~ 10 12 80 20 13 70 14 60 3D 40 15 5/l 50 16 40 60 17 30 70 18 20 80 19 10 GNO 20 Vee
logic symbol, 'LS590 t
590, 591 •
\l~
(3)
(7)
60
SN74ALS580 (N,FN) SN74AS580 (N,FN)
r [>
10
(6)
70
SN54ALS580 (J,FH) SN54AS580 (J,FH)
,
C1
(5)
40
1 2 3 4 5 6 7 8 9 10
EN
~OG
~OH
FH. FN PACKAGES 1 2 3 4 5 6 7 B
9 10
SN74LS590 (J,N,FN) SN74LS591 (J,N,FN)
J. N PACKAGES 9 RCa 10 CCLR 11 CCK 00 12 CCKEN °E 13 RCK OF 14 IT °G 15 °A °H GNO 16 Vee
Os °c
nc
Os Oc 00
°E nc
OF °G QH GNO
11 12 13 14 15 16 17 18 19 20
nc
RCa CCLR CCK CCKEN nc
RCK "IT °A VCC
logic symbol, 'LS591 t
.....cen
G~
Q)
EN3
RCK (13)
E
C2
:::J
..... en ~
CCKEN~
c
CCK (11) -.~
en
CCLR
ctS
x t-
Q)
CTRS G1
.,
1+
(CT = 255) Z4-·
4~RCO
CT=O.
r
r 20 [>
3 Q --1ill.o A ---1!.LoB
.-ill:.ac
~Oo
--!!LOE
~OF
- - i l l . oG
-.-ill. OH
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
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966
©
Ie MASTER 1983
PRODUCT GUIDE
592
logic symbol t CTRS
8-BIT BINARY COUNTERS
CcDi
WITH INPUT REGISTERS
• •
illLr:::.
~~
Has parallel register inputs
CCK
Counter has direct overriding
CLOAD
load and clear
•
pin assignments
Guaranteed counter frequency
RCK
(11)
~ (13)
MAX COUNT
PARALLEL
CLEAR
LOAD
FREQ
SYNC
20 MHz
"
A
SYNC-L
TOTAL POWER 130mW
F
G~
SN74LS592 (J,N,FN)
H
8-BIT BINARY COUNTERS
G
WITH INPUT REGISTERS
G
(lS) .J""-..
CCKEN (15) (14)
CC"i G 15 A H 16 VCC GNO B
nc
B C
0 E nc
F
G H GNO
11 12 13 14 15 16 17 18 19 '20
nc
RCa CCLR CCK CCKEN nc
RCK CLOAO A Vcc
pin aSsignments
(19)
CCLR (12)
Counter has direct overriding
MAX
r
10
>---
Has parallel three-state I/O:
COUNT
Cl
.ill...-
register i nputs/cou nter
•
.,
logic symbol t
593
•
C2
(5)
SN54LS592 (J,FH)
•
~RCa
CT = 255
3+
""'"
~
~ B~ C~ D~ E~
typical performance
CT = 0 G3
""'"
... dc to 20 MHz
1 2 3 4 5 6 7 8
RCa
J. N PACKAGES 11 RCa 12 CCLR BlOB 13 CCK C/OC 14 crKrn 0/0 0 15 CCKEN E/OE 16 RCK F/OF 17 ~ G/OG 18 G H/OH CIQA'l) 19 G GNO 20 vcc A/OA
FH. FN PACKAGES
C3 Gl :>lC2
..,
t. V'
(11)
1 2 3 4 5 6 7 8 9 10
,.
r
20
3D 5,6
[>
Z5
(3) ....
C (4):: 0/ 0 0 (5) ~
1 2 3 4 5 6 7 8 9 10
A/OA BlOB
C/Oc 0/0 0 E/QE F/OF
G/OG H/OH
CTI5Al) GNO
11 12 13 14 15 16 17 18 19 20
RCa CCLR CCK
-crRm CCKEN RCK ~
(j G
.....en C
VCC
Q)
E/OE ..... FlO ,(6):: F (7)..... G/OG ..... H/O (SC: H ......
E ..... en :::J
'-
c
en
as X
Q)
I-
t Pin numbers shown on logic symbols' are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265 @
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967
PRODUCT GUIDE 594 8-BIT SHIFT REGISTERS
(12)
RCK
with storage
SRCK
Buffered outputs
3 4
SRG8
5
R
(11)
Cl/--+
(14) SER
Guaranteed shift frequency
1 2
C2
SRCLR~
Serial-in, parallel-out shift registers
• •
J. N PACKAGES
FfC[""R ~ R3
I
WITH OUTPUT LATCHES
•
pin assignments
logic symbol t
~
r
., 10
20 t>
typical performance
8
~O (3) C
1
nc
2 3 4
OB Oc 00 OE
~OO
SERIAL DATA
~O
ASYNC
TOTAL
CLEAR
POWER
INPUT 'lS594
(15) 0
0
(5) E -OF
20 [>
low
[>
~OG 3~OH ~OH'
SN54LS594 (J,FH) SN74LS594 (J,N,FN) logic symbol, 'LS595 t
595, 596
G~
8-BIT SHIFT REGISTERS
RCK
WITH OUTPUT LATCH ES
•
Serial-in, parallel-out shift
•
'LS595 has three-state parallel
SRCLR
registers with storage
SRCK SER
outputs
•
'LS596 has open-collector
•
Guaranteed shift frequency
(12)
~ ill)
INPUT 'LS595 'LS596
en ...... c Q)
D D
SN54LS595 (J,FH) SN54LS596 (J,FHI
E :::J .... ...... en c en
5 6 7
8 9 10
SRG8 R
Cl/--+
r
~ ~o
r
(15)
20t>3\l~ 0 (1) A ~OB
~OO ~O (5) E ~O
20t>3\l~ O~
~OH'
ASYNC TOTAL CLEAR POWER 167 mW 160mW
3 4 5 6 7 8
SN74LS595 (J,N,FN) SN74LS596 (J,N,FN)
SRCK (11) SER
~
16 17 18 19
nc
i"fCCl'\ SEA OA Vcc
20
OB Oc 00 OE OF °G OH GNO
9
OH'
10~
11 SACK 12 ACK 13 'IT 14 SEA 15 OA 16 VCC
FH. FN PACKAGES nc
2 3 4
OB Oc 00 OE
5 6 7
nc
OF OG OH GNO
11 12 13 14 15 16 17 18 19 20
nc
OH
"S"Wf SCK ACK nc
G SEA OA VCC
EN3
RCK (12)
SRcIR~
OH' SRCLA SACK ACK
13 14 15
1
8 9 10
logic symbol, 'LS596 t
G~
nc
J. N PACKAGES
~OF
LOW
11 12
OF OG OH GNO
---OC
LOW
SRCK RCK RCLR SER OA VCC
13 14 15 16
nc
1 2
C2
typical performance
DATA
SR'Wi
FH. FN PACKAGES
EN3
... dc to 20 MHz
SERIAL
°H'
pin assignments
parallel outputs
TYPE'
°E OF OG OH GNO
~A ~OB
... dc to 20 MHz
TYPE
r3
6 7
9 10 11 12
OB Oc 00
C2 SRG8 R
.,
Cl/--+
10
-
r
cu x
1 (15) 20 [>3Q~ 0A (1 ) ---"(2i °B ~OC
~O (4) 0
~
~OE
(5)
~OF ~OG 20[>3Q~ OH '(9)
~OH'
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
968
© Ie MASTER 1983
PRODUCT GUIDE logic symbol t
597 a-BIT SHIFT REGISTERS
•
riding load and clear
DATA INPUT
'LS597
D
TOTAL
E
...!!L.-
CLEAR POWER
ASYNC
F
....!.2L-
LOW
logic symbol t
SRCK (13) (9)
SiITOAi5
register outputs Shift register has direct over-
RCK OS
riding load and clear Guaranteed shift frequency ... dcto 20 MHz typical performance
INPUT 'LS598
ASYNC TOTAL
SN54LS598 (J,FH)
.......
(15)
I
BOB
(~-
G H GNO
177 mW
SN74LS598 (J,N,FN)
C2
20 \7 6,14
"'-'1..:; 20
0/0 0 (4) E/OE (5) F/OF (6)
G/OG
4C5/4C3
(7)
H/OH (8J
r f>
1,50 1,50
4-
-
J, N PACKAGES
R G4
Gl
C/Oc (3) . LOW
SRGS EN14
.,
(191
(lS) SERO SERl (17) (1 ) A/OA
CLEAR POWER
D
------
SRCLR (12) SCi 30
Z7
....~
.....Cen
...
~-
-
Q)
~.;.
1.-
20 \713,14
30
ldi
E ..... en ::J ~
(11) OH'
c en
as >< Q)
f-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265 @
Ie MASTER 1983
969
PRODUCT GUIDE
599
logic symbol t
illl...t::..
a-BIT SHIFT REGISTERS
R Cl R RCK /(12)
WITH OUTPUT LATCHES
• • •
SRcCR~
Serial-in, parallel-out shift registers
SRCK (11)
Open-collector outputs Guaranteed shift frequency
SER
~
pin assignments R3 C2
1 2 3 4
SRGS R
..,
Cl/--+ I"
10
... dc to 20 MHz
r
(15) 20 C>3Q~ OA (1 )
~OB
SERIAL DATA INPUT 'LS599
0
~O (4) 0 ASYNC
TOTAL
CLEAR
POWER
~OE
1 2
---wi
3 4
(5)
--m
20 C> 3 Q -
Low
C>
SN54LS599 (J,FH)
7 8
~OC
typical performance
TYPE
5 '6
(9)
OF OG °H'
~OH'
5 6 7 8 9 10
SN74LS599 (J,N,FN)
J. N PACKAGES 9 OH OB 10 ~ Oc 11 SRCK 00 12 RCK OE 13 RcrR OF 14 SER OG 15 OA OH GNO 16 VCC
FH. FN PACKAGES nc 11 nc 12 OH' OB 13 SRCLR Oc 14 SRCK 00 15 RCK OE nc 16 I1C 17 Am OF 18 SER °G 19 OA OH GNO 20 VCC
en
+oJ
C
Q)
E :J L..
,
+oJ
en c en
ca x Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
970
@
Ie MASTER 1983
PRODUCT GUIDE
600
logic diagramt
MEMORY REFRESH CONTROLLERS
•
Controls refresh cycle of 4K or 16K
•
Three-state outputs drive bus
•
Time to initiate refresh request
•
Refresh modes: transparent,
dynamic RAM's lines directly is
typi~allY
30 ns
burst SN74LS600A (J,N)
SN54LS600A (J)
pin assignments J.N PACKAGES
RC BURST ...:.ll:.;;,;91'--*--i
1
BUSY
11
RCRAS" HI
2
AO
12
RCRAS La
3
Al
13
REF REOl
4
A2
14
REF RE02
5
A3
15
RAS
6
A4
16
HOLD
7
A5
17
LATCHED RCa
8
A6
18
RESET LATCHED RCa
9
4K!16K
19
RC BURST
GND
20
VCC
10
RESET 1181 LATCHED - ' - - - - - I RCO
')0--------------------01
For chip carrier information, contact the factory.
601
logic diagram t
MEMORY REFRESH CONTROLLERS
•
Controls refresh cycle of 64K
•
Three-state outputs drive bus
•
Time to initiate refresh request
•
Refresh modes: transparent,
dynamic RAM's lines directly is typically 30 ns
.....Cen
burst SN54LS601 A (J)
SN74LS601 A (J,N)
Q)
E
pin assignments J,N PACKAGES
~
c en Ct1 >< Q)
RC RAS HI
1 BUSY 11 2 . AO 12
RC RAS La
3
Al
13
REF REO 1
4
A2
14
REF RE02
5
A3
15
6
A4
16
RAS 'RUm
7
A5
17
LATCHED RCa
8
A6
18
RESET LATCHED RCa
9
A7
19
RC BURST
GND
20
VCC
10
:::J
..... en
RC BURST .!.ll~91,--*-.,
L::~~!D l.:ll~81'--_ _r ' » - - - - - - - - - - - - - - - - - - - _ q RCO
f-
For chip carrier information, contact the factory. tPin numbers shown on logic symbols are for J and N packages only nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265 @
Ie MASTER 1983
971
PRODUCT GUIDE
602
logic diagram t
MEMORY REFRESH CONTROLLERS •
Controls refresh cycle of 4K or
RCRASHI~~~------------~
16K dynamic RAM's •
Three-state outputs drive bus
•
Time to initiate refresh request
•
Refresh modes: cycle steal,
lines directly is typically 30 ns burst
SN54LS602A (Jl
SN74LS602A (J,Nl
pin assignments J, N PACKAGES 1
MY
11
2
AO
12
RC~LO
3
A1
13
REF REQ1
4
A2
14
REF REQ2
S
A3
1S
6
A4
16
RAS Fmrn
7
AS
17
READY
8
A6
18
RC CYCLE STEAL
9 10
RC~HI
4K/16K 19
RC BURST
GND
VCC
20
STEAL
For chip carrier information, contact the factory.
603
logic diagram t
MEMORY REFRESH
r -______-e____________________~~--------(~15~1
CONTROLLERS •
Controls refresh cycle of 64K
•
Three-state outputs drive bus
•
Time to initiate refresh request
•
Refresh modes: cycle steal,
RC~HI~(l~1i~~------------r.
~
JO-......-q>--------.....- ' - i ~__--......:.(1'""1 BUSY
dynamic RAM's lines directly
en ..... C
is typically 30 ns
Q)
E ::J ..... en :10.-
burst
SN54LS603A (Jl
SN74LS603A (J,Nl ~--~---------4~----1~~--~(~161 H 5 V [OSC]
OSCILLATORS
lOSC GND
o V [OSC]
VOLTAGE·
•
FH. FN PACKAGES 1 nc 11 nc 2 OSC GND 12 Z 13 VCC 3 RNG 14 nc 4 CXl 15 nc 5 nc 6 CX2 16 nc 7 nc 17 nc 18 nc 8 !"N 19 FREQ CO NT 9 Y 10 GND 20 OSC VCC
Z
CX2
20 MHz
veo
Y
FC
lFC
FC
Separate supply voltage pins
lCXl
CX
for input/output isolation
lCX2
CX
•
Maximum output frequency
•
Improved version of original
lY (2)
1Z
=
20 MHz
20SC VCC
2Y
family
2Z
2CXl
626
SN74LS625 (J.N.FN)
typical performance
2CX2
logic symbol t
Separate supply voltage pins for input/output isolation Maximum output frequency =
5V [OSC]
lEN lFC lCXl
!G
lY
C> lZ
lCX2
20 MHz Improved version of original family SN54LS626 (J,FH)
2FC
SN74LS626 (J.N,FN)
(15)
2CXl
2Z
2CX2 (8)
t Pin numbers shown on logic symbols are for J and N
1 2 3 4 5 6 7 8
GND lZ lY lEN lCXl lCX2 OSC VCC OSC GND
2Y
2EN
OSC GND
nc -
FH. FN PACKAGES 11 nc GND 12 20SC GND lZ 13 20SC VCC 1Y 14 2FC lCXl 15 2CX2 nc 16 nc lCX2 17 2CXl lFC 18 2Y 10SC VCC 19 2Z 10SC GND 20 VCC
~ackages
nc
W ......
c:
J. N PACKAGES
(7)
OSCILLATORS
•
1 2 3 4 5 6 7 8 9 10
OSC VCC
CONTROLLED
•
J. N PACKAGES GND 9 20SC GND lZ 10 20SC VCC lY 11 2FC lCXl 12 2CX2 lCX2 13 2CXl lFC 14 2Y 10SC Vee 15 2Z 10SC GND 16 Vce
pin assignments
VOLTAGE·
•
1 2 3 4 5 6 7 8
20SC GND 2FC
SN54LS625 (J.FH)
J. N PACKAGES OSC GND 8 Z RNG 9 Vee eXl 10 nc CX2 11 nc 12 nc m Y 13 FREQ CO NT GND 14 OSC VCC
1 2 3 4 5 6 7
1 2 3 4 5 6 7 8 9 10
9 10 11 12 13 14 15 16
Q)
lFC 2FC 2CX2 2CXl 2m 2Y
E ::::::J J... ...... oW c:
W ctS
2Z
>
CX
RX~
family
nc
2
J. N PACKAGES
r(14)
Separate supply voltage pins for input/output oscillators
•
10 2CX2
11
pin assignments OSC VCC
I REPLACES I , LS324 l'LS628 I I
OSCILLATORS
•
20SC GND
9
nc
8
I TYPE
CONTROLLED
OSCILLATORS
1
4 lCX2 11 2CXl 10SC 12 2FC 5 GND 20SC 13 6 1Y vcc 7 GND 14 VCC
logic symbol t
typical performance
VOLTAGE-
CONTROLLED
3 lCXl
FH. FN PACKAGES
8 2Y
2CX2~
SN74LS627 (J,N,FN)
•
2 lFC
ex
2FC~
SN54LS627 (J,FH)
•
~1Y
FC
10SC VCC
1
20SCVCC ~
Improved version of original family
•
o V [OSC)
~
~ ~
J. N PACKAGES
! G C> 5 V [OSC)
(13)
20 MHz
•
~ ~
pin assignments
!G
C>
, ~
1Y
CX
~
1 2 3 4 5 6
FH. FN PACKAGES 11 nc 12 GND 2FC 13 2Y lFC 14 2EN lRNG 15 2CX1 lCXl 16 nc nc nc
7 lCX2 8
~2Y
l!L1L
2CX2~
J. N PACKAGES 9 GND 2FC ' 10 2Y 1FC lRNG 11 2EN lCXl 12 2CXl 1CX2 13 2CX2 lEN 14 2RNG OSC 15 7 lY vcc osc 16 VCC 8 GND
1 2 3 4 5 6
fEN
9 lY
OV [OSC]
10
OSC GND
17 2CX2 18 2RNG 19
ose Vec
20 VCC
1(8) OSeGND
t Pin numbers shown on logic symbols are for J and N packages only, nc -
no internal connection,
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265,
978
©
Ie MASTER 1983
PRODUCT GUIDE 630, 631
pin assignments
16-BIT PARALLEL ERROR 1 2 3 4 5 6 7 8 9 10 11 12 13 14
DETECTION AND CORRECTION CIRCUITS
•
Fast processing times: - Write cycle: generates check word in 45 ns typical - Read cycle: flags errors in 27 ns typical
•
Detects and corrects single
•
Detects and flags dual-bit
bit error
JD. N PACKAGES DEF 15 DB12 DBa 16 DB13 DBl 17 DB14 DB2 18 DB15 DB3 19 CB5 DB4 20 CB4 DB5 21 CB3 DB6 22 CB2 DB7 23 CBl DB8 24 CBO DB9 25 so DB10 26 Sl DBll 27 SEF GND 28 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
FH. FN PACKAGES DEF 15 DB12 DBa 16 DB13 DBl 17 DB14 DB2 18 DB15 DB3 19 CB5 DB4 20 CB4 DB5 21 CB3 DB6 22 CB2 DB7 23 CBl DB8 24 CBO DB9 25 so DB10 26 Sl DBll 27 SEF GND 28 VCC
errors typical performance TYPE
OUTPUT DELAY POWER
'LS630
3-State
27 ns
715 mW
'LS631
o-e
28 ns
565mW
SN54LS630 (JD,FH) SN54LS631 (JD,FH)
SN74LS630 (JD.N.FN) SN74LS631 (JD.N.FN)
functional block diagram
so
......
Sl
...
51 ~
FUNCTIO SELECTon
SO-51 SO-51
... ..-- ~
6/
LATCH
/
~ .
~C
PARITY GENERATOR
CHECK BIT 1/0, ~ CBO THRU CBS
Ir
V ,. 12
4- f - -
BUFFER
~
12/
6/
/
/
...-
OE ERROR DETECTOR
~SEF
en ......
~DEF
C
OE
...~
.--- ~ LATCH
,.
16 .... /
Q)
12
E
/
:::J
'...... en c en as >
ECB
27 2B 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
CB3 CB2 CBl CBO OB16 OB17 OB18 OB19 OB20 OB21 OEB2 OB22 OB23 GNO OB24 OB25 OEB3 0826 OB27 OB28 OB29 0830 OB31 SO Sl VCC
....+-t_-~~--~
DB24-DB31 ......+-+-t_---::;.---~ BUFFERS
3
om -++---dl-. QEiij
--+----0
i:'E'DBO - - - - - - - - - - - - '
C CJ)
as
For chip carrier information. contact the factory.
X
{!?
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
980
© Ie MASTER 1983
PRODUCT GUIDE
634, 635
logic diagram (positive logic) DECODER XIV
32-I,lIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS •
Detects and Corrects singlebit errors
•
Detects and Flags dual-bit errors
•
Fast processing times
O~----------------~ 3~--------------~
so Sl
LATCHES
typical performance
OUTPUT TYPE 'ALS634 3-State O-C 'ALS635 SN54ALS634 (JD) SN54ALS635 (JD)
DELAY
POWER 32
~~--------~----~--~
SN74ALS634 (N) SN74ALS635 (N)
pin assignments
OECB
-------- 27
7
60
7
B1
9
A6
21
10
A7
22
SBA
(191
11
A8
23
CBA
~-: B2
12
GNO
24
VCC
118)
..-
B3 (171
U~: B4
L.-
(201
(16)
~
11-
~ ....
~
~
L-
1-
~
B5
.... r
(151
...
B6
(14)
-
B7
(13) .... B8
logic symbol, 'ALS654, 'LS654 t GBA (21)
r--...
GAB (3) CBA (23)
G6
f'.. C6
SAB (21
..,
G7
(41
~1
~ =1
A2~
A10~
J. N PACKAGES
[ADDRESS COMPI [P ."umed;1!: 12.13.141
EN
(171
P3-
typical performance TYPE DELAY 'ALS679 'ALS680
pin assignmens, 'ALS679
logic symbol, 'ALS679t
*'
FH. FN PACKAGES
1
Al
11
Al0
1
Al
11
2
A2
12
All
2
A2
12
All
3
A3
13
A12
3
A3
13
A12
~
4
A4
14
PO
4
A4
14
PO
S
A5
15
Pl
5
A5
15
Pl
~
6
A6
16
P2
6
A6
16
P2
7
A7
17
P3
7
A7
17
P3
r--=1
8
A8
18
Y
8
AS
18
Y
9
A9
19
9
A9
19
C
I--=1 P '5 5 p. 6 ~ 6 P _. 7
10
GND
20
e Vce
GND
20
Vee
=1
P,11 P~' 2 2 P . 3 3 P . 4 4
~
&
10
Al0
~ ~y
7 I--P . 8 =1 8 P , 9 9 P ,·10 10 P>11 11 P ·12 12
I--=1 I--=1 I--=1
~
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
994
©
Ie MASTER 1983
PRODUCT GUIDE
681
logic symbol t (18)
4-BIT PARALLEL
ASO
BINARY
AS1
ACCUMULATORS
AS2 M
•
Contains two synchronous registers
RSO
•
B register frequency
•
Arithmetic operations include
=
20 MHz
B minus A and A minus B •
Cn
(17)
(16) (15) (6)
]M~IAlUI
J. N PACKAGES (0 ... 7) CG
P G
(0 ... 7) CO
Cn+4
(0 .•. 7) CP
CI
RS1
O} EN Q 13 P4
COMP
COMPARATORS
•
pin assignments
P1
TYPE
P2
TOTAL
TIME
OUTPUT
POWER
'lS686
17 ns
Totem-Pole
220 mW
'lS687
22 ns
O-C
220 mW
P3 P4 P5 P6
SN54LS686 (JT,FH) SN74LS686 (JT,NT,FN) SN54LS687 (JT,FH) SN74LS687 (JT,NT,FN)
P7 00 01 02 03 04 Ot: 06 07
(2)
......
(23) ...... (3)
t>
G1
2
G2
3 4
G1 PO
14 15 16
04 P5
FH. FN PACKAGES
1
nc
15
nc
2
P>n
16
P4
3
G1 PO
17 18
04 P5 05
5
00 P1
17
05 P6
(8)
6
01
18
06
(10)
7
nc
19
nc
6 7
8
P2
8
nc
22
nc
02
20 21
P7
9 10
07
9
nc
22 23
P='n 10
P2
23 24
P7
G2
11
02
25
24
VCC
12
P3
26
07 P="Q
13 14
03
27
G2
GND
28
VCC
ITO
(5)
)p
(13) (15)
1P=0
(17)
t.....
(22)
-P=O
11
(20)
12
IT 7...
(4)
ITO
(6) (9) 2P>0
( 11)
....... (1)
P3 03 GND
4
5
00
19
P1
20
P6
01
21
06 nc
-P>O
0
(14) (16) (18) (21)
IT7
logic symbol, 'LS687 t COMP 01 02 PO P1 P2
(2)
,......"
(23) ..... (3)
t>
G1 G2 IT
O~
(5) (8) (10)
P3 P4 P5 P6 P7 00 01 02 03 04 Of: 06 07
)p
(13) (15)
1P=0 Q
(17) (20) (4)
t.....
(22)
P=O
IT 7... IT
O~
(6) (9)
2P>0 Q .....
( 1)
P>Q
( 11) 0
(14) (16) (18) (21)
IT7
t Pin numbers shown on logic symbols are for JT and NT packages only, nc - no internal connection.
TEXAS)NSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265 @
Ie MASTER 1983
997
PRODUCT GUIDE
688, 689
COMP
COMPARATORS
•
G
Compares two 8-bit words
PO Pl
typical perforrnance
P2
TYPE COMPARE TIME OUTPUT 9.5 ns Totem-Pole 'ALS688 O-C 'ALS689 15 .. 5 ns Totem-Pole 14.5 ns 'LS688 23 ns O-C 'LS689 TYPE
TOTAL POWER 37.5 mW 37.5 mW 200 mW 200 mW
P3 P4 P5 PS P7 00
SN54ALS688 (J,FH) SN54ALS689 (J,FH) SN54LS688 (J,FH) SN54LS689 (J,FH)
pin assignments
logic symbol, 'ALS688, 'LS688t
8-BIT MAGNITUDE
SN74ALS688 (J,FN) SN74ALS689 (N,FN) SN74LS688 (J,N,FN) SN74LS689 (J,N,FN)
(1 ) (2)
~
1 2
0
3 4
(4) (5) (8) )P
( 11) (13) (15) (17)
(3)
~
7,
FH. FN PACKAGES
J. N PACKAGES
t>
Gl
(19)
1P=0
p=o
5 6 7 8 9 10
G PO 00 P1 01 P2 02 P3 03
GND
P4 11 12 04 13 P5 14 05 15 P6 16 06 17 P7 18 07 19 ·p=o 20 Vee
P4 04
1
G
2
PO 00 P1 01
11 12 13 14 15
P2 02 P3 03
16 17 18 19
P5 05 P6 06 P7 07 p=o
GND
20
Vee
3 4 5 6 7 8 9 10
O~
(5)
01 02 (7) 03 (9) (12) 04 (14) 05 (15) OS (18) 07
)0
7
logic symbol, 'ALS689, 'LS689t CaMP
G PO Pl P2 P3 P4 P5 P6 P7 00 01 02
(1 ) (2)
r-.. Gl
t>
0'
(4) (6) (8) ~P
(11 ) ( 13) (15)
........ (19)
(17)
7, (3)
lP=OO
P=O
0'
(5) (7) (9)
03 04 (12) , (14) 05 (15) 06 (18) 07
>0
7
t Pin numbers shown on logic symbols are for J and N packages only.
nc -
no 'internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
998
~
Ie MASTER 1983
PRODUCT GUIDE logic symbol, 'LS690 t
690, 691 692, 693
pin assignments J, N PACKAGES
1 2 3 4 5 6 7 8 9 10
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS •
Multiplexed three-state
•
4-bit counters/registers
•
'LS690, 'LS692: Decade
•
'LS691, 'LS693: Binary
outputs
counters
A
V'I-....;.~-OA
B
TOTAL
C
OB Oc
POWER
D
°D'
typical performance MAX CLEAR
CLOCK FREQ
'LS690
Direct
20 MHz
237 mW
'LS691
Direct
20 MHz
237 mW
'LS692
Sync-L
20 MHz
237 mW
'LS693
Sync-L
20 MHz
237 mW
SN54LS690 SN54LS691 SN54LS692 SN54LS693
14 15 0 16 ENP 17 RCLR 18 RCK 19 GND 20 B
C
RIC
G LOAD ENT 00
Oc OB OA RCO VCC
FH, FN PACKAGES
CCK....loiii.---D
counters
TYPE
CCLR 11 CCK 12 A 13
(J,FH) (J,FH) (J,FH) (J,FH)
SN74LS690 SN74LS691 SN74LS692 SN74LS693
logic symbol, 'LS691 t
1 2 3 4 5 6 7 8 9 10
CCLR CCK A B C
11 12 13 14 15 0 16 ENP 17 RCLR 18 RCK 19 GND 20
RIC
G LOAD ENT 00
Oc OB °A RCO VCC
(J,N,FN) (J,N,FN) (J,N,FN) (J,N,FN)
CCK .......- - - D
A
OB Oc OD
B
C
D
logic symbol, 'LS692 t
logic symbol, 'LS693 t
3CT""15
CCK
Z22
CCK
A
OA
A
B
°B Oc OD
B
(2)
OB
C
'(4)
QC
D
' (8)
°D
C
D
OA
t Pin numbers shown on logic symbols are for J and N packages only.
nc - no internal connection.
TEXAS
INSTRUMENTS
INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
999
PRODUCT GUIDE
.696, 697, 698, 699
pin assignments FH. FN PACKAGES
J. N PACKAGES SYNCHRONOUSU~DOWN
1
UID
11
RIC
1
UID
11
RIC
2
CCK
12
G
2
CCK
12
G
COUNTERS W'ITH OUTPUT
3
A
13
LOAD
3
A
13
LOAD
REGISTERS, MULTIPLEXED
4
B
14
ENT
4
B
14
ENT
THREE-STATE OUTPUTS •
4-bit counters/registers
•
'LS696, 'LS698: Decade
•
'LS69 7, 'LS699: Binary
counters
5
C
15
00
5
C
15
00
6
0
16
°c
6
0
16
°c
7
ENP
17
°B
7
ENP
17
°B
8
CCLR 18
8
CCLR 18
9
RCK
19
°A RCO
9
RCK
19
°A RCO
10
GND
20
Vee
10
GND
20
Vce
counters typical performance MAX TYPE
CLOCK
CLEAR
.FREQ
TOTAL POWER
'LS696
20 MHz
Async-L 237 mW
'LS697
20 MHz
Async-L 237 mW
'LS698
20 MHz
Sync-L
237 mW
'LS699
20 MHz
Sync-L
237 mW
SN54LS696 SN54LS697 SN54LS698 SN54LS699
SN74LS696 SN74LS697 SN74LS698 SN74LS699
(J,FHI (J,FHI (J,FHI (J,FHI
(J,N,FNI (J,N,FNI (J,N,FNI (J,N,FNI logic symbol, 'LS697 t
logic symbol, 'LS696 t
en
+-'
RCO
C ,0>
E ::J
:r...
+-'
en C
en as >< 0>
A
A
I-
B
B
C
C D
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection,
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
1000
© Ie MASTER 1983
PRODUCT GUIDE 696, 697, 698, 699
continued logic symbol, 'LS699 t
logic symbol, 'LS69S t
cr~ R/C.1l.1L..-
cr.!..W...J::::..
MUX
EN24
R/C.i.1.l!.-
G21
RCK (9)
RCK (9)
Cll
J. N PACKAGES
Cll CTRDIV16
CcLR.ill..- 7R8
LOAD --i~ Ml
[LOAD) M2 [COUNT)
M1 [LOAD) M2 [COUNT)
M3 [UP) I~ M4 [DOWN)
ENi~ G5
3.5CT=9· ~222
ENP.lZLl:::.. G6 CCK (21 C7
[UP) I~ M3 M4 [DOWN)
U/D
U/D
22,23
~RCO
4,5CT=O f- V23
ENT~ ENP~ (2)
A~ 1,70
[1 )
B~
(2)
c..ill-
(4)
D~
(8)
r
8~1D
r
-....
r
21 C> 8 2124"7 ~QA
~QB ~Qc
~QD
3,5CT=15
G5 G6
t=l>.,
CCK
t:1>2,3,5,6' ~2,4,5,6-
45CT=O ,
222
22.23
UIO
11
M/C
2
CCK
12
G
3
A
13
LOAD
4
B
14
ENT
5
C
15
00
6
0
16
Oc
7
ENP
17
Os
8
CCLR
18
9
RCK
19
OA RCO
10
GNO
20
VCC
1
UIO
11
RIC
2
CCK
12
G LOAD
3
A
13
2,3,5,6'
4
B
14
ENT
~2.4,5,6-
5
C
15
00
6
0
16
Oc
7
ENP
17
OB
8
CCLR
18
9
RCK
19
°A RCO
10
GNO
20
vcc
[1 )
B~
(2)
c..ill-
(4)
D~
(8)
r-
r
r-
8~1D
21 C> ~QA 8 21 24"7 (17)
~QB
'~Qc
~QD
pin assignments J. N PACKAGES
DRIVERS
lA
typical performance
lB lC 10
HIGH·
LEVEL
LEVEL
POWER/
OUTPUT
OUTPUT
GATE
CURRENT
CURRENT
SN54AS800
40mA
-40mA
25mW
SN74AS800
48mA
-48mA
25mW
SN54AS800 (J,FH)
1
FH. FN PACKAGES
C7
A~ 1,70
TRIPLE 4-INPUT AND/NAND
LOW·
~RCO
V23
logic symbol t
800
TYPE
MUX
EN24 G21
CTRDIV10 CCIR.ill..- 7R8
LOAD --i~
pin assignments
2A
(1 ) (18)
(16)
.....
(19) (2)
2B 2C 20
SN74AS800 (N, F N )
&C>
(17)
3A 3B 3C 3D
(15\ (14)
(3) (4) 1-0....
(5) (6)
(13) (12)
(7) (8) J......
(9)
= ABCD Z = ABCi5
positive logic: Y
(11 )
lY lZ 2Y 2Z
1
1A
11
3Z
2
2A
12
3Y
3
2B
13
2Z
4
2C
14
2Y
5
20
15
1Z
6
3A
16
1Y
7
3B
17
1B
8
3C
18
1C
9 10
19
10
20
\fcc
FH. FN PACKAGES
3Y 3Z
3D
GNO
1
1A
11
3Z
2
2A
12
3Y
3
2B
13
2Z
4
2C
14
2Y
5
20
15
1Z
6
3A
16
1Y
7
3B
17
1B
8
3C
18
1C
9 10
3D
19
10
GNO
20
VCC
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
1001
PRODUCT GUIDE
802
logic symbol t
TRIPLE 4-INPUT OR/NOR
1A
LINE DRIVERS
18 1C
typical performance
TYPE
10 2A
LOW-
HIGH-
LEVEL
LEVEL
POWER/
OUTPUT
OUTPUT
GATE
28 2C 20
CURRENT CURRENT
3A
SN54ASS02
40mA
-40mA
25mW
SN74ASS02
4SmA
-4SmA
25mW
3C
SN74ASS02 (N ,F N)
30
SN54ASS02 (J,FH)
38
(1 )
pin assignments ;;'1[>
(16)
(17)
(1S)
(15)
I'-..
(19) (2)
(14)
(3) (4)
(13)
I'-..
(5) (6)
(12)
(7)
. (S)
(11)
t--.
(9)
1Y 1Z
3 4 5 6 7 8 9 10
2Y
2Z 3Y
FH. FN PACKAGES 1A 11 3Z 2A 12 3Y 3 2B 13 2Z 4 2C 14 2Y 5 20 15 1Z 6 3A 16 1Y 7 3B 17 1B 8 3C 18 1e 9 3D 19 10 10 GNO 20 Vec
3Z
positive logic: Y = A+B+C+D Z - A+B+C+D
logic symbol t
804
1A
HEX 2-INPUT NAND DRIVERS
18
typical performance
TYPE
2A
LOW-
HIGH-
LEVEL
LEVEL
OUTPUT
OUTPUT
28
DELAY
POWER/
38
GATE
4A
CURRENT CURRENT
U) +-'
c:
SN54ALSS04
12 mA
-12 mA
3 ns
3.4 mW
SN74ALSS04
24 mA
-15 mA
3 ns
3.4 mW
SN54AS804A
40mA
-40mA
2.7 ns
9mW
SN74ASS04A
4S mA
-4SmA
2.7 ns
9mW
SN54ALS804 (J,FH) SN54AS804A (J,FH)
3A
48 5A 58 6A . 68
SN74ALS804 (N,FN) SN74ASS04A (N,FN)
(1 )
J. N PACKAGES 1A 11 3Z 2A 12 3Y 2B 13 2Z 14 2Y 2C 20 15 1Z 3A 16 1Y 17 1B 3B 18 1C 3C 3D 19 10 GNO 20 VCC
pin assignments &[>
(2)
.......
(7)
(S) (12) (13) (15) (16) (1S) (19)
4 5 6 7 8 9 10
3 4 5 6 7 8 9 10
FH. FN PACKAGES 1A 11 4Y 1B 12 4A 1Y 13 4B 2A 14 5Y 2B 15 5A 2Y 16 5B 17 6Y 3A 3B 18 6A 3Y 19 6B GNO 20 Vce
1 2
(4) (5)
J. N PACKAGES 4Y 11 1A 12 4A 1B 13 4B 1Y 14 5Y 2A 2B 15 5A 2Y 16 5B 17 6Y 3A 18 6A 3B 19 6B 3Y GNO 20 Vee
(3) 1Y
1-0...
(6) 2Y
........
(9) 3Y
.......
(11) 4Y
-
(14)
.......
(17)
5Y 6Y
positive logic: Y=AB
Q)
E
:J 10...
+-' U)
c:
U)
ca X
Q)
I-
t Pin numbers shown on logic symbols are for J and N packages only. nc -
no internal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
1002
©
Ie MASTER 1983
PRODUCT GUIDE
805
logic symbol t (1 ) lA (2) 18 (4) 2A (5) 2B
HEX 2-INPUT NOR DRIVERS
typical performance
TYPE
LOW-
HIGH-
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
POWER/
CURRENT CURRENT 12 mA
-12 mA
3.5 ns
4.2mw
SN74ALS805
24 mA
-15mA
3.5 ns
4.2mW
SN54AS805A
40mA
-40mA
2.7 ns
12mW
SN74AS805A
48mA
-48mA
2.7 ns
12mW
SN54ALS805 (J,FH) SN54AS805A (J,FH)
SN74ALS805 (N,FN) SN74AS805A (N,FN)
HEX 2-INPUT AND DRIVERS
lA (2) 18 (4) 2A (5) 28
(1 )
typical performance
TYPE
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
POWER/
3A
GATE
38 4A
CURRENT CURRENT SN54ALS808
12 mA
-12 mA
4.3 ns
4.5mW
SN74ALS808
24mA
-15 mA
4.3 ns
4.5mW
SN54AS808A
40mA
-40mA
3.2 ns
13 mW
SN74AS808A
48mA
-48mA
3.2 ns
13 mW
SN54ALS808 (J,FH) SN54AS808A (J,FH)
(3) lY
~
(6) 2Y
~
(9) 3Y
~
(11) 4Y
~.
(14)
~
(17)
5Y
48 5A 58 6A 68
SN74ALS808 (N,FN) SN74AS808A (N,FN)
J, N PACKAGES
1 2 3 4 5 6 7 8 9 10
1A 18 1Y 2A 28 2Y 3A 38 3Y
GND
11 12 13 14 15 16 17 18 19 20
4Y 4A 48 5Y 5A 58 6Y 6A 68
Vee
FH. FN PACKAGES
6Y
positive logic: Y=A+B
logic symbol t
HIGH-
~
(7)
(8)
808 LOW-
~11>
38 (12) 4A (13) 48 (15) 5A (16) 58 (18) 6A (19) 68
GATE
SN54ALS805
3A
pin assignments
1 2 3 4 5 6 7 8 9 10
1A 18 1Y 2A 28 2Y 3A 38 3Y
GND
11 12 13 14 15 16 17 18 19 20
4Y 4A 48 5Y 5A 58 6Y 6A 68
Vee
pin assignments &1>
(7)
(8)
(3) lY (6) (9)
2Y 3Y
(12) (13) (15) (16) (18) (19)
positive logic: Y=AB
(11) 4Y (14)
J, N PACKAGES
1 2 3 4 5 6 7 8 9 10
1A 18 1Y 2A 28 2Y 3A 38 3Y
GND
11 12 13 14 15 16 17 18 19 20
4Y 4A 48 5Y 5A 58 6Y 6A 68
Vee
5Y FH. FN PACKAGES
(17)
6Y
1 2 3 4 5 6 7 8 9 10
1A 18 1Y 2A 28 2Y 3A 38 3Y
GND
11 12 13 14 15 16 17 18 19 20
4Y 4A 48 5Y 5A 58 6Y 6A 68
Vee
en
+"""
c:: Q)
E
::::s
~
+"""
en
c:: en
ctS X
~
t Pin numbers shown on logic symbols are for J and N packages only. nc - no internal connection.
TEXAS INSTRUMENTS INCORPORATED
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
©
Ie MASTER 1983
1003
PRODUCT GUIDE logic symbol t
832
1A
HEX 2-INPUT OR DRIVERS
18
typical performance
TYPE
HIGH-
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
(7) (12)
4A
12 mA
-12 mA
4 ns
5.3mW
SA
SN74ALS832
24mA
-15mA
4 ns
5.3mW
58
SN54AS832A
40mA
-40mA
3 ns
17mW
6A
SN74AS832A
48mA
-48mA
3 ns
17mW
68
SN74ALS832 (N,FN) SN74AS832A (N,FN)
(11) 4Y
(13)
48
SN54ALS832
(9) 3Y
(8)
38
GATE
(15)
(14)
(16) (18)
(17)
(19)
5Y
Z
positive logic: Y
3 4 5 6 7 8 9 10
= A+B
f}G~
S1 (23) (13) COMP
outputs True or complementary
1
3
N4 ~3
data
~3
SN74ALS857 (JT,NT) SN74AS857 (NT,FN)
1
~EN5
~1
~EN6
...
-1-2 (2) 1A
L
MUX
O
en +'" c:: Q)
(3) 11 18 (5) 2A 28 (6)'
E
3A (8)
~
38 (9)
+'"
en c:: en as >< Q)
r [>
&
4,5\7
12
::J
Vcc
11 12 13 14 15 '16 17 18 19 GND 20
1A 1B 1Y 2A 28 2Y 3A 38 3Y
4Y 4A 4B 5Y 5A 5B 6Y 6A 68 Vcc
(4) 1Y
(7) 2Y (10) 3Y (14) 4Y
48 (15) 5A (19)
(17) 5Y
58 (18) 6A (22)
(20) 6Y
68 (21) ~1
1 2 3 4 5 6 7 8 9 10 11 12
SO 1A 1B 1Y 2A 2B 2Y 3A 3B 3Y OPER=O
GND
13 14 15 16 17 18 19 20 21 22 23 24
COMP 4Y 4B 4A 5Y 5B 5A 6Y 6B 6A S1 VCc'
FH. FN PACKAGES
4A (16)
I-
4Y 4A 4B 5Y 5A 5B 6Y 6A 6B
pin assignments
SO (1)
Three-state buffer-type
SN54ALS857 (JT) SN54AS857 (JT,FH)
11 12 13 14 15 16 17 18 19 20
JT. NT PACKAGES
MULTIPLEXER
•
GND
1
6Y
HEX 2-TO-1 UNIVERSAL
•
1A 1B 1Y 2A 2B 2Y 3A 3B 3Y,
FH. FN PACKAGES
logic symbol t
857
1 2 3 4 5 6 7 8 9 10
(6) 2Y
(5)
3A
CURRENT CURRENT
J. N PACKAGES
(3) 1Y
(4)
28
POWERI
pin assignments ~1[>
(2)
2A
LOW-
SN54ALS832 (J,FH) SN54AS832A (J,FH)
(1 )
y3
[> 6\7
1 2 3 4 5
6 7 8 9 10 11 12 13 14
15 16 17 18 19 20 21 nc 22 2Y 23 24 3A 3B 25 3Y 26 OPER =0 27 GND 28 nc
nc
SO 1A 1B 1Y 2A 2B
COMP 4Y 4B 4A 5Y 5B nc
5A 6Y 6B 6A S1 VCC
(11) OPER=O
tPin numbers shown on'logic symbols are for J, JT. N. and NT packages only, nc -
no internal connection,
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS, TEXAS 75265
1004
© Ie MASTER 1983
PRODUCT GUIDE
866
pin assignments
logic symbolt
JO, N PACKAGES
CaMP
8-BIT MAGNITUDE COMPARATORS
l/A (2)
• Fast compare to zero • Arithmetic and logical comparison • Open-collector output for P = Q
M [lOGIC] M [ARITH, 2. CaMP] C1
(26~
PlE
M
PO (18)
J"-
lD 1-0
0
Pl (19) P2 (20) P3 (211 P4 (22) P5 (23)
>P
P6 (24) P7 (25) p>a (4) p:~
>
-
V
"""" """" .......
!
,......,
a·BIT UNIVERSAL TRANSCEIVER/PORT CONTROLLERS
SO~
Sl~ S2~
CLK~
3-state buffer-type outputs
"R~:~
,
C1
r
10
[>
V
(9)
'"
[PORT CONTROLLER)
JEN~
SRG8 9 ~(4/5/6)-
.,
Z9
,
9 ~Cl0/7R
;>1 Zll
.11
Z12
12
13,1
A2~
13
Z15
r
r ;>1
1=0 (4/5/6)100
(21)
(0/2)100 12 (1/3)100
(0/2/4) C>V' o Z13 2/4
1=0 15
(0/2)100
V'1 (0/2/4)C>V' 15
(1/3)100
o
Z16
(20) . - . ... 62
--..J
2/4
17(3/5)
Z17
(18) (17)
(16) (15)
201 202 203 204
1 2 3 4 5 6 7 8 9 0 1 12 13 14
JT, NT PACKAGES 1'J5Rr 13 2'J5Rr 14 2ClK 1~ 101 15 204 102 16 203 103 17 202 104 '19 201 201 19 104 202 20 103 203 21 102 204 22 101 20C 23 1 ClK GNO 24 vce
FH, FN PACKAGES nc 15 nc 2PRE 1~ 16 laC 17 2ClK 101 18 204 102 19 203 103 20 2(l2 104 21 201 22 nc nc 201 23 104 202 24 103 203 25 102 204 26 101 lClK 2~ 27 GNO 28 VCC
JT, NT PACKAGES FH, FN PACKAGES 15 nc 13 08 1 nc 50 16 08 51 14 B8 2 50 17 B8 15 B7 52 3 51 4 52 18 B7 16 B6 Al 19 B6 17 B5 A2 5 Al 20 B5 A3 18 B4 6 A2 21 B4 19 B3 7 A3 A4 22 nc 20 B2 8 nc 8 A5 23 B3 21 B1 9 A4 9 A6 24 B2 10 A7 22 5ER[N 10 A5 25 Bl 11 A8 23 ClK 11 A6 26 5ERIN 12 GNO 24 Vec 12 A7 13 A8 27 elK 14 GNO 28 VCC 1 2 3 4 5 6 7
63 ~1 ... (18) (17) : : (16) 66 (15) 67
A7~ ;>1
(11)
A8~
61
...,.J
Z14
;>1
16,1
A3~ A4~ A5~ A6~
I
'" '"
I'.
(10)
14(3/5)
24-pin 300-mil package
SN54AS877 (JT,FH) SN74AS877 (NT,FN)
104
1 2 3 4 5 6 7 8 9 10 11 12
pin assignments
V'
10
'V~
(9)
......
(16)
(10)
.....
(15)
logic Iymbol t
ARITHMETIC LOGIC UNITSI
SO~
Sl~
4-bit ALU's/Function
S2~
Generators
•
S3..ill....-
Same operating modes as 'AS181A, 'S181A expanded to include status register checks
CARRY TIME 'AS881A 7.5 ns
Cn~
16-BIT ADD TIME 20 ns
SN54AS881 A (JT,FH) SN74AS881 A (NT,FN)
TOTAL POWER 560 mW
80
1(13 104
2 3 4
loe 101 102 103 104
5 6 7 8 9 10 11 12
201 202 203 204 20C
GNO
13 14 15 16 17 18 19 20 21 22 23 24
2PRr 2C 2il4 203 202 201 104 103 102 101 lC VCC
FH, FN PACKAGES nc 15 nc 1PRE 16 2PRE 2 loe 17 2C 3 4 101 18 204 1
5
102
19
6 7
103 104
20 21 22 23 24
8 9 10 11 12 13
nc
14
203 202 201 nc
20C
25 26 27
104 103 102 101 lC
GNO
28
VCC
201 202 203 204
201 202 203 204
pin assignments ALU
JT, NT PACKAGES
0 ....
.r
(0 ... 15) CP 0
(0 ... 15) CG
al
6(P=0) Q (0 ••• 15) CO
~p
::::....!.lli..G' --.i1!L A=B ~Cn+4
-ill...c::. 0
So
2 3 4
AO
5 6 7
[1]
~l!o
[2]
~Fl
1
~F2
3 4
...,
Al~P "Bl~O A2 JlliJ:::. P
1
8 9 10 11 12
CI
I
AO~P
typical performance
TYPE
M...ill.-
102
,jS~
(18) (17)
881 •
(19)
.....
204
FUNCTION GENERATORS
(20)
101
EN
(8)
202 203
(21)
Cl
-"s
(7)
201
SN54ALS880(JT,FH) SN74ALS880 (NT,FN) SN54AS880 (JT,FH) SN74AS880 (NT,FN)
-
(22)
1
2
[4) 82E!!lb 0
[8)
~F3
so Cn M f"o ~1
F2
GNO
T3
15 16 17 18
Jr
19 20 21 22
A3 132 A2
23 24
A=B Cn +4 ~ B3
lh A1
vcc
FH, FN PACKAGES 15 nc BO 16 F3 AO 17 A=B nc
53 52
18 19
~
6 . 7
51
20 21
G
8
nc
9 10 11 12 13 14
Cn M FO Fl F2
25 ,26 27
A3 82 A2 Bl Al
GNO
28
VCC
5
A3~P B3~0
53 52 51
13 14
SO
22 23 24
Cn +4 S3
en
nc
+-'
s:::
Q)
E ::J J...
+-'
en
s:::
en ctS >< Q) I-
t Pin numbers shown on logic symbols are for JT and NT packages only.
nc - no intemal connection.
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
@
Ie MASTER 1983
1011
PRODUCT GUIDE 882
logic Iymbol t
pin ass,ignments
32·BIT LOOK·AHEAD CARRY GENERATORS
•
Directly compatible with 'AS181, 'AS881, and
Po
(3)
GO
(2) (5)
----
~1 (4)
152 (8)
typical performance
'AS882
n (1)
P1
'S181 ALU's
TYPE
C
CARRY
TOTAL
TIME
POWER
8 ns
325mW
SN54AS882 (JT,FH)
~2 (7) (10)
P3
CI CPO CGO CP1 CG1 CP2
C01
CG2 CP3
C03
G4 (13)
--
CG4
Ps
-
CP5
G3 (9) P4 (14)
(1S)
CP4
G5 (15) - CG5 PS (19) ... CPS (18) _ GS CGS (21) _ P7 CP7 (20) _ G7 CG7
885
logic symbol t
C05 C07
• •
Latchable P input ports; power clear
...en E ...en C
SN54AS885 (JT,FH) SN74AS885 (NT ,FN)
Q)
:J :r....
C
en
PLE
00
Q)
01
I-
b
(23) ,
(15) PO P1 (1S) (17) P2 (18) P3 (19) P4 (20) P5 (21) P6 (22) P7 (3) P>O (2) P0 G1 P1 Cn +8 G2 P2 G3 P3
13 14 15 16 17 18 19 20 21 22
11 12
Cn + 16 GND
23 24
02 03
(11 )
G4 P4 G5 15"5 Cn +24 G6 P6 G7 P7 Cn + 32 nc
Vce
10 11 12
P2 G3 P3
15 16 17 18 19 20 21 22 23 24 25 26
13 14
Cn +16 GND
27 28
1 2 3 4 5 6 7 8 9
nc Cn ~O
PO ~1
P1 Cn +8 nc G2
Cn+32
COMP ,_ (1) LA
Choice of logical or arithmetic comparisons
(11)
Cn+8
1 2 3 4 5 6 7 8 9 10
nc G4 P4 G5 P5 Cn +24 G6 nc P6
O POout POout PO P
E
xo
:J ~
+oJ
en c en a:s >< 0>
..
(5)
·· ·• ·
(1 ) X4 X5
IX15
0
4
(64)
·• · · ·•
VIIN)V7 • PR(OUT).
15
x
5
PR V7
{6 :
31
(54)
(9)
... (24) (25)
···
(40)
YO/PRO
V15/PR15 PR16
SN 54ALS 1616 (JD)
~
X4 X3 X2 Xl XO OElS ClKP ClKY YO/PRO Yl/PRl Y2/PR2 Y3/PR3 Y4/PR4 Y5/PR5 Y6/PR6 Y7/PR7 Y8/PR8 Y9/PR9 Yl0/PR10 Y1 1/PRl 1 Yl 2/PRl 2 Yl 3/PRl 3 Y14/PR14 Yl 5/PRl 5 PR16 PR17 PR18 PR19 PR20 PR21 PR22 PR23
33 34 35 36 27 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
PR24 PR25 PR26 PR27 PR28 PR29 PR30 PR31 ClKOP OEMS OVR FT
OP2 GND GND CHGSIGN VCC OPl OPO RND ClKX X15 X14 X13 X12 Xll Xl0 X9 X8 X7 X6 X5
PR31
1~
OVER FLOW V7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 20 31 32
OVR
For chip carrier information, contact the factory.
SN74ALS1616 (JD)
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
1020
© Ie MASTER 1983
PRODUCT GUIDE
1620, 1621, 1622, 1623 pin assignments
logic symbol, 'ALS 1620, 'LS 1620 t
OCTAL BUS TRANSCEIVERS •
'1 ,
Bidirectional bus transceivers
•
SN54ALS1620 SN74ALS1620 SN74ALS1620-1 SN54ALS1621 SN74ALS1621 SN74ALS1621-1 SN54ALS1622 SN74ALS1622 SN74ALS1622-1 SN54ALS1623 SN74ALS1623 SN7 4ALS 1623-1
OUTPUT 3-State 3-State 3-State O-C O-C O-C O-C O-C O-C 3-State 3-State 3-State
1 2 3 4 5 6 7 8 9 10
GAB------1
Low power version of ALS 620, 621, 622, 623 typical performance
TYPE
J. N PACKAGES
GBA ....'1_9_'.........~
MAX MAX SOURCE SINK CURRENT CURRENT -12 8 rnA -15 16 rnA -15 24 rnA 8 rnA N/A 16 rnA N/A 24 rnA N/A 8 rnA N/A 16 rnA N/A N/A 24 rnA -12 8 rnA -15 16 rnA -15 24 rnA
~~..,..:~t!:~=:Jt-~F
' A1'2'
~~'4~1~~--------1-~~
SN54ALS1621 (J,FH) SN54ALS1622 (J,FH) SN54ALS1623 (J,FH)
I
SN74ALS1620 (N,FN) SN74ALS1620-1 (N,FN) SN74ALS1621 (N,FN) SN74ALS1621-1 (N,FN) SN74ALS1622 (N,FN) SN74ALS162'2-1 (N,FN) SN74ALS1623 (N,FN) SN74ALS1623-1 (N,FN)
11 12 13 14 15 16 17 18 19 20
B8 B7 B6 B5 B4 B3 B2 B1 GBA
vee
FH. FN PACKAGES GAB 11 BS 12 B7 A1 A2 13 B6 14 B5 A3 15 B4 5 A4 16 B3 6 A5 7 A6 17 B2 8 A7 18 B1 19 GBA 9 A8 10 GND 20 Vee 1 2 3 4
logic symbol, 'ALS1622, 'LS1622t ~BA ....'1_9_).........::.4) (
GAB"';"1...;,)----1 Al '21
Bl
(31 A2'
logic symbol, 'ALS1621, 'LS1621 t
SN54ALS1620 (J,FH)
GAB A1 A2 A3 A4 A5 A6 A7 A8 GND
~BA ...;,'_19_I.Jo.,,;:IIII)
A3
(41
A4 (51
GAB ...;,'1...;.'----1 A l '_2-4)1. .---1d)1-;;:--l-.....~ Bl
A5 AS
(SI (71
A8 (91
A4 '_5-4)1. .---1r------L-~~ (141 B5 (131
A6(_71. .~~------~~~ BS
logic symbol, 'ALS1623, 'LS1623t GBA (191 GAB (11 f/)
(lSI
+""
Bl
'\71 2'\7
C
Q)
E ::J ~
A3
(41
lSI
+""
B3
CU
(61
(141
(7)
(131
AS A7 (SI
X
B5 BS
(121 B7
AS (91
tPin numbers shown on logic symbols are for J and N packages only. nc
no internal connection.
TEXAS INSTRUMENTS INCOR,PORATED POST OFfiCE BOX 225012 • DALLAS, TEXAS 75265
© Ie MASTER 1983
C f/)
A4 (51
A5
f/)
1021
Q)
.....
PRODUCT GUIDE logic symbol, 'ALS1638t
1638, 1639
G
OCTAL BUS TRANSCEIVERS • •
OIR
Bidirectional bus transceivers "A" bus outputs are opencollector: "B" bus outputs are three-state
A2
'ALS1638-inverting logic
•
'ALS1639-true logic
•
Low power versions of ' ALS638, , ALS639
A3 A4
typical performance
SN54ALS1638 SN74ALS1638 SN74ALS 1638-1 SN54ALS1639 SN74ALS1639 SN74ALS1639-1
DELAY 7 7 7 8 8 .8
ns ns ns ns ns ns
SN54ALS 1638 (J,FH) SN54ALS 1639 (J,FH)
3
MAX MAX SINK SOURCE CURRENT CURRENT -12 mA 8 mA -15 mA 16 rnA -15 rnA 24 rnA -12 rnA 8 rnA -15 mA 16 rnA -15 mA 24 mA
SN74ALS1638 (N,FN) SN74ALS 1639 (N,FN) SN74ALS1638-1 (N,FN) SN74ALS1639-1 (N,FN)
AS A6
B1 (3) (4) (5) (6) (7)
B3
(9)
G OIR
A2 A3
AS A6
11 12 13 14 15 16 17 18 19 20
B8 B7 B6 B5 B4 B3 B2 B1 G
vee
B4 B5 B6
B8
(2)
1 2 3 4 5 6 7 8 9 10
FH. FN PACKAGES OIR ·11 B8 A1 12 B7 A2 13 B6 A3 14 B5 A4 15 B4 A5 16 B3 A6 17 B2 A7 18 B1 A8 19 G GNO 20 vee
(31 (4)
B1 B2 B3 B4
(6) (7)
B5 B6
en c:
A7
B7
E
A8
B8
::::J
OIR A1 A2 A3 A4 AS A6 A7 A8 GNO
(11
A4
Q)
1 2 3 4 5 6 7 8 9 10
logic symbol, ,ALS 1639 t
A1
-....
B2
B7
A7 A8
J. N PACKAGES
(11
A1
•
TYPE
(19)
en c: en
as >
.Octai 19-input latched AND-OR
J..----Q
& 38 X 64
gate array
J-----.;J--- Q
pin assignments
en
C
JT, NT PACKAGES 1
OUTCLK
13
OE
2
lID
14
INLE/PRELOAD
:J
3
I/O
15
Q
en
4
I/O
16
Q
5
I/O
17
Q
en CO >< Q)
6
I/O
1.8
Q
Q)
E
"-
c
J-
7
I/O
19
Q
8
I/O
20
Q
9
I/O
21
Q
10
I/O
22
Q
11
I/O
23
I/O
12
GND
24
VCC
SN54PLT19R8 (JT)
I/O
OC2
11
1C2 20
11
J---J---Q
r-----r-----~~-Q
,..,
r-----r-----~~-
MO M1
Q
t---t---1----l- Q
-
J..--'--- Q
2
8
[> J..--+-- Q
8
SN74PLT19R8 (JT,NT)
TEXAS INSTRUMENTS INCORPORATED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265
1034
©
Ie MASTER 1983
For Key Data On Every Ie On This. Board, The Place To Look Is ...
The Data System Design 7215 i's a single-board controller with pipelined architecture that can simultaneously control Winchester, streaming tape, and floppy drives. Device No. AM25LS2569 AM2910 AM26S02 AM27S35 AM8085 CA3130 2732 8237 DM7438 DM8334 DS75107 F74S132 MC4024 MK4802 PAL16L8 PAL16R6 PAL16R8 7407 74123 74368 74LS02 74LS04 74LS125 74LS138 74LS151 74LS161 74LS166
Description Up-Down Binary Counter with Synchronous Preset Dual Retriggerable Monostable Multivibrator Programmable Schottky Read-Only Memory 12-Bit Microprogram Controller Complete 8-Bit Parallel Central Processing Unit 5-to-16-Volt Single Stash Supply Op Amp 4096 x 8 TTL PROM DMA Controller Quad 2-lnput TTL NAND Buffer 8-Bit Addressable TTL Latch Differential Line Receiver Quad 2-lnput NAND Schmitt-Trigger Dual Voltage-Controlled TTL Multivibrator 2048 x 8 Static NMOS RAM Field Programmable Logic Array Field Programmable Logic Array Field Programmable Logic Array Hex Buffer/Driver Dual Retriggerable Monostable Multivibrator Hex Inverter, 3-State Quad 2-lnput TTL NOR Gate Hex Inverter Quad Gated TTL Buffer, 3-State 3 Line to 8 Line Decoder/Demultiplexer 8-lnput Multiplexer Binary Counter 8-Bit Parallel-In, Serial-Out Shift Register with Clear
Device No. 74LS174. 74LS240 74LS244 74LS257 74LS273 74LS299 74LS365 74LS373 74LS374 74LS393 74LS533 74LS670 74S00 74S03 74S04 74S112 74S151 74S153 74S174 74S175 74S240 74S32 74S51 74S64 74S74 75110
Description Hex D-Type Edge-Triggered Flip-Flop with Clear Octal Bus Driver (Schmitt Trigger) Octal Bus Driver (Schmitt Trigger), Non-Inverting Quad 2-lnput Multiplexer, Non-Inverting Octal D-Type Edge-Triggered Flip-Flop, 3-State 8-Bit Universal Shift Register Hex Buffer, 3-State 8-Bit Latch Octal D-Type Edge-Triggered Flip-Flop, 3-State Dual 4-Bit Binary Counter D-Type 8-Bit Latch 16-Bit (4x4) Register File with Simultaneous Read/Write Quad 2-lnput NAND Gate Quad 2-lnput NAND Gate, Open Collector Hex Inverter Dual "J-K" Negative Edge-Triggered Flip-Flop 8-lnput Multiplexer Dual 4-lnput Multiplexer Hex D-Type Edge-Triggered Flip-Flop with Clear Quad D-Type Edge-Triggered Flip-Flop with Clear Line Driver, Single Ended, 3-State, Inverting Quad 2-lnput OR Gate Dual 2-Wide 2-lnput AND-OR-Invert Gate 4-2-3-2-lnput AND-OR-Invert Gate Dual D-Type Positive Edge-Triggered Flip-Flop Line Driver, Differential, Twisted Pair Level Shifting
Representative list of les on the Data Systems Design 7215 board. Key specifications for all of these les can be found in Ie MASTER.
~rclC: MASTER BE SURE. BEGIN WITH THE Ie MASTER
Wherever you use \\eitek's NMOS 16 x 16's, you'll have 2.5W to spare. Until now, you've had to accept bipolar TTL multipliers and multiplier-accumulators that consume up to 5W of valuable power. Now Weitek introduces the WTL 1010 and WTL 1016. Through advanced NMOS VLSI design, they offer the same high speed processing at just half the power.
WTL 1016 Multiplier WTL 1010 MultiplierAccumulator
Data Size
Speed*
16x16 16x16
140 ns 165 ns
*TestConditions: TA = 0-75° C, Vee = 5V
Power* 2.5W 3.0W
± 5%
Whether you're designing military signal processing systems, graphics systems, digital filters or Fast Fourier Transform processors ... wherever you've used other 16 x 16 multipliers and multiplier - accumulators ... the WTL 1016 and WTL 1010 are pin-for-pin functional
1036
replacements. Power supply requirements of 5V and TTL input/ output levels are compatible, too. For immediate detailed information, phone Weitek now at (408) 727-6625. We'll tell you everything about WTL 1016 and WTL 1010. -The only question you'll have to answer is what to do with the power you'll have to spare.
All Weitek 16x16's are processed to MIL STD 883.
WEITEK Coming on Strong in VLSI 3255 Scott Blvd., Bldg. 2B (408) 727-6625
•
Santa Clara, California 95054 TELEX 171596 AAA Com Suvl ©
Ie MASTER 1983
WEITEK Coming on Strong in VLSI
WTL 1016
Features • • • • • • •
16x16 parallel array multiplier High speed, lOOns typical multiply time Standard NMOS Technology Low Power, 1.5W typical Single 5V supply Standard TTL compatible 110 levels Output latch mode selectable for clocked or transparent operation • Mixed mode two's complement and unsigned magnitude\multiplication • Pin-far-pin functional replacement for TRW MPY16HJ and AMD Am29516 • Processed to MIL STD 883
Description WTL 1016 is an NMOS 16x16 parallel array multiplier characterized by high speed, Block Diagram
16 x 16 ASYNCHRONOUS MULTIPLIER ARRAY
RS
CK ..
16 FT _ _----"M=SP_-+----'
Printed in the U.S.A.
©
high performance, and low power dissipation. A typical multiply time of lOOns, advanced NMOS processing, and a multiplication scheme based on Booth's algorithm, all provide state-of-the-art performance at a power dissipation level 50% less than that of existing bipolar TTL counterparts. A pin-far-pin functional replacement for TRW's MPY16HJ and AMD's Am29516, WTL 1016 operates from a.single 5 volt supply and is compatible with standard TTL logic levels. The architecture of WTL 1016 (see Block Diagram) generates a 32 bit product of two 16 bit data words input to the X and Y data latches. These operands can be specified as either two's complement or unsigned magnitude for mixed or unmixed mode operation. Input lines Cx and Cy control the input data representation. Two seriesconfigured 32 bit registers, at the output of the multiplier array, provide product . format adjustment and two 16 bit latch functions for the most and least significant halves (MSP and LSP) of the product. Feedthrough control line, FT, allows the flexibility of either clocked or asynchronous operation of the MSP and LSP latches. In the asynchronous mode, the product latches are transparent to data flow. The 32 bit product is output on two 16 bit three-state buses. The LSP portion of the product output and the Y input operand share common I/O pins. The WTL 1016 finds applications in a variety of digital signal processing functions and upgrades to mini and microcomputer systems. In the area of digital signal processing, applications include digital filtering, FFT, floating point, image/video, and speech (recognition and synthesis) processing.
Copyright 1982, WEITEK Corporation, All Rights Reserved.
Ie MASTER 1983
1037
WTL1516/1517
WEITEK
ADVANCED DATA
Coming on Strong in VLSI
Features
Description
• 16 X 16 parallel array multiplier • High-speed, 90 ns typical muitiply time • Standard NMOS technology (Icc = 230 mA typical)
The WTL1516/1517 are 16 X 16 parallel array, high-speed multipliers (Tm =90 ns typical) fabricated using NMOS silicon gate technology. J3y use of a modified Booths algorithm and advanced NMOS VLSI design processes, these multipliers provide a performance comparable to existing bipolar TTL multipliers at less than half the power consumption (Icc = 230 mA typical). The WTL1516/1517 also use standard TTL power supplies of 5V. The multipliers have input and output latches which can be operated in a clocked mode or transparent mode. Applications of the multipliers include a variety of digital signal processing systems including floating point processors, FFT processors, image/ video processors, speech recognition and synthesis, digital filtering; etc. Input data are accepted in the form of 16-bit two's complement and unsigned magnitude in mixed or unmixed mode. In the WTL1516 the X, Y, MSP and LSP registers have independent clocks (CKx, CKy, CKM, CKd. The output multiplexer control (MSPSEL) uses a pin which is a supply ground in the TRW MPY16HJ and WTL1016. When this control is LOW the function is that of the MPY16HJ and WTL1016, thus allowing full compatibility. The WTL1517 differs in that it has a single clock input (CK) and three register enables (ENX, ENY, ENP) for the two input registers and the entire product. This allows use of the WTL1517 in microprogrammed syst.ems. In both devices data are entered into the registers on the positive edge of the clock.
• Low power • WTL1517 optimized for microprogramming single clock with register enables • Standard TTL power 5V supply and input! output levels • Input/output latches selectable for clocked or transparent mode of operation • Mixed mode two's complement and unsigned magnitude multiplication • . WTL1516 pin-for-pin functional replacement for TRW MPY16HL AMD 29516/29517 and WTL1016 • WTL1517 pin-for-pin functional replacement for AMD 29517
Logic Diagrams CII'-t-+-t---+-t-----' ......
t'~+-+-_-+++_----'
fiii_~......
CII,--+-i~
FA
F1
MSPSEl
WTL1516
WTL1517
w _ _ _--../
3255 Scott Boulevard, Bldg. 2B • Santa Clara, CA 95050 • Telephone (408) 727-6625 • Telex 171596 AAA Com Suvl © Copyright 1982, WEITEK Corporation. All rights reserved.
1038
©
/ Ie MASTER 1983
WTL2516/2517 ADVANCED DATA
WEITEK
Coming on Strong in VLSI
Description
Features • • • • • •
• •
•
•
•
16 X 16 parallel array multiplier 200 ns typical multiply time NMOS technology Low power, 0.6W typical Low cost plastic package WTL2517 optimized for microprogramming single clock with register enables Standard TTL power 5V supply and input/output levels Input/output latches selectable for clocked or transparent· mode of operation Mixed mode two's complement and unsigned magnitude. multiplication WTL2516 pin-for-pin functional replacement for TRW MPY16HJ, AMD 29516/29517 and WTL1016 WTL2517 pin-for-pin functional replacement for AMD 29517
The WTL2516/2517 are 16 X 16 parallel array, high-speed multipliers (Tm = 200 ns typical) fabricated using NMOS silicon gate technology. By use of a modified Booths algorithm and advanced NMOS VLSI design processes, these multipli. ers provide a performance comparable to existing bipolar TTL multipliers at less than 1/4 the power consumption (Icc =120 mA typical). The WTL2516/2517 also use standard TTL power supplies of 5V. The multipliers have input and output latches which can be operated in a clocked m.ode or transparent mode. The multipliers are particularly useful in low to moderate performance, low cost, digital computationally intensive applications. These include low cost, relatively low resolution graphics functions involving 3D image rotation such as video games, small business 1desk-top computers and low cost graphics displays. Other functions include voice frequency, digital' filtering and processing for modems, speech synthesis, speech recognition and consumer audio. Input data are accepted in the form of 16-bit two's complement and unsigned magnitude in mixed or unmixed mode. In the WTL2516 the X, Y, MSP and LSP registers have independent clocks (CKx, CKy, CKM , CKL ). The output multiplexer control (MSPSEL) uses a pin which is a supply ground i~ the TRW MPY16HJ and 'WTL1016. When this control is LOW the function is that of the MPY16HJ and WTL1016, thus allowing full compatibility. The WTL2517 differs in that it has a single clock input (CK) and three register enables (ENX, ENY, ENP) for the two input registers and the entire product. This allows use of the WTL2517 in microprogrammed systems. In both devices data are entered into the registers on the positive edge of the clock.
Logic Diagrams CJI--t-~--+-+----' CJI~+--+-~_
MSPsEl
WTL2516
WTL2517
w-----.'\l
3255 Scott Bouleyard, Bldg. 2B • Santa Clara, CA 95050 • Telephone (408) 727-6625 • Telex 171596 AAA Com Suvl © Copyright 1982, WEITEK Corporation. All rights reserved.
© Ie MASTER
1983
1039
WEITEK
WTL1024 ADVANCED DATA
Coming on Strong in VLSI Features
Description
• 24 X 24 bit parallel multiplication with double precision output.
The WTL1024 is a 24 X 24 operand input, 48-bit product output parallel multiplier, fabricated using advanced NMOS VLSI design processes to provide high speed (Tm = 220 ns typical) at low power (Icc = 300 rnA typical). Pipelined architecture is used for ease of use in microcomputer based systems with operands and products loaded and unloaded 24 bits at a time. Inputs and outputs are latched with inputs having a separate chip select and outputs having three state capability. Separate operand data format controls are provided by TCX and TCY for classification of operands as two's complement or sign magnitude data. F1 and F2 are output flag signals derived from the most significant bits of the product register. The product can be shifted left from 0 to 3 bit positions by means of a pair of shift con': trol inputs, SHA and SHB. The output flag signals, F1 and F2, and shift control inputs, SHA and SHB, can be used in conjunction with a standard TTL ALU to provide exponent data normalization for floating point operations. Rounding of the product to 24 bits is under control of the RND control input and is performed after shifting. Flag F3 indicates when overflow occurs in the round operation. The two halves of the 48-bit product (MSP and LSP) are selected for output by the SELP output multiplexer control. Output enable signal OE controls three state. The WTL1024 is useful in integer operations such as in 16-bit computer/microcomputer data environment where recursive computations often require the ability to handle extended product operations. For floating point data multiplication operations, the WTL1024 can provide mantissa multiplication in conjunction with external readily available LSI circuits such as the 74S381 ALU and 2901 bit slice, etc., for exponent adjust.
• Pipelined architecture, with separate 24-bit wide inputs and outputs. • High-speed, Tm = 220 ns typical. • Low power NMOS fabrication, Icc = 300 rnA typical. • TTL compatible input! output. • Two's complement, unsigned magnitude selectable modes with mixed mode operation. • Product left shift up to three bits. • Product round with overflow flag. • Useful in 16-bit computer systems for extended integer arithmetic operations. • Provides floating point 24-bit mantissa multiply with external standard TTL for exponent adjust.
~ Q)
::
~ Logic Diagram CS CK,
Fl.F2_-+--~
....
~---
SHA. S H B - - - + - - - - - I
FJ-----{
SElP-------I
WTL1024
ll'E------
Ie MASTER
x
1983
MASTER SELECTION GUIDE
Software Support Programs Cross Assembler
x
High Level Language
Debug
Clagnostlc
Edit
X
X
X
x
x
x
x.
x
x
x
x
Alternate Sources
Model
Source
Hughes
COP1802BC
RCA
Hughes
COP1802C
RCA
(1459)
COP1802M
RCA
(1459)
Comments
Line
(1459)
x
x
S-bit counter on board.
COP1S04AC
RCA
(1461)
x
x
S-bit counter on board.
COP1805AC
RCA
(1461)
x
x
8-bit counter-timer on-board.
COP1805C
RCA
(1461)
x
x
8-bit counter on board.
COP1806AC
RCA
(1461)
x
x
8-bit counter-timer on-board.
COP1806C
RCA
(1461)
x
x
Motorola
Single chip CMOS CPU, 16 programmable bi-directional liD lines.
COP6805E2
RCA
x
x
Motorola
Single chip CMOS CPU, 20 programmable bi-directional liD lines, self check mode.
COP6805F2
RCA
x
x
Motorola
Single chip CMOS CPU, 32 programmable bi-directional liD lines, self check mode.
COP6805G2
RCA
Optional supply voltage -12,5.
PPS-8
Rockwell
Optional supply voltage -12,5.
PPS-8/2
Rockwell
Bus compatible with 6800.
R6500
Rockwell
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x x
x x
x x
MOS Technology, Synertek
Mostek, Zilog
R6500/1
Rockwell
On board USART, two 16 bit counters, 32 liD lines.
R6500/11
Rockwell
On board USART, two 16 bit counters, 56 liD lines.
R6500/12 .
Rockwell
On board USART, two 16 bit counters, 32 liD lines.
R6500/13
Rockwell
Bus compatible with 6800, 68000.
R6502
Rockwell
R6511
Rockwell
Enhanced R6502.
R6511Q
Rockwell
4 MHz optional.
ZSO/A
SGS
8080A software compatible.
LHOO80
Sharp
Any of the general purpose registers can be used as an index register.
2650A
Signetics
Any of the general purpose registers can be used as an index register.
x x
Software compatible with R6502, 32 liD lines. Other mOdels available with various features.
10
20
Q)
"0 2650A-1
Signetics
::J
Intel
8021
Signetics
(9
AMD, Fujitsu, Intel, NEC
8035
Signetics
C
8039
Signetics
AMD, Fujitsu, Intel, NEC-Micro
8040
Signetics
8048
Signetics
8049
Signetics
8050
Signetics
8X300
Signetics
8X305
Signetics
0 ~
U Q)
30
Q)
(f) 10..-
x
Bipolar with fixed Instructions.
x
x
x
x
x
AMD National, Fairchild, Eurotechnique 8 bit version of F16032 16 bit CPU. 32 bit internal architecture. Software upward compatible with F16016 and F16032.
x
x
x
Q) ~
en
CO ~
SY16008
Synertek
DMA based on a stopping CPU, address bus connections are not 3 state.
SY6500
Sya.rt.k (1526)
GTE,CSG
On chip clock,lRQ, NMI, RYD bus compatible with MC680D.
SY6502
Synertek
GTE Micro, CSG
On chip clock, IRQ, NMI, bus compatible with MC6800.
SY6503
Synertek
GTE Micro, CSG
On chip clock, IRQ bus compatible with MC680D.
SY6504
Synertek
GTE Micro, CSG
On chip clock, IRQ, RYD bus compatible with MC6800.
SY6505
Synertek
GTE Micro, CSG
On chip clock, IRQ bus compatible with MC6800.
SY6506
Synertek
GTE Micro, CSG
On chip clock, RYD bus compatible with MC6800.
SY6507
Synertek
GTE Micro, CSG
External clock,lRQ, NMI, RYO, bus compatible with MC6800.
SY6512
Synertek
GTE Micro, CSG
External clock, IRQ, NMI, bus compatible with MC6800.
SY6513
Synertek
MOSTechnology, Rockwell
~.
~ 40
Ie MASTER
1983
~
~e:
i=:::
Bald 'lcllndlcallSaddlllalil dill Is provided aD Ibl PIUI aalld.
~
~ !:.
1073
Ie MASTER MICROPROCESSORS (Cont'd) General
Data Word Size. or Structure
(For uC Only)
Supply Voltage (V)
Instruction Word Size (bits)
NMOS NMOS NMOS
5
8,16,32
5
8,16,32
5
8,16,24
126K
128
HMOS HMOS
5
8,16,32
120K
8
5
8,16,32
120K
8
NMOS
5
8,16,32
120K
8
NMOS NMOS NMOS NMOS
5
8,16,32
5
8,16,32
5
8,16,32
5
8,16,32
NMOS NMOS
5 5
8
NMOS' NMOS NMOS NMOS CMOS NMOS SMOS
8
Directly Address. Memory (Words)
Clock Freq. (MHz! Phases)
Interrupts
Levels
8K
2/1
yes
vectored
4K
2/1
yes
vectored
2K
8/1
yes
vectored
128
2K
11
yes
vectored
128
2K
11
yes
vectored
128
11
yes
vectored
120K
128
11
yes
vectored
128K
128
11
yes
vectored
128K
128
11
yes
vectored
120K
128
4K
yes
vectored
8,16,32
120K
128
4K
yes
vectored
8,16,32
120K
128
yes
vectored
5
8,16,32
120K
128
yes
vectored
5
8,16,32
120K
128
yes
vectored
5
8,16,32
120K
128
yes
vectored
5
8,16,32
128K
144
5
8,16,32
120K
128
2K
yes
vectored
5
8,16,32
6K
64K
lK
yes
vectored
5
8
64K
128
SMOS
5
8
64K
128
8
SMOS
5
8
64K
8
SMOS
5
8
8
SMOS
5
8
NMOS
8 8
8 8 8 8
8 8 8 8 8 8 8 8 8 8 8
Q)
Hardware Support
Architecture
Process Type
On-Chip RAM (bytes)
On-Chip (P)ROM (bytes)
Prototyping System
'-
InCircuit Emulator
x
x
8/1
x
x
2K
5/1
x
x
128
4K
5/1
x
x
64K
128
4K
8/1
yes
x
x
8
64K
128
4K
5/1
yes
x
x
4.5-10.5
8
64K
128
2K
4/1
yes
x
x
NMOS
5
8-16
4K
64
6/0
yes
vectored
x
x
NMOS NMOS
5
8-16
4K
128
5
8-16
4K
64
x x
x x
NMOS NMOS NMOS CMOS CMOS NMOS NMOS NMOS NMOS NMOS NMOS NMOS
5
8-16
4K
5
8,16,24
65K
x x x x x x x x x x x
x x x x x x x x x x x
-
11
"0 ::J
(!J C
0
...... 0
Q) Q)
en '-
Q)
......
8
lK
11/0
yes
vectored
610
yes
vectored
en (U
~
8 8 8
~
~
~
~ re:
r.
(it
~
==
8 8 8 8 8 8 8 8 8
1074
2K
11/0
yes
vectored
3/0
yes
vectored
5/0
yes
vectored
11/0
yes
vectored
11/0
yes
vectored
5
8,16,24
65K
5
8-16
4K
128
5
8-16
4K
128
5,12
16
65K
3.3/4
std.
4
5
8-32
65K
2.5/1
yes
vectored
5
8-32
65K
4/1
yes
vectored
5
8-32
65K
6/1
yes
vectored
5
8-32
65K
8/1
yes
vectored
5
8-32
65K
2.5/1
yes
vectored
5
8-32
500K
25/2
yes
vectored
2K
~
Ie MASTER
1983
MASTER SELECTION GUIDE
Software Support Programs Cross Assembier
High Level Language
Debug
Dlagnostlc
Edit
Alternate Sources
Comments
Model
Source
GTE Micro, CSG
External clock, IRa, bus compatible with MC6800.
SY6514
Synertek Synertek
GTE Micro, CSG x
x
x
Line
External clock, IRa, RYD, bus compatible with MC6S00.
SY6515
4 external interrupts, on-Chip UART, 2 counter/timers, 32 flO lines. 64-pin prototype version also Zbus compatible.
Z8
Synertek
SGS, Sharp, Zilog
On-chip UART, 2 counter/timers, 32 flO lines.
Z8601
Symtlk (1540)
SGS, Sharp, Zilog
On-Chip UART, 2 counter/timers, 32 flO lines, faster version of Z8601.
Z8601A
Syurtlk (1540)
GTE Micro
Development device simular to Z8601 but has memory control and interface lines for 4K bytes of memory.
Z8602
SY·lrtlk (1541)
GTE Micro
Same as Z8601 but faster CPU speed.
Z8602A
SY·lrtlk (1541)
SGS, Sharp, Zilog, GTE Micro
Photo typing Z8601 with socket for external 2716 EPROM.
Z8603
SYllrtlk (1542)
SGS, Sharp, Zilog, GTE Micro
Same as Z8603 but faster CPU speed.
Z8603A
SY·lrtlk (1542)
SGS, Sharp, Zilog, GTE Micro
On chip UART, 2 programmable counter/timers, 32110 lines. Simular toZ8601.
Z8611
SY·lrtlk (1543) 10
SGS, Sharp, Zilog, GTE Micro
Same as Z8611 but faster CPU speed.
Z8611A
SYllrtlk (1543)
SGS, Sharp, Zilog, GTE Micro
Development device simular to Z8611 but has memory counter and interface lines for 4K bytes of memory.
Z8612
SY·lrtlk (1544)
SGS, Sharp, Zilog, GTE Micro
Same as Z8612 but has faster CPU speed.
Z8612A
SY·lrtlt (1544)
SGS, Sharp, Zilog, GTE Micro
Prototyping Z8611 with socket for external 2716 EPROM.
Z8613
Syalrtlk (1545)
SGS, Sharp, Zilog, GTE Micro
Same as Z8613 but faster CPU speed.
Z8613A
Syaartek (1545)
Zilog
ROMless version of Z8601.
Z8681
Syalrtlt (1546)
x
CMOS version of Z8601.
Z86C01
SYllrtlk (1548)
Subset of Z8 instruction set. Programmable 8 bit counter/timer.
Z8S
Synertek
x
8 bit timer/event counter, optional memory expansion modules available to complement on chip ROM.
TMS7000
TI
(1556)
x
8 bit timer/event counter, optional memory expansion modules available to complement on chip ROM.
TMS7020
TI
(1556) 20
x
8 bit timer/event counter, optional memory expansion modules available to complement on chip ROM.
TMS7040
TI
(1556)
x
On chip UART serial port, 2 8-bit timer/counters, optional memory expansion modules available to complement on chip ROM.
TMS7041
TI
(1556)
""C
8 bit timer/event counter, 4K EPROM, optional memory expansion modules available to complement on chip EPROM.
TMS70E40
TI
(1556)
CJ
x
x
Low power: 35 MW, power down feature, 8-bit interval timer/event counter, optional memory expansion module available to complement on-Chip ROM.
Q)
::J C TMS70l22
TI
x
X
x
AMD, Intel, NEC-Micro, Fujitsu, Signetics
TMP8035
Toshiba
x
x
x
NEC-Micro, Fujitsu, Signetics
TMP8039
Toshiba
x
x
x
AMD, Intel, NEC-Micro, Fujitsu, Signetics
TMP8048
Toshiba
--00 +-'
Q)
-Q)
en ~
x
x
x
NEC-Micro, Fujitsu, Signetics
8748 has U.V. PROM.
en
TMP8049
Toshiba
x
x
x
x
x
AMD, Mitsubishi, NEC-Mlcro
TMP8085A
Toshiba
x
x
x
x
x
AMD, Mitsubishi, NEC-Micro
TMP8085A-2
Toshiba
x
x
x
x
NEC-Micro, National, OKI
TMP80C39
Toshiba
x
x
x
x
NEC-Micro, National, OKI
TMP80C49
Toshiba
x
x
Q) +-'
8080A compatible with multiplexed bus operation.
ct:S ~ 30 ~
[-:
Can cross assemble and simulate with DEC PDP-H.
CP1600
Western
x
x
x
x
x
Mostek, NEC-Mlcro, SGS, Sharp
8080A software compatible.
Z80
ZIIog
(1581)
x
x
x
x
x
Mostek, NEC-Micro, SGS, Sharp
8080A software compatible.
Z80A
ZIIog
(1581)
x
x
x
x
x
Mostek, NEC-Micro, SGS, Sharp
8080A software compatible.
Z80B
ZIIog
(1581)
x
x
x
x
x
Mostek, NEC-Mlcro, SGS, Sharp
High speed version of Z80.
Z80H
ZIIog
(1581)
x
x
x
x
x
Mostek, NEC-Mlcro, SGS, Sharp
low power version of Z80, slower speeds available.
Z80l
ZIIog
(1581)
The first of a series of processors. The devices ar~ binary code compatible with the Z80 CPU. 8 and 16 bit multiple and divide.
Z8108
ZIIog
(1584)
Bold fluladlcltlS IddltJoaal dltlls rowldld on thl PI DI noted. (C)
Ie MASTER
1983
1075
''..-
~
'.-
Ie MASTER
MICROPROCESSORS (Cont'd) General
(For uC Only)
Process Type
Supply Voltage (V)
Instructlon Word Size (bits)
Directly Address. Memory (Words)
On-Chip RAM (bytes)
On-Chip (P)ROM (bytes)
Clock Freq. (MHz! Phases)
Interrupts
Levels
8
NMOS
5
8,16,24
124K
128
2K
12/1
yes
vectored
x
x
8
NMOS
5
8,16,24
124K
128
12/1
yes
vectored
x
x
8
NMOS
5
8,16,24
124K
128
12/1
yes
vectored
x
x
x x
x x
Data Word Size, or Structure
4K
Prototyping System
InCircuit Emulator
8
NMOS
5
8-24
124K
128
12/1
yes
vectored
8
NMOS
5
8-24
124K
128
12/1
yes
vectored
8
NMOS
5
8-24
124K
128
12/1
yes
vectored
8
NMOS
5
8-24
124K
128
12/1
yes
vectored
x x
x x
128
x
x
8
NMOS
5
8-24
128K
12/1
yes
vectored
8116
HMOS
5
8-48
1M
5/1
yes
see comments
12
CMOS
5
12
64K
5/0
yes
vectored
12
CMOS
5
12
32K
4/0
yes
vectored 1
12
4K
4/0
std.
12,24
4K
1.2/0
yes
5
8,16
User defined
10/1
optional
vectored
5
8-48
1M
10/1
yes
vectored
NMOS
5
16,32
48M
4/1
yes
vectored
16
NMOS
5
16,32
384K
4/1
yes
vectored
16
HMOS
5
8-48
1M
8/1
yes
vectored
16
HMOS
5
8-48
16M
8/1
yes
vectored
16
HMOS
5
8-48
1M
10/1
yes
vectored
16
HMOS
5
8-48
1M
10/1
yes
vectored
16
CMOS
5
16-48
65K
3/1
yes
vectored
16
NMOS
5,12
16-48
65K
3.3/4
yes
vectored
16
CMOS
5
16-48
65K
5/1
yes
vectored
16
NMOS
5,12
16
32K
8.3/2
yes
vectored
16
NMOS
5
8-200
64K
6/2
yes
vectored
12
CMOS
5-10
12
PMOS
5
16
TIL
16
HMOS
16
Q)
"C
Hardware Support
Architecture
x x x x x
x x
::J
C.9 C
o +"'"
()
Q)
128
2K
Q)
en
x
x
16
NMOS
5
8-200
16M
6/2
yes
vectored
16
13L
5
16
32K
10/0
yes
vectored
x
16
13L
5
16
64
10
yes
vectored
x
x
16
NMOS
5
8-48
1M
8/1
yes
vectored
x
x
16
NMOS
5
8-48
1M
10/1
yes
vectored
x
x
"
1076
e Ie MASTER
1983
MASTER SELECTION GUIDE
Software Support Programs Cross Assembier
x
High Level Language
Debug
Dlagnostle
Edit
Comments
Model
Source
x
x
x
Synertek, SGS, Sharp, GTE Micro
On-chip UART, and 2 counter/timers. 4 external interrupts, 32 110 lines.
Z8601-MCU
ZIIog
(1596)
Synertek, SGS, Sharp, GTE Micro
Program storage in separate 2716 EPROM, 4 external interrupts. Has piggyback 24-pin socket to program memory.
x
Alternate Sources
Line
x
x
x
x
x
Z8603-MCU
ZIIog
(1596)
x
x
x
x
x
Synertek, SGS, Sharp, GTE Micro
On-Chip UART and 3 counterltimers, 32 I/O lines. 4 external interrupts.
Z8611-MCU
ZIIog
(1597)
x
x
x
x
x
Synertek, SGS, Sharp, GTE Micro
64 pin development version. 4 external interrupts. ROMless Z8601.
Z8612-MCU
ZIIog
(1597)
x
x
x
x
x
Synertek, SGS, Sharp, GTE Micro
ROMless Z8. Has piggyback 24-pin socket for direct interface to program memory. Permits program storage in separate EPROMs.
Z8613-MCU
ZIIog
(1597)
x
x
x
x
x
Single chip basic interpreter with Tiny Basic in ROM.
Z8671-MCU
ZIIog
(1597)
x
x
x
x
x
Single chip basic interpreter with Tiny Basic in ROM, power down bonding option.
Z8675-MCU
Zilog
x
x
x
x
x
Synertek
ROMlessZ8.
Z8681-MCU
ZIIog
Intel
I/O processor, concentrator and intelligent DMA controller. 4 special purpose input interrupts, 2 DMA requests interrups, 2 general purpose interrupt outputs.
AM8089
AMD
PDP-8 software compatible, high performance upgrade of HM6100 CPU.
HD6120
Harris 10 (669,1333,1341 )
PDP-8 instruction set compatible Fortrar, Basic, Focal, Pascal, available from outside vendors.
HM6100
Harris
Executive PDP-8, instruction set.
IM6100
Intersil
TLCS-12A
Toshiba
Interrupt requires AM2914 interrupt controller chip.
AM29116
AMD
Intel, Fujitsu
Same part as iAPX86/10.
AM8086
AMD
, Intersil x
x
x
x
x
x
..
HarriS
x
(1597)
(1224)
x
x
x
x
x
Zilog
Segmented, single step mode.
AMZ8001
AMD
x
x
x
x
x
Zilog
Non-segmented, single step mode.
AMZ8002
AMD
Intel
High performance-provides two times the performance of iAPX86. Upward compatible with iAPX86/88 software. 10 additional instruction types.
iAPX186
AMD
Intel
High performance 80286 processor with memory management. Upward compatible with iAPX86, 88 and iAPX 186 software.
iAPX286
AMD
(1231)
"'C ::J
Mitsubishi, NEC-Micro, Mostek, Siemens, Intel, Fujitsu
Same part as AM8086.
iAPX86/10
AMD
(1229) 20
(!J
Intel
Two chip set using iAPX86/10 plus AM8087 numeric data processor.
iAPX86/20
AND
(1229)
TI
Comments same as S99C91. Protyping chip for AMI Alterable Microcomputer Family.
AMUIPR
AMI
(1251)
TI
Instructions include hardware multiply, divide, software compatible with 990 minicomputers.
S9900
AMI
TI
Development tools available from Gould-Millennium. TMS9900 compatible.
S99C91
AMI
Software compatible with NOVA 3.
mN602
Data Gen
x
x
x
(1231)
C
o
(1252)
National, Synertek, Eurotechnique All features of F16032 plus 8080 code software compatible, 16 bit interval architecture.
F16016
Fairchild
National, Synertek, Eurotechnique 32 bit interval architecture, software multiply and divide.
F16032
Fllrcblld (1298)
x
x
x
x
x
Microcomputer performance. Multifunction instructions process several steps e.g. add/shift/check and skip.
F9440
Fairchild
x
x
x
x
x
Second generation Microframe microprocessor with enhanced instructions improved speed and multiprocessing capabilities using 13L bipolar tech. 16x16 bit multiply in 3.5!,sec.
F9445
Fllrcblld (1285,1288)
x
x
x
x
Mitsubishi, Mostek, Intel, Siemens, Assembly language compatible with 8080/8085. NEC-Micro
MBL8086
Flillsu
(1305) 30
x
x
x
x
Mitsubishi, Mostek, Intel, Siemens, Assembly language compatible with 8080/8085. NEC-Micro
MBL8086-1
Flillsu
(1305)
Ie MASTER
1983
...... () Q) Q)
en
Bold flCI IndlcltlS addlllonal dati Is provided on thl plgl notad.
"C
«
r-------CX
J.LC
Mc
o
'INTERNAL
1204
MUX &
POL
CT
MPR-060
@)
Ie MASTER 1983
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am290S Quad 2-lnput OC Bus Transceiver (with 3-State Receiver)
Am2906 Quad 2-lnput OC Bus Transceiver (with Parity)
• • • • • • • •
• • • • • • • • •
Quad High-Speed LSI Bus Transceiver Open-Collector Bus Driver 2-Port Input to 0- Type Register on Driver Bus Driver Output Sinks 100mA at O.BV (Max) Driver Clock to Bus in 21 ns (Typ) Receiver Has Output Latch for Pipeline Operation 3-State Receiver Outputs Sink 12mA 24-Pin DIP
Quad High-Speed LSI Bus Transceiver Open-Collector Bus Driver 2-Port Input to 0- Type Register on Driver Bus Driver Output Sinks 100mA at O.BV (Max) Internal Odd 4-Bit Parity Checker/Generator Driver Clock to Bus in 21 ns (Typ) Receiver Has Output Latch for Pipeline Operation Receiver Outputs Sink 12mA 24-Pin DIP
Am290S*
SELECT
D~~6~~
DRCP
BUS ENABLE
BE
'--------
---I-...J
I
STACK POINTER
D AND R
4% g~~!'i9~~D I I
ONLY
4X4FILE
I
DIRECT INPUTS
D
I
CLOCK
>----4~~....,
D
AR
So>--_...J MULTIPLEXER S1>---~
fP:.m2909oNi.
'l~:~
I
I'PC MICRDPROGRAM COUNTER REGISTER
en
Yl
Q)
o os:
OR 1 > - - i - - - + - - ,
Q)
o
L.:0~ _>-_-........- ,
o L.
o
:E 'U Q)
o
c: CU
>
'U
«
MPR-093
© Ie MASTER 1983
1207
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2910 12-Bit Microprogram Controller • Output Enable Controls for Three Branch-Address Sources Built-in decoder function enables external devices onto branch address bus, eliminates external decoder • All Registers Positive Edge-Triggered Simplifies timing problems Eliminates long set-up times • Fast Control from Condition Input Delay from condition code input to address output 21 ns (Typ) • 166ns (Max) for Conditional Jump Sequence (includes delay through PROM and registers) • 40-Pin DIP
• 12 Bits Wide Address up to 4096 words of microcode with one chip All internal elements a full 12 bits wide • Internal Loop Counter Presettable 12-bit down-counter for repeating instructions and counting loop iterations • Four Address Sources Microprogram Address can be selected from microprogram counter, branch address bus, 5-level push/pop stack or internal holding regJster • 16 Powerful Microinstructions Executes 16 sequence control instructions, most conditional. on external condition input and/or state of internal loop counter
RLD
C>----i
en
Q) (,)
> Q)
0
0
«
11
g
a:
0 0
"L.
(,)
cc cern
~
CI
Z 0
;:
"'C
0« :J-l
Q) (,)
a:
0..
Ii; !;
c
as
>
"'C
«
OE
Pi:
MAP
VEEf Vi
==>
12-Bit Data Path Control Path
MPR-106
1208
© Ie MASTER 1983
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2912 Quad Bus Transceiver • • • • • • •
Input to Bus Is Inverting Quad High-Speed Open-Collector Bus Transceiver Driver Outputs Sink 100mA at O.SV (Max) Bus Compatible with Am2905, Am2906, Am2907 Enable to Bus in 14ns (Typ) PNP Inputs to Reduce Input Loading 16-Pin DIP
BLI·D6l
Am2913 Priority Interrupt Expander • Encodes Eight Lines to 3-Line Binary • Expands Use of Am2914 • Cascadable
• Input to Output in 17ns (Typ) • Gated 3-State Output • 20-Pin DIP
en
Q)
0>0 Q)
0 0 0
10-
~ "C
u
«
°Am2916A logic diagram is similar to Am2915A except that
© Ie MA~TER 1983
BE input is replaced by parity output.
MPR-161
1211
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2917 A Quad 3-State Bus Transceiver (with Interface Logic) • • • • • •
Quad High-Speed LSI Bus Transceiver 3-State Bus Driver D-Type Register on Driver Bus Driver Output Sinks 48mA at O.SV (Max) Internal Odd 4-Bit Parity Checker/Generator Receiver Has Output Latch for Pipeline Operation
• Driver Clock to Bus in 21ns (Typ) • 3-State Receiver Outputs Sink 12mA • V OH = 3.SV (Min) for Direct MOS Microprocessor Interface • 20-Pin DIP
(J) Q) (.)
"> Q)
o
DRIVER CLOCK
DRCP
o
~
~~!BLE
(.)
~
R
ALE
RECEIVER LATCH ENABLE
'U Q) (.)
c
MPR-177
«S
> 'U
«
1212
@
Ie
MASTER 1983
Advanced Micro Devices ~. ..
BIPOLAR MICROPROCESSOR PRODUCTS Am2918/Am29LS18 Quad D Registers (with Standard and 3-State Outputs)
STANDARD OUTPUTS DO------i
Four D-Type Flip-Flops Four Standard Totem-Pole Outputs Four 3-State Outputs Clock to Output Time (Typ) 8.5ns for Am2918 18ns for Am29LS18 • 16-Pin DIP
o~--------------OO
• • • •
o THREE-STATE OUTPUTS
Ot-+----...J
CP CLOCK
DE
MPR-183
OUTPUT CONTROL
Am2919 Quad Register (with Dual3-State Outputs) • • • • • •
Two Sets of 3-State Outputs Four D-Type Flip-Flops Polarity Control on One Set of Outputs Buffered Common Clock Enable Buffered Common Asynchronous Clear Separate Buffered Common Output Enable for each Set of Outputs • Clock to Output in 22ns (Typ) • 20-Pin DIP
UJ Q) ()
oS; Q)
o
o
~
()
~ "'0
Q) ()
c
ca >
"'0
«
MPR-196
© Ie MASTER 1983
E ENABLE
CP CLOCK
CDi CLEAR
POL POLARITY
or=w
OE-Y OUTPUT ENABLE
1213
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2920 Octal D-Type Flip-Flop (with Clear, Clock Enable and 3-State Control) • • • •
B~ffered Common Clock Enable Input Buffered Common Asynchronous Clear Input 3-State Outputs a-Bit High-Speed Parallel Register with Positive Edge-Triggered, D-Type Flip-Flops
• Clock to Output in 24ns (Typ) • 22-Pin DIP
MPR-201
Am2921 One-of-Eight Decoder (with 3-State Outputs and Polarity Control) • 3-State Decoder Outputs • Buffered Common Output Polarity Control • Inverting and Non-inverting Enable Inputs
UJ Q) ()
• Input to Output in 20ns (Typ) • 20-Pin DIP
> Q) Cl
o
~
()
~ "0
A
Q) ()
c
E, - - - - - - - - '....._.
>.
~-----~
CO
>>-~Hr~+++_~~-~~~+++_~~--~H__,
"0
«
POL POLARITY
OUTPUT { CONTROL
DE, DE2 -----,&..-, MPR-207
1214
©
IC MASTER 1983
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2922 8-lnput Multiplexer (with Control Register) • High-Speed a-Input Multiplexer • On-Chip Multiplexer Select and Polarity Control Register • Output Polarity Control for Inverting or Non-inverting Output • Common Register Enable • Asynchronous Register Clear • 3-State Output for Exp,ansion • Clock to Output in 21 ns (Typ) • 20-Pin DIP
MPR-213
Am2923 8-lnput Multiplexer
-4>
• Switches One of Eight Inputs to Two Complementary Outputs • Input to Output in 13ns (Typ) • 3-State Output for Bus Organized Systems • 16-Pin DIP
-
H. H
>-en
4. d )-
0,
>--I..
=W-
(J) (,)
os: (J)
~-
0 0
--t.
:I...
H
=l~ »)o-~
(,) w~'"
~ "0 (J) (,)
H.
c cu >
t:i ) -
H.
"0
«
t:j ) - - - -
4-
= i )----
.... v
....
....
BU-069
© Ie IVIASTER 1983
---4>
-'" -v
.r=·v
¢
1215
....
~ I'
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2924 3-Line to 8-Line Decoder/Demultiplexer • Inverting and Non-inverting Enable Inputs • Select to Output in 8.0ns (Typ) • 16-Pin DIP
G2A----~
BLI-075
Am2925 System Clock Generator and Driver • Single-Chip Clock Generator and Driver • Four Different Clock Output Waveforms for Am2900 and Other Bipolar and MOS Systems • Crystal Controlled for Stable System Operation • Oscillator to 31 MHz Oscillator output for external system timing • Clock Haltr Single-Step and Wait Controls • Variable Cycle Lengths ' One of eight different cycle lengths can be microprogrammed to boost CPU throughput up to 25% • Slim 0.3" 24-Pin DIP
U)
Q) (.)
>
Q)
o
o
~
.~ ~ "0
OSCILLATOR
I
Xl
CRYSTAL
X2
CYCLE LENGTH
{~~:f]-EG L3
Q) (.)
r:: ro >
"0
«
MPR-217
1216
@
IC MASTER 1983,
Advanced· Micro Devices ..•.~ BIPOLAR MICROPROCESSOR PRODUCTS Am2926/Am2929 Schottky 3-State Quad Bus Driver/Receiver • • • • • •
48mA Driver Sink Current 3-State Outputs on Driver and Receiver PNP Inputs Am2926 Has Inverting Outputs Am2929 Has Non-inverting Outputs Driver/Receiver Propagation Delay (Typ) 10ns for Am2926 13ns for Am2929 • 16-Pin DIP
Am2926*
B/E
~----~-----r----~---BO ~----~----~---Bl
..------t--- B2 83
BLI·oao
·Outputs Bo-B3 are not inverted for Am2929.
Am2927/Am2928 Ql.ad 3-State Bus Transceivers (with Clock Enable) • o • • • • • • • • • •
Quad High-Speed LSI Bus Transceivers 3-State Bus Driver and Receiver Outputs D-Type Register on Drivers Latched Output on Am2927 Registered Output on Am2928 Output Data to Input Wraparound Gating Input Register to Output Transfer Gating with or without Driving Data Bus Clock Enabled Registers Bus Driver Outputs Sink 48mA at O.SV (Max) 3-StateReceiver Outputs Sink 20mA at O.SV (Max) V OH = 3.SV (Min) for Direct MOS Microprocessor Interface 20-Pin DIP
Am2927 BUS
DATA INPUT
OUTPUT y 0--
D MUX
EN
LATCH
en
Q) (.)
AIT S SELECT
ENDR DRIVER ENABLE
CP BE CLOCK BUS INPUT ENABLE
RECEIVER LATCH ENABLE
0:; Q)
DE
o a
OUTPUT ENABLE
~
Am2928
(.)
~ "0 Q) (.)
c
co
>
"0
«
S SELECT
ENDR DRIVER ENABLE
BE BUS ENABLE
ENREC CP RECEIVER CLOCK ENABLE INPUT
DE OUTPUT ENABLE
BLI·oaa
@IC MASTER 1983
1217
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2940 DMA Address Generator • DMA Address Generation Generates memory address, word count and DONE signal for DMA transfer operation • Expandable 8-Bit Slice Any number of Am2940s can be cascaded to form larger memory addresses Three devices address 16 megawords • Repeat Data Transfer Capability Initial memory address and word count saved so data transfer can be repeated
A~~=~~-4______C~
• Programmable Control Modes Provides four types of DMA transfer control plus memory address increment/decrement • 24mA Output Current Sink Capability • Microprogrammable Executes eight different instructions • 109ns (Max) Cycle Time for 16-Bit Configuration Allows up to nine million words/second DMA • 28-Pin DIP
____~__________~__+-~~____________________~
OE A r:>-4------....J
en
Q) (,)
0:;;
(g:~~~~~----~~--------~~--------------------------------------~
Q)
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o
INSTRUCTION _ _IN_S_TR_U_C_TI_O_N_ (10-12) ~ DECODER
~
e:.
..... •
CLOCK~ CP~
(,)
~ "0
MPR·226
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c
cu
>
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1218
@
Ie MASTER 1983
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2942 Programmable Timer/Counter, DMA Address Generator • 22-Pin Version of Am2940 Provides multiplexed address and data lines plus additional instruction input and instruction enable pins • Used as DMA Address Generator or Programmable Timer Counter • Executes 16 Instructions Eight DMA instructions Eight Timer/Counter instructions • Provides Two Independent Programmable 8-Bit Up/Down Counters Counters can be cascaded to form single-chip 16-bit up/down counter
• Reinitialize Capability Counters reinitialized from on-chip registers • Expandable 8-Bit Slice Any number of Am2942s can be cascaded' Three devices provide a 48-bit counter • Programmable Control Modes Four types of control • 24mA Output Current Sink Capability • 109ns (Max) Cycle Time for 16-Bit Configuration • 22-Pin DIP
UJ
Q) (J
>
OED c:::::>--I----,
Q)
Q
o
DONE
DATA
(0 -0 ) K)I~~--< 0 7
l---"L-------
INSTRUCTION ENABLE (IE)
INSTRUCTlON'---" (10-13)
------------------1
L.
(J
~ "C
I L
4 ,
INSTRUCTION DECODE
CLOCK
c:::>------{:>o
Q) (J
C
ctS
>
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«
MPR-231
© IC MASTER 1983
1219
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2946/Am2947 Octal3-State Bidirectional Bus Transceivers • 8-Bit Bidirectional Data Flow Reduces System Package Count • 3-State Inputs/Outputs for Bus-Oriented System Interface • PNP Inputs Reduce Input Loading • VOH = Vee -1.1SV for TTL, MOS, CMOS Interface • 48mA, 300pF Bus Drive Capability .• Am2946 Has Inverting Transceivers
• Am2947 Has Non-inverting Transceivers • Transmit/Receive and Chip Disable Simplify Control Logic • Low-Power 8.0mA per bidirectional bit • Bus Port Stays in High-Impedance State during Power Up/Down • A Port to B Port Delay Time - 11 ns (Typ) • 20-Pin DIP
Am2946·
CHIP DISABLE - . - .
~
CD
TRANSMITI
iiECEii7f Tiii
BLI-101
"Am2947 has non-inverting transceivers.
Am2948/Am2949 Octal3-State Bidirectional Bus Transceivers
en
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os; (J.)
o
o
~
(,)
~ "'0
• 8-Bit Bidirectional Data Flow Reduces System Package Count • 3-State Inputs/Outputs for Bus-Oriented System Interface • PNP Inputs Reduce Input Loading • VOH = Vee -1.1SV for TTL, MOS, CMOS Interface • 48mA, 300pF Bus Drive Capability • Am2948 Has Inverting Transceivers
• Am2949 Has Non-inverting Transceivers • Separate Transmit and Receive Enables • Low-Power 8.0mA per bidirectional bit • Bus Port Stays in High-Impedance State during Power Up/Down • 20-Pin DIP
Am2949*
(J.) (,)
c:: >
as "'0
«
BLI-107
"Am2948 has inverting transceivers.
@
Ie
MASTER 1983 ;
Advanced Micro Devices .~. BIPOLAR MICROPROCESSOR PRODUCTS Am2950/Am2951 8-Bit BidirectionalI/O Ports • Inverting and Non-inverting Versions Am2950 provides non-inverting data outputs Am2951 provides inverting data outputs • 24mA Output Current Sink Capability o 20ns Clock to Flag, 27ns (Max) for Output Enable Allows up to 8 million words/second data transfer rate • 28-Pin DIP
• 8-Bit, Bidirectional I/O Port with Handshake Two 8-bit, back-to-back registers store data moving in both directions between two bidirectional busses • Register Full/Empty On-chip flag flip-flops provide data transfer handshaking signals • Separate Clock, Clock Enable and 3-State Output Enable for each Register • Separate, Edge-Sensitive Clear Control for each Flag Flip-Flop
Am2950·
Y"
CPA
+ ,. 0i I C6E
FA
CLR
EDGE DETECT
Y
CE A
t'K~
I Ao
CP Do
A, 0,
0,
A2 O2
02
a: w
A3
1/1
03
a:
04
~
03
aw
A4 04
Ii:
As Os
Os
06
06
07
· 07
A6 A7
W ......
V
r-t --c --c
V2
----.... ----....
,
V3 V4
"
Vs
"
V6
--c
V7
CL
OE SA Bo B, B2 B3 B4 Bs B6 B7
(J)
~~ V, !A -F--r V21A -N Y31A F--r V4~
r-«
OEAS
CL Rs
I
0,
0,
o
O2
o
1/1
03
(.)
w a:
04
02
a
ch
Os
Os
V6~
06
06
0 7 CE
r
~
I
CED
FS CLR CP
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Ie MASTER 1983
~ "C
Q) (.)
C
tU
>
CP 0 7
I
r-
"C
«
CPs
CE s Vee
1
·Outputs 80-87 are inverted on the Am2951.
@
Q)
~
~
04
10
EDGE DETECT
a: w
03
-J>o-
Fs
oS;
Do
vs~
V7~
Q) (.)
-
00
MPR-573
1221
Advanced ,Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am2954/Am2955 Octal Registers (with 3-State Outputs) • • • •
8-Bit High-Speed Parallel Registers Am2954 Has Non-inverting Inputs Am2955 Has Inverting Inputs Positive Edge-Triggered D-Type Flip-Flops
• • • •
Buffered Common 3-State Control and Clock VOL = O.5V (Max) at IOL = 32mA Clock to Output 11 ns (Typ) 20-Pin DIP
Am2954*
OE OUTPUT ENABLE
Yo
Y,
BLI·110
"Inputs DO through 07 are inverted on the Am2955.
Ain2956/ Am2957 Octal Latches (with 3-State Outputs) • • • • •
en
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o
Eight Latches in a Single Package Am2956 Has Non-inverting Outputs Am2957 Has Inverting Outputs VOL = O.5V (Max) at IOL = 32mA 3-State Outputs for Bus-Oriented System Interface
• Hysteresis on Latch Enable Input for Improved Noise Margin • Clock to Output 12ns (Typ) • 20-Pin DIP
o
'-
(,)
Am2956*
~ "'0
Q) (,)
c cu >
"'0
«
"Inputs DO through 07 are inverted on the Am2957.
1222
MPR·360
@
Ie MASTER 1983
Advanced Micro Devices .~.. BIPOLAR MICROPROCESSOR PRODUCTS Am2958/Am2959 Octal Buffers/Line Drivers/Line Receivers (with 3-State Outputs) • 3-State Outputs Drive Bus Lines Directly • Hysteresis at Inputs Improve Noise Margin • PNP Inputs Reduce dc Loading on Bus Lines
Am2958*
1A1
1Y1
2A1
2Y1
1A2
1Y2
2A2
2Y 2
1A3
1Y3
2A3
2Y 3
1A4
1Y4
2A4
2Y4
=
• VOL 0.55V at IOL = 65mA for commercial product at IOL = 48mA' for military product • Data-to-Output Propagation Delay Am2958 Inverting - 4.5ns (Max) Am2959 Non-inverting - 6.0ns (Max) • Enable-to-Output 15ns (Max) ., 20-Pin DIP
2G
·Outputs Yl through Y4 are not inverted on the Am2959.
BLI-115
Am29112 Interruptable 8-Bit Microprogram Sequencer • Fast Designed to operate in 10MHz microprogrammed systems • Expandable One Am29112 directly addresses up to 256 words of microcode Two Am29112s can directly address up to words of microcode • Interruptable at Microcycle Completion Internal states saved on the stack Branches automatically to the interrupt service routine • Many Addressing Modes Immediate, relative and n-way ",nrira"",ir,n • 31-Level Stack On-chip 31-level stack used for interrupts and loops • Single or Double Pipeline • 40-Pin DIP
©
Ie
MASTER 1983
en
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o
~
()
~ "0
Q) ()
c
co >
"0
«
~_.~ •. ~_ .. ,. __".
1223
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am29116 16-Bit Bipolar Microprocessor • Designed for Controller Applications Instruction set designed for high performance peripheral controllers, communications controllers, industrial controllers and digital modems ... but general purpose too. Excellent solution for applications requiring speed and bit-manipulation power • Fast Design objective of 100ns (Max) microcycle time for all instructions Allpws a 10MHz clock rate
• Powerful Instruction Set All instructions executable in single cycle on full 16-bit word or on a-bit byte: Add, Subtract Rotate and Merge n-Bit Rotate Rotate and Compare Shift-Up/Shift-Down CRC Generation Set-Bit/Reset-Bit Priority Encode Add/Subtract 2n • Powerful Data Manipulation Full 16-bit data path 32 registers on-chip Direct data input for immediate mode instructions • 52-Pin DIP
RESERVED D - vccD-vccD-GNDD-GNDD-32-WORD X 16-BIT RAM
cpD-lEND--
. . - - - - - - - - - - - + - 1 ADDRESS .16-BIT LATCH
en Q) (,)
">Q) 0
1
OC
0
"-
SRE
(,)
~ "'0 Q) (,)
C CCS
DET
> "'0
« T1 . 4
CT
MPR-740
1224
@
Ie MASTER 1983
Advanced Micro Devices BIPOLAR MICROPROCESSOR PRODUCTS Am29705 16-Word by 4-Bit 2-Port RAM
• 16 Word x 4-Bit 2-Port RAM • Two Output Ports Each with separate output control Separate 4-bit latches on each • Data Output Non-inverting with Respect to Data Input
• Chip Select and Write Enable Inputs for Ease in Cascading • 53ns (Max) Access Time • 28-Pin DIP
63
A2
-A
Al
ADDRESS DECODER
16WORD 6Y 4-61T TWO-PORT RAM
A ADDRESS
6 ADDRESS DECODER
6 ADDRESS
62 61 60
A-PORT
WE
B PORT
CS
'---1-1-+-+---~~----O~
LE
A=-co FORCE A ZERO
ADATA 4BIT LATCH
B-DATA 4-BIT LATCH
1------0
8-BIT INTERNAL DATA BUS
Q)
0
I/O PC3'PCO
0
L.
(.)
~
Ril-O WR Al Ao
"C READ/ WRITE CONTROL LOGIC
Q)
(.)
c:::
I/O PB7,PBo
a:s > "C
RESET
« CS------'
© Ie MASTER 1983
1237
Advanced Micro Devices MOS MICROPROCESSOR PRODUCTS
Am8257/Am9557 Direct Memory Access (DMA) Controller
I
The Am8257/Am9557 is a 4-channel direct memory access controller which permits the high-speed transfer of data directly between peripherals and memory in microcomputer systems.
necessary control signals and memory address required for the data transfer. It maintains a byte count for each channel and issues a terminal count signal upon completion of the programmed number of transfers.
When peripheral requests are received, the Am8257/ Am9557 issues a HOLD signal to the host CPU, assumes control of the system busses, selects the highest priority peripheral for servicing, and generates the
The Am8257/Am9557 requires a single, 5V supply and is available in either a plastic or hermetic 40-pin DIP. For improved functional and performance characteristics; see the Am9517A Multimode DMA controller.
ORDO 0 0 -0 7
DATA BUS BUFFER
OACK O
ORD l
lOR lOW
OACK 1 ·
ClK RESET
en Q)
AO
()
Al
Q)
A3
oS;
READ! WRITE lOGIC ORQ2
A2
0 0
Cs'
()
A4
~
A6
"C
A7
Jo-.
OACK 2
ORQ3
AS
Q)
0
READY
c:
ct1
HRQ
"C
HlDA
>
«
INTERFACE AND OPERATION CONTROL lOGIC
OACK3
MEMR . MEMW AEN ADSTB TC MARK
1238
©
Ie
MASTER 1983
Advanced Micro Devices MOS MICROPROCESSOR PRODUCTS
Am8279 Keyboard/Display The Am8279 programmable keyboard/display I/O interface controls data input and display functions in microprocessor systems. It connects directly to the microcomputer data bus and all operating modes are CPU programmable.
and strobed inan 8-character FIFO. The display portion contains a 16 x 8 Display RAM which can be organized into dual 16 x 4. It provides a scanned display interface for LED, incandescent and other popular display technologies. Both right-entry calculator and left-entry typewriter display formats are possible.
The Am8279 has two sections: keyboard and display. The keyboard portion can provide a scanned interface to a 64-contact key matrix, a sensor array or a strobed interface keyboard. Key depressions can be 2-key lockout or N-key rollover. Keyboard entries are debounced
ClK
RESET
Available in two speed versions, the Am8279 requires a Single, 5V supply and is packaged in either a plastic or hermetic 40-pin DIP.
DB()'7
DATA BUFFERS
RD
WR
CS
I/O CONTROL
Ao
IRQ
FIFO/SENSOR RAM STATUS
en
DISPLAY ADDRESS REGISTERS
Q) C,)
axa FIFO/SENSOR RAM
16 X 8 DISPLAY RAM
.>
KEYBOARD DEBOUNCE AND CONTROL
Q)
Cl
o
L.
.2 ~
TIMING AND CONTROL
'0 Q) C,)
c ctS >
'0
« OUT AO-3
© Ie MASTER 1983
OUT B O_3
SlO_3
RlO_7
CNTUSTB
1239
Advanced Micro Devices MOS MICROPROCESSOR PRODUCTS
Am9511A Arithmetic Processing Unit (APU) The Am9511 A arithmetic processing unit is used to enhance the computational capability of a wide variety of a-bit microprocessor systems. It provides high performance 16 and 32-bit fixed-point and 32-bit floating-point arithmetic operations, performs trigonometric and inverse trigonometric functions, and executes a variety of mathematical operations such as square root, logarithm and exponentiation. Data are transferred to and from the APU via a CPU by using conventional programmed I/O, or by a direct memory access device if higher transfer speeds are required. All transfers, including operand, result, status
and command information, take place over an a-bit bidirectional data bus. Operands are pushed onto an internal stack and a command is issued to perform operations on the data in the .stack. Results are then available to be retrieved from the stack. or additional commands may be entered. Upon completion of each command, the APU issues an end of execution signal; this Signal may be used as an interrupt by the CPU to help coordinate program execution. The Am9511 A is available with a 2MHz, 3MHz or 4MHz maximum clock frequency in a hermetic 24-pin DIP.
BUS CONTROL
WR
WORKING REGISTERS
C/O PAUSE
DBO-DB7
--0
BUS BUFFER
CONSTANT ROM MICROPROGRAMMED CONTROllER
en Q)
END
0
":;
CONTROL ROM
SVREO
Q)
0
SVACK
0
RESET
J....
.2
ClK
~
"tJ Q)
0
c:::
as
>
"tJ
«
1240
© Ie MASTER 1983
Advanced Micro Devices MOS MICROPROCESSOR PRODUCTS
Am9512 Floating-Point Processing Unit (FPU) The Am9512 floating-point processing unit enhances the computational capability of the CPU in a-bit microprocessor systems. It provides single precision (32-bit) and double precision (54-bit) add, subtract, multiply and divide operations. Data are transferred between the Am9512 and the CPU by using programmed I/O or direct memory access techniques. The operand, result, status and command information transfers occur over an a-bit bidirectional
data bus. Operands are pushed onto an internal stack by the CPU and a command is issued to perform an operation on the data stack. The results of this operation are available to the CPU by popping the stack. Upon completion of an operation, the Am9512 issues an end of execution signal; this signal can be used to interrupt the CPU. The FPU is available in two speed versions and is packaged in a hermetic 24-pin. DIP.
TWO PORT DATA STACK 8 X 17
ERR
INTERFACE CONTROL
UJ
Q)
o
"S: Q)
o
o
CONTROL ROM 768 X 16
"-
o
~ "0 Q)
o
c:
«S
>
"0
Q)
PRIORITY
EO
L.
o
IRR
c_~..,~~r-~C-OL-----l"--------II~~~~~~~T
_____
INTERRUPT REOUESTS
o L.
REGISTER
(.)
GINT _ -_ _ _ _ _ _ _ _ _ _ _ _ _ _---1
~ "'0 Q) (.)
c:
ca >
"'0
«
©
Ie
MASTER 1983
1245
Advanced Micro Devices MOS MICROPROCESSOR PRODUCTS
Am9520 Burst Error Processor (BEP) The Am9520 burst error processor provides a tool for implementing the most common error detection and correction schemes in microprocessor-based digital data-handling systems. Because modern disks use high data recording densities, the probability of errors occuring during data recovery is increased. Burst error detection and correction schemes based on Fire codes. are used to correct such errors and to enhance the overall disk system performance. The Am9520 provides four standard polynomials, including the popular 56-bit and 48-bit versions; logic levels on two inputs select the desired polynomial. For encoding, the data stream is divided by a selected polynomial using rules of algebra in polynomial fields.
Vss
This division results in a remainder which is appended to the data as check bits. For error checking, the bit stream containing both data and check bits is divided by the same selected polynomial. If there are no detectable errors, this division results in a zero remainder. If an error is detected, the Am9520 will extract the burst error pattern and the location of the burst in the data stream. The Am9520 requires a single-phase clock and a 5V supply. It is packaged in either a plastic or hermetic 40-pin DIP.
Vee
l l
1--.......- - ERROR (ER)
RESET (MR) - - - - - - - - - .
1 - - 1 - - - - ALIGNMENT EXCEPTION (AE)
CLOCK (CP) - - - - - - - .
1--.......- - ERROR PATTERN (EP) FUNCTION - - - - - - ' " SELECT (C2-CO) - _... ".
PATTERN MATCH (PM4-PM2)
READ ERROR PATTERN (REP) - - - - I
(J)
DATA OUT
Q) ()
POLYNOMIAL SHIFT CONTROL (P3-PO)
os:
(OrOo)
---'--"~"
LOCATED ERROR PATTERN (LP3-LPO)
Q)
o
POLYNOMIAL _ . _ - , . SELECT (51-SO)
o
~
()
~ -o~
DATA IN ~-------1'-----..L.----'" (07-00)
Q) ()
POLYNOMIAL DIVIDE MATRIX
L ----------
c
SELECTABLE POLYNOMIAL DIVIDERS
as
>
-0
I I I
~
~
1246
@
Ie MASTER 1983
S6809/S68A09/S68B09 8-81T MICROPROCESSING UNIT Features
General Description
o
Interfaces With All S6800 Peripherals
o
Upward Compatible Instruction Set and Addressing Modes
o
Upward Source Compatible Instruction Set and Addressing Modes
The 86809 is an advanced processor within the 86800 family offering greater throughput, improved byte efficiency, and increased adaptability to various software disciplines. These include position independence, reentrancy, recursion, block structuring, and l¥gh level language generation.
[l
o
Because the 86809 generates position-independent code, software can be written in modular form for easy user expansion as system requirements increase. The 86809 is hardware compatible with all 86800 peripherals, and any assembly language code prepared for the 86800 can be passed through the 86809 assembler to produce code which will run on the S6809.
Two 8-Bit Accumulators Can Be Concatenated - Into One IS-Bit Accumulator On-Chip Crystal Oscillator (4 times XTAL)
Block Diagram
Pin Configuration
(.)
+--
vee
+--
Vss
INSTRUCTION DECODE (IR)
C
HALT
Vssl
NMi
XTAL
iRli
EXTAL
FIRO
RESET
BS
MRDY
en
E Q)
~
en
~
Ul
0
"-
BA
(.)
Vcc 1
~
AD
DMA/BREO
Al
R/W
A2
10
DO
"L;:
A3
11
01
FIRO
A4
12
02
E
IRO
AS
13
03
DMA/BREO R/W
A6
14
04
A7
15
05
A8
16
06
. . . - - - RESET NMI
HALT BA BS XTAL EXTAL MRDY
C
CO
(.) S6809 S68A09 S68B09
A9
17
07
Al0
18
A15
All
19
AU
A12
20
A13
Q)
clock. Instruction Set The F38E70 executes the entire instruction set of the multi-chip F8 family (F3850 family). Of course, the STORE instruction is of little use in the F38E70 because only read-only memory exists in the addressing range of the data counter (the data counter, however, is incremented if STORE is executed).
©
Ie MASTER 1983
External Mode
ATCUT1-4MHz
OPEN
RC Mode
EXTERNAL CLOCK
LC Mode Vee
~ ~L -=-
~* ..L
CEXTERNAL (OPTIONAL-CAN BE OMITTED)
L_-ir- _.J CEXTERNAL (OPTIONAL)
Minimum R = 4kf/
Minimum L= 0.1 mH Minimum Q = 40
C = 20.5 pF ± 2.5 pF + CEXTERNAL
Maximum CEXTERNAL = 30 pF
1
fMIN == 1.1 RC+65ns 1
f MAX == 1-.0-R-C-+-1-5-ns
C= 10 pF± 1.3 pF+CEXTERNAL 1 f==--
- 27r vIC
Example with CEXTERNAL = 0
Example with CEXTERNAL =.0
R= 15 kf/± 5% f == 2.9MHz±26%
L= 0.3 mH ± 10% f == 3.0 MHz± 10%
1267
Fa Family
FAIRCHILD A Schlumberger Company
Controller Products F3850
CPU with 64 bytes of RAM and two 8-bit bidirectional 1/0 ports
F3851 A
PSU with two 8-bit bidirectional 1/0 ports and 1K bytes of FAIRBUG bootstrqp debugging program
F3851
PSU with two 8-bit bidirectional 1/0 ports and 1K bytes of user-programmable mask ROM
F3853
Memory interface for static RAM or ROM
F3856
.PSU with two 8-bit bidirectional 1/0 ports and 2K bytes of user-programmable mask ROM, and an on-board binary timer
/
I
F3856A F3861A F3861B F3861C F3861D F3861E F3871E F3871F F3871G F3871H
PSU with two 8-bit bidirectional 1/0 ports and 2K bytes of KD-BUG monitor program ROM PIO with two 8-bit bidirectional 1/0 ports and a software-programmable polynomial timer
PIO with two 8-bit,bidirectional 1/0 ports and an F3870-type, software-programmable binary timer
I
F8 FAMILY ORGANIZATION
F3850 CENTRAL PROCESSING UNIT
F3851 PROGRAM STORAGE UNIT
f---
"C ......
-
.c (,)
L..
co
LL
F3853 STATIC MEMORY INTERFACE
f---
F3856 PROGRAM STORAGE UNIT
~
F3871 PERIPHERAL INPUT/OUTPUT
F3861 PERIPHERAL INPUT/OUTPUT
1268
@
Ie MASTER 1983
F6800 Family
FAIRCHILO A Schlumberger Company
Product Listing Device No. F6800P F6800CP F6800S F6800CS F68AOOP F68AOOS F68BOOP F68BOOS F6802P F6802S F6882P F6882S F6808P F6808S F6809P F68A09P F68B09P F6809E F68A09E F68B09E F6810P F6810S F68A10P . F68A10S F68B10P F68B10S F6820P
Description MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU MPU RAM RAM RAM RAM RAM RAM PIA
Device No. F6820S F6821P F6821S F68A21P F68A21S F68B21P F68B21S F6840P F6840S F68A40P F68A40S F68B40P F68B40S F6844P F68A44P
Description PIA PIA PIA PIA PIA PIA PIA PIM PIM PIM PIM PIM PIM DMAC DMAC
F6845P F68A45P F68B45P F6845AP
CRT CRT CRT CRT
F68A45AP F68B45AP F6846P F6846S
CRT Controller CRT Controller COMBO COMBO
Controller Controller Controller Controller
Device No. F6847P F6847S F6850P F6850S F68A50P F68A50S F68B50P F68B50S F6852P F6852S F68A52P F68A52S F68B52P F68B52S F6854P F6854S F68A54P F68A54S F68B54P F68B54S
Description VDG VDG ACIA ACIA ACIA ACIA ACIA ACIA SSDA SSDA SSDA SSDA SSDA SSDA ADLC ADLC ADLC ADLC ADLC ADLC
F6856P F6856S F3846P F3846S F68456P F68456S F68488P F68488S
SPCC SPCC SPCC SPCC SPCC SPCC GPIA GPIA
Development Board PEP 68-F6802, F6809 Prototyping Module "C
ROM Family
..c:
(,)
'-
Fairchild
©
Equivalent EPROM
Fairchild
Equivalent EPROM
16K ROM F35316 F68316
16K EPROM, 2716 2716
64K ROM 24-Pin F3564 F3565 F3566
64K ROM 24-Pin 68764 68764 68766
32K ROM F3533 F68332 F3532
32K EPROM 2732 2732 2732
64K ROM 28-Pin F3568 F3569 F3570
64K ROM 28-Pin 2764 2764 2764
Ie MASTER 1983
1269
ctS U.
FAIRCHILD A Schlumberger Company
F6801/F6803 Single-Chip Microcomputer Microprocessor Product
Description The Fairchild F6801/F6803 is an 8-bit single-chip microcomputer unit (MCU) which significantly enhances the capabilities of the F6800 family. It includes an upgraded F6800 microprocessor unit (MPU) with upward-source and object-code compatibility. The F6801lF6803 MCU can function as a monolithic microcomputer or can be expanded to a 64K byte address space. Features of the F6801/F6803 MCU include: • • • • • • • • • • • • •
•
Enhanced F6800 Instruction Set 8 x 8 Multiply Instruction Serial Communications Interface (SCI) 16·bit Three·Function Programmable Timer Bus Compatibility with the F6800 Family 2048 Bytes of ROM (F6801 Only) 128 Bytes of RAM 64 Bytes of RAM, Retainable During Powerdown 29 Parallel 1/0 and Two Handshake Control Lines Internal Clock. Generator With Divide·by·Four Output Interrupt Capability TTL compatible 40·Pin Ceramic or Plastic Package + 5V Power Supply
The F6801/F6803 MCU can be configured to function in a wide variety of applications. This flexibility is provided by its ability to be hardware-programmed into eight different operating modes. The operating mode controls the configuration of 18 of the 40 MCU pins, available on-chip resources, memory map, location of interrupt vectors, and type of external bus. Configuration of the remaining 22 pins is not dependent on the operating mode.
Connection Diagram E
Vss XTAL1
39
SC,
EXTAL2
38
SC 2
NM
37
P 30
IR01
36
P 3,
RESET
35
P 32
Vee
34
P 33
P 20
33
P 34
P 2,
32
P 35
P 22
10
31
P 36
P 23
11
30
P 37
P 24
12
29
P 40
P,o
13
28
P 4,
P"
14
27
P 42
P'2
15
26
P 43
P'3
16
25
P 44
P 14
17
24
P 45
P'5
18
23
P 46
P'6
19
22
P 47
PH
20
21
Vee STANDBY
The F6803 can be considered an F6801 that operates in Modes 2 and 3 only (either internal RAM with no ROM, or no internal RAM or ROM, respectively).
"0
.r:::.
.0 ~
1270
@
Ie MASTER 1983
F6801/F6803
FAIRCHILD A Schlumberger Company
Block Diagram
MODE
I 1Ft
EXPANDED MULTIPLEXED
MPU
~ EXPANDED NON·MULTIPLEXED
I
_ - - -...
I/O ...... I/O ......
A7/D7 As/Os As/Os A4 1D4 A3/ D3 A2/D2 A11D1
D7 Os 05 04 03 02 01
Ao/Do
Do
I/O
R/W R/W
OS3 IS3
AS lOS
SINGLE CHIP
110 ...... 110 ...... 110 ......
PORT 3
"'~~-"--I--+-"'" P20
PORT 2 MUX
"'~I----""'-+-..... P 21 I.~I--~--...........
P 22
I.~I--~~--.....
P23
"'~I--~.f--I-
__..... P 24
I/O
110
TIMER
SC1
P47 P 4S P4S P 44 P 43 P42 P 41 P 40
@
A1S A14 A13 A12 A11 A10 A9 As
A1 As As A4 A3 A2 Al
Ao
Ie MASTER 1983
II
PORT 4
PORT 1
•
P 10 P 11 P 12 P 13 P 14 P 1S P 1S P 11
1271
FAIRCHILD A Schlunlroerger C9mpany
F6809/F68A09/F68B09 Central Processing Unit Microprocessor Product
Description
The Fairchild F6809 8-bit Microprocessor is an advanced, high-performance member of the F6800 family, It offers greater throughput, improved byte efficiency, and increased adaptability to various software disciplines, including position-independent code, re-entrancy, recursion, block structuring, and high-level language generation, The F6809 is compatible with all F6800 peripheral devices and is upward source code compatible with F6800-series microprocessors. The device is available in three frequency ranges: 1.0 MHz (F6809). 1.5 MHz (F68A09). and 2.0 MHz (F68B09). Architectural improvements, such as additional 16-bit registers and dual 8-bit data paths, allow for powerful enhancements to the instruction set and addressing capabilities. •
• • • • • • • • • • • •
• ccs
LL.
• • • •
Compatible with Entire F6800 Family -Hardware Interfaces with all F6800 Peripherals -Software Has Upward·Compatible Instruction Set and Addressing Modes Two 16·Bit Index·Registers Two Indexable 16·Bit Stack Pointers Two 8·Bit Accumulators Can Be Concatenated to Form One 16·Bit Accumulator Direct Page Register Allows Direct Addressing Throughout Memory Map Single + 5 V Supply On·Chip Oscillator MRDY Input Extends Data Access Time for Use with Slow Memory , DMA/BREQ Allows Access to Bus for DMA and Memory Refresh Fast Interrupt Request (FIRQ) Stacks Only Program Counter and Condition Code Register Interrupt Acknowledge Output Allows Vectoring by Device Sync Acknowledge Output Allows for Synchronization to External Event 16·Bit Arithmetic (ADD, SUBTRACT, COMPARE, LOAD, STORE) 8 x 8 Unsigned Multiply Transfer/Exchange all Registers Push/Pull all Registers Ten Addressing Modes Expanded Indexed Addressing, Accumulator or up to 16·Bit Offset, Auto·lncrement/Decrement by One
Connection Diagram
HALf
Vss NMI
39
XTAL
IRa
38
EXTAL
FIRO
37
RES
BS
36
MROY
BA
35
a
Vee
34
E
Ao
33
OMA/BREO
Al
32
R/W
A2
10
31
Do
A3
11
30
01
A4
12
29
O2
As
13
28
03
A6
14
27
04
A7
15
26
Os
As
16
25
06
Ag
17
24
07
A 10
18
23
A 1S
All
19
22
A14
21
A 13
A12 (Top View)
or Two • •
True Indirect Addressing Load·Effective Address
1272
© Ie MASTER 1983
FAIRCHILD
F6809/68A09/F68B09
A Schlumberger Company
Block Diagram
_--RES
NMI
_ - - DMA/BREO R/W
HALt BA BS ---XTAL EXTAL MRDY
E L.---~O
© Ie MASTER 1983
1273
FAIRCHILD A Schlumberger Company
F6809E/F68A09E/F68B09E Central Processing Unit Microprocessor Product
Description The Fairchild F6809E 8-bit microprocessor is an advanced, high-performance member of the F6800 family. It offers greater throughput, improved byte efficiency, and increased adjustability to various software disciplines, including position-independent code, re-entrancy, recursion, block structuring, and high-level language generation. The F6809E is compatible with all F6800 peripheral devices and is upward source code compatible with F6800-series microprocessors. It is available in three frequency ranges: 1.0 MHz (F6809E); 1.5 MHz (F68A09E); 2.0MHz (F68B09E). Architectural improvements, such as additional 16-bit registers and dual 8-bit data paths, allow for powerful enhancements to the instruction set and addressing capabilities. External clock inputs are provided on the F6809E to allow synchronization with peripherals, systems, or other MPUs. • Compatible with Entire F6800 Family . Hardware Interfaces with All F6800 Peripherals • Software Has Upward·Compatible Instruction Set and Addressing Modes • Two 16·Bit Index Registers • Two Indexable 16·Bit Stack Registers • Two 8·bit Accumulators Can Be Connected to Form One 16·Bit Accumulator • Direct Page Register Allows Direct Addressing Throughout Memory Map • External E and a Clock Inputs Allow Synchronization • TSC Input Controls Internal Bus Buffers • LlC Output Indicates Opcode Fetch • AVMA Output Allows Efficient use of Common Resources in a· Microprocessor System • ' Fast Interrupt Request Input Stacks Only Program Counter and Condition Code Register • Interrupt Acknowledge Output Allows Vectoring by Device • Sync Acknowledge Output Allows for Synchronization to External Event • Single Bus·Cycle Reset • Single + 5 V Supply • Early Address Valid Allows Use with Slower Memories • Early Write· Data for Dynamic Memories • 10 Addressing Modes • True Indirect Addressing • Expanded Indexed Addressing • 1464 Instructions with Unique Addressing Modes • Recognizes 8x8 Unsigned Multiply • 16·Bit Arithmetic
1274
Connection Diagram
Vss
HALT
NMI
22
TSC
iRa
23
LlC
FIRQ
24
RES
BS
25
AVMA
BA
6
Vee
Ao Al
26
Q
27
E
28 9
BUSY Rm
A2
10
A3
11
31
01
A4
12
32
O2
As
13
As
14
DO
03 34
04
A7
15
05
As
16
06
Ag
17
07
A10
18
A 15
All
19
A14
A12
20
A13
© Ie MASTER 1983
F=AIRCHILO
F6809E/F68A09E/F68B09E
A Schlumberger Company
Block Diagram
---Vee ~Vss
....----RES NMI FIRO IRO
.......Jr.::=-l~ LlC ....---..... AVMA
RNi
TSC
HALT
BA BS L - -...... BUSy
.......- - E
'------0
@
Ie MASTER 1983
1275
FAIRCHILD A Sc;hlumberger Company
F6845/F6845A CRT Controller Microprocessor Product
Description The Fairchild F6845 CRT Controller (CRTC) provides an interface between a microprocessor (MPU) and a raster scan CRT device. The CRTC is used in microprocessor-based controller systems for CRT terminals in stand-alone or multiterminal configurations, including smart, programmable CRT terminals, video games, and information displays.
Connection Diagram
GND
VS
RESET
HS
lPSTB
RAO
MAO
RA1
MA1
RA2
MA2
RA3
MA3
RA4
MA4
DO
MAS
01
The F6845 CRTC is designed with an optimum hardware/software balance that achieves integration of all key functions and maintains flexibility. All keyboard functions, read/write operations, cursor movements, and editing are under microprocessor control. The F6845 provides video timing and refresh memory addressing.
• • • • • • • • • • •
"0
.c 0
~
"cu u..
• • • • • •
Monochrome or Color CRT Applications Used with "Glass·Teletype", Smart, Programmable, Intelligent CRT Terminals; Video Games; Information Displays Alphanumeric, Semigraphic, and Full Graphic Capability Fully Programmable via Processor Data Bus; Timing can be Generated for Almost Any Alphanumeric Screen Format (e.g., 80 x 24, 72 x 64, and 132 x 20) Single + 5 V Supply F6800·Compatible Bus Interface TTL·Compatible Inputs and Outputs Start Address Register Provides Hardware Scroll (By Page, Line, or Character) Programmable Cursor Register Allows Control of Cursor Format and Blink Rate Light Pen Register Refresh (Screen) Memory Can Be Multiplexed Between the CRTC and the MPU, Thus Removing the Requirements for Line Buffers or External DMA Devices Programmable Interlace or Non·lnterlace Scan Modes 14-Blt Refresh Address Allows up to 16K of Refresh Memory for Use in Character or Semlgraphic Displays 5·Blt Row Address Allows up to 32 Scan·Line Character Blocks 512K Address Space is Available for Graphics System by Using Both the Refresh and Row Addresses Refresh Addresses are Provided During Retrace, Allow· ing the CRTC to Provide Row Addresses to Refresh Dynamic RAM . Programmable Skew for Cursor and Display Enable (DE)
MA6
02
MA7
03
MAS
04
MA9
05
MA10
06
MA11
07
MA12
CS
MA13
RS E
DE CURSOR
RtW
VCC
ClK
Signal Functions
cs . DEVICE CONTROL
{ --..
RS E_
RIW RESET DO 01
DATA BUS
02 03
DISPLAY MEMORY ADDRESSING
04 05 06
VS HS DE CURSOR ClK lPSTB
1276
©
Ie MASTER 1983
FAIRCHILD A Schluml::lerger Company
F6856 Synchronous Protocol Communications Controller Microprocessor Product
Description The F6856 Synchronous Protocol Communications Controller (SPCC) is a monolithic n-channel MaS LSI circuit designed to satisfy the major interface requirements of the bit-oriented protocol (BOP) and bytecontrol protocol (BCP). The SPCC converts parallel data from the CPU into a continuous serial data stream for transmission. Simultaneously, it converts received serial data to parallel data for the CPU. The SPCC is organized to interface with either an 8- or 16-bit bidirectional data bus, is fully TTL-compatible, and operates from a single + 5 V supply. • • •
•
•
•
©
F6aOO and aoao Bus Compatible Data Rate From DC to 1M BPS Bit·Oriented Line Control Protocols: SDLC,ADCCP,HDLC • Automatic Detection and Generation of Special Control Sequences (e.g., Flag, Abort, Go·Ahead) • Zero Insertion and Deletion • Primary or Secondary Station Select • Global Address • Automatic Extended Address • One or Two Control Bytes • Data Character Length From Five to Eight Bits with 1· to a·Bit Residual Last Character • CCITT·CRC Error Detection • Interrupt on End of Message e IBM Retail Store Loop Mode Byte Control Protocol: IBM BISYNC • Special Character Generation: OLE, SYNC • Special Character Detection: OLE, SYNC, SOH, STX, ITB, ETB, ETX • ASCII or EBCDIC • Non·Transparent Mode and Transparent Mode • a·Bit Character Length • Automatic Fill Character Insertion with Selectable Stripping • CCITT or CRC·16 Error Detection • Interrupt on End of Message Byte Control Protocols: DDCMP and Other Programmable SYNC Characters • 5· to a·Bit Character Length • Selectable CRC Error Detection • Automatic Fill Character Insertion with Selectable Stripping Directly Addressable Parameter Control Registers: Mode, SYNC/Address, Transmitter Control, and Receiver Control
Ie
MASTER 1983
• Separate Addressable Status and Data Registers for Receiver and Transmitter • Modem Handshake Signals: RTS, CTS, DTR, DSR, and CD • NRZ or NRZI (Zero·Complementing) • Full· or Half·Duplex Operation • Self·Test Loop Mode • a· or 16·Bit Bidirectional l·State Data Bus • TTL·Compatible • Single + 5 V Supply • 40·Pin Package Connection Diagram 40·Pin DIP Vee
TSO
TCLK
RCLK
RTS
RSI
a
RSOF
R/W
OSR
08
00
09
01
010
02
011
03
012
04
013
05
014
Os
015
07
ROA
CD
A2
CTS
Al
TBMT
Ao
IRQ.
BYTE
OTR MISC
E
CE
Vss (Top View)
1277
FAIRCHILD A Schlumberger Company
F6800 MICROPROCESSING UNIT (MPU) GENERAL DESCRIPTION - The F6800 is a monolithic 8·bit microprocessor forming the central control function for Fairchild's F6800 family. Compatible with TTL, the F6800, as with all F6800 system parts, requires only one 5.0 V power supply and no external TTL devices for bus interface. NON M"5U.BlE INTERRUPT INMI)
The F6800 is capable of addressing 65K bytes of memory with its 16·bit address lines. The 8·bit data bus is bi·directional as well as 3·state, making direct memory addressing and multiprocessing applications possible. Two temperature ranges are available. The F6800 is O°C to 70°C and the F6800C is _40°C to +85°C. • • • • • • • • • • • • • • •
B-BIT PARALLEL PROCESSING BI·DIRECTIONAL DATA BUS 16-BIT ADDRESS BUS - 6SK BYTES OF ADDRESSING 72 INSTRUCTIONS - VARIABLE LENGTH SEVEN ADDRESSING MODES - DIRECT, RELATIVE,IMMEDIATE,INDEXED, EXTENDED, IMPLIED AND ACCUMULATOR VARIABLE LENGTH STACK VECTORED RESTART MASKABLE INTERRUPT VECTOR SEPARATE NON·MASKABLE INTERRUPT - INTERNAL REGISTERS SAVED IN STACK SIX INTERNAL REGISTERS - TWO ACCUMULATORS, INDEX REGISTER, PROGRAM COUNTER, STACK POINTER AND CONDITION CODE REGISTER DIRECT MEMORY ADDRESSING IDMAI AND MULTIPLE PROCESSOR CAPABILITY CLOCK RATES 1 MHz, 1.S MHz, 2 MHz SIMPLE BUS INTERFACE WITHOUT TTL HALT AND SINGLE INSTRUCTION EXECUTION CAPABILITY TWO TEMPERATURE RANGES - F6BOO O°C TO 70°C F6BOOC _40°C TO +BSoC
Vee Vss
DATA BUFFER
Pin 8 Pins 1 21
tttttttt
26
21
18
29
30
31
32
07
06
Os
04
OJ
02
D,
lJ Do
F6800 MPU
F6802/F6882 WITH CLOCK AND RAM GENERAL DESCRIPTION - The F6802/F6882 is a monolithic 8·bit microprocessor that contains all the registers and accumulators of the F6800, plus an interval clock oscillator and driver on the same chip. It also has 128 bytes of RAM on·board, located at hex addresses $0000 to $007F. The F6802/F6882 is completely software·compatible with the F6800 microprocessor and the entire F6800 family of parts. • • • • • • • • •
ON·CHIP CLOCK CIRCUIT 128 x 8·BIT ON·CHIP RAM 8 BYTES OF RAM ARE RETAINABLE ON THE F6882 32 BYTES OF RAM ARE RETAINABLE ON THE F6802 SOFTWARE·COMPATIBLE WITH THE F6800 STANDARD TTL·COMPATIBLE INPUTS AND OUTPUTS 8·BIT BIDIRECTIONAL DATA BUS 16·BIT MEMORY ADDRESSING INTERRUPT CAPABILITY
Vee Vss
Pins 8.35 PinS 1,21.36
F6802/F6882 MPU
F6808 MPU WITH CLOCK GENERAL DESCRIPTION - The f6808 is a monolithic 8·bit microprocessor that con· tains all the registers and accumulators of the present F6800 plus an internal clock oscillator and driver on the same chip. The F6808 is completely software compatible with the F6800 as well as the entire F6800 family of parts. The F6808 is expandable to 65K words. This very cost-effective MPU allows the designer to use the F6808 in consumer as well as industrial applications without sacrificing industrial specifications.
'U
.c (,) ~
"(ij LL
• • • • • • •
ON·CHIP CLOCK CIRCUIT SOFTWARE COMPATIBLE WITH THE F6BOO EXPANDABLE TO 6SK WORDS STANDARD TTL COMPATIBLE INPUTS AND OUTPUTS B·BIT WORD SIZE 16·BIT MEMORY ADDRESSING INTERRUPT CAPABILITY
F6810128
X
MEMORVREAOY
3_
ENABLE
37
RESET
"0
NONMASKA8lE INTERRUPT
6
BUS AVAll"BlE
7
VAUOMEMORYAOORES5
~
8-BIT RANDOM ACCESS MEMORY (RAM) F6808 MPU
GENERAL DESCRIPTION - F6810 is a byte·organized memory designed for use in bus·organized systems. It is fabricated with .N·channel silicon·gate technology. For ease of use, the device operates from a single power supply, has compatibility with TTL and DTL, and needs no clocks or refreshing because of static operation. The memory is compatible with the F6800 Microcomputer Family, providing random storage in byte increments. Memory expansion is provided through multiple Chip Select. inputs. • • • • • • •
ORGANIZED AS 12B BYTES OF EIGHT BITS STATIC OPERATION BI·DIRECTIONAL 3·STATE DATA INPUT/OUTPUT SIX CHIP SELECT INPUTS IFOUR ACTIVE LOW, TWO ACTIVE HIGHt SINGLE S V POWER SUPPLY TTL COMPATIBLE MAXIMUM ACCESS TIME = 350 ns - F6B10-l 450 ns - F6Bl0
1278
AO AI A2 A3 AS A6
23 22 21 20 19 13 17
CSS CS4
IS 14
CS3
13
CS2 CSI
12 11
A4
ICC· PIN 24 Vss' PIN 1
CSO
F6810 RAM
© Ie MASTER .1983
FAIRCHILD A Schlumberger Company
F6821 PERIPHERAL INTERFACE ADAPTER (PIA) A
GENERAL DESCRIPTION - The F6821 Peripheral Interface Adapter provides the uni· versal means of interfacing peripheral equipment to the F6BOO Microprocessing Unit (MPU). This device is capable of interfacing the MPU to peripherals through two B·bit bi·directional peripheral data buses and four control lines. 'No external logic is required for interfacing to most peripheral devices.
CONTRUlS
Il~A
DATA
The functional configuration of the PIA is programmed by the MPU during system initialization. Each of the peripheral data lines can be programmed to act as an input or output, and each of the four control/interrupt lines may be programmed for one of several control modes. This allows a high degree of flexibility in the overall operation of the interface.
• • • • • • • • •
INTERfAC'
S-BIT BI·DIRECTIONAL DATA BUS FOR COMMUNICATION WITH THE MPU TWO BI·DIRECTIONAL S-BIT BUSES FOR INTERFACE TO PERIPHERALS TWO PR-OGRAMMABLE CONTROL REGISTERS TWO PROGRAMMABLE DATA DIRECTION REGISTERS FOUR INDIVIDUALL Y·CONTROLLED INTERRUPT INPUT LINES; TWO USABLE AS PERIPHERAL CONTROL OUTPUTS HANDSHAKE CONTROL LOGIC FOR INPUT AND OUTPUT PERIPHERAL OPERATION HIGH IMPEDANCE 3·STATE AND DIRECT TRANSISTOR DRIVE PERIPHERAL LINES PROGRAM CONTROLLED INTERRUPT AND INTERRUPT DISABLE CAPABI LlTY CMOS DRIVE CAPABILITY ON SIDE A PERIPHERAL LINES
Vss
- L . -_ _ _ _ _-:-~
t· ·
CB, CB,
I' CONTBROLS
F6821 PIA
F6840 PROGRAMMABLE TIMER (PTM) GENERAL DESCRIPTION-The F6840 IS a programmable subsystem component of the F6800 family designed to provide variable system time intervals. The F6840 has three 16-blt binary counters. three corresponding control registers and a status register. These counters are under software control and may be used to cause system interrupts andlor generate output signals. The F6840 may be utilized for such tasks as frequency measurements. event counting. interval measuring and similar. tasks. The device may be used for square wave generation. gated delay signals. single pulses of controlled duration. and pulse width modulation as well as system Interrupts.
• • • •
~
Vss
) Vee
1 R"ESff
TTTTTTI
OPERATES FROM A SINGLE 5 VOLT POWER SUPPLY FULLY TTL COMPATIBLE SINGLE SYSTEM CLOCK REQUIRED (ENABLE) SELECTABLE PRESCALER ON TIMER ~ CAPABLE OF A 4 MHz INPUT
I •
~EGiSTER SE~ECT
• PROGRAMMABLE INTERRUPTS (IRQ) OUTPUTS TO MPU • READABLE DOWN COUNTER INDICATES COUNTS TO GO TO TIME-OUT • SELECTABLE GATING FOR FREQUENCY OR PULSE-WIDTH COMPARISON
• RESET INPUT • THREE ASYNCHRONOUS EXTERNAL CLOCK ANa GATE! TRIGGER INPUTS INTERNALLY SYNCHRONIZED • THREE MASK ABLE OUTPUTS
F6844 DIRECT MEMORY ACCESS CONTROLLER GENERAL DESCRIPTION - The F6844 Direct Memory Access Controller (DMAC) transfers data directly between memory and peripheral device controllers. In busorganized systems, such as those based on the F6800 microprocessor, the DMAC, rather than the MPU, controls the address and data buses.
F6840 PTM
Block Diagram A, 13
""0 A" A,2 Au 14 15 16 11
A,. HI
A,~
19
The DMAC bus interface includes select, read/write interrupt, transfer request/grant, and bus interface logic to permit data transfer over an 8-bit bidirectional data bus. The F6844 functional configuration is programmed through the data bus. The internal structure provides for control and handling of four individual channels, each of which is separately configured. Programmable control registers provide control for the transfer location and length, individual channel control and transfer mode configuration, priority of servicing, data chaining, and interrupt control. Status and control lines serve the peripheral controllers. The mode of transfer for each channel can be programmed as cycle-stealing or burst transfer. Typical applications include use with the F6856 Synchronous Protocol Communications Controller, the F6854 Advanced Data Link Controller, and the F68488 IEEE-488 Bus Controller. • • • • • • •
@
FOUR DMA CHANNELS, EACH HAVING A 16-BIT ADDRESS REGISTER AND A 16·BIT BYTE COUNT REGISTER 2M BYTE/SEC MAXIMUM DATA TRANSFER RATE SELECTION OF FIXED OR ROTATING PRIORITY SERVICE CONTROL SEPARATE CONTROL BITS FOR EACH CHANNEL DATA CHAIN FUNCTION ADDRESS INCREMENT OR DECREMENT UPDATE PROGRAMMABLE INTERRUPTS AND DMA END TO PERIPHERAL CONTROLLERS
Ie MASTER 1983
F6844DMAC
1279
_
I=AIRCHILD A Schlumberger Company
F6846 ROM-I/O-TIMER
0,_
0._
O2 0)_
GENERAL DESCRIPTION-The F6846 combination chip provides the means. In conjunction with the F6802. to develop a basic 2-chip microcomputer system. The F6846 consists of 2048 bytes of mask programmable ROM. an 8-blt bl-dlrectional data port with control lines. and a 16-bit programmable timer-counter.
0 °S-
This device is capable of interfacing with the F6802 (basic F6800. clock and 128 bytes of RAM) as well as the F6800 if desired. No external logic is required to Interface with most peripheral devices.
'CS o 'CS,140 -
.' 2048 8·BIT BYTES OF MASK·PROGRAMMABLE ROM • 8-BIT BI·DIRECTIONAL DATA PORT FOR PARALLEL INTERFACE PLUS TWO CONTROL LINES '. PROGRAMMABLE INTERVAL TIMER·COUNTER FUNCTIONS • PROGRAMMABLE I/O PERIPHERAL DATA, CONTROL AND DIRECTION REGISTERS • COMPATIBLE WITH THE COMPLETE F6800 MICROCOMPUTER PRODUCT FAMILY • nL·COMPATIBLE DATA AND PERIPHERAL LINES • SINGLE 5 VOLT POWER SUPPLY
_
6
01-
Composite
Status Register
14,_ 142 _ Chip A _ ,::~~cl J
A. _
Addre ••
Input. As-
14 6 _
_cP,
and
Logic
- c P1
Al_
Ae_
14
_
~PP'I
9 14'0_
. - . PP, Peripheral ....--.. PP,> Interface ~ pp (
'B~f~rs
2048 Byte
PP, -PP',
-
ROM 'Muk
....--. PP f , -pp.
Progr.mmable
F6846 RIOT
F68488 GENERAL PURPOSE INTERFACE ADAPTER (GPIA)
vcc
I
TR, BUS HANDSHAKE
GENERAL DESCRIPTION-The F68488 GPIA provides the means to interface between the IEEE 488 standard instrument bus and the F6800. The 488 instrument bus provides a n.eans for controlling and moving data from complex systems of multiple instruments. BUS
Tile F68488 will automatically handle all handshake protocol needed on the instrument bus. • • • • • • • • • • •
MGMT
II
r
3:1 ". r"
~
~
SRO
03
F3448
IFC
SINGLE OR DUAL PRIMARY ADDRESS RECOGNITION SECONDARY ADDRESS CAPABILITY COMPLETE SOURCE AND ACCEPTOR HANDSHAKES PROGRAMMABLE INTERRUPTS RFD HOLD·OFF TO PREVENT DATA OVERRUN PPERATES WITH DMA CONTROLLER ~ERIAL AND PARALLEL POLLING CAPABILITY TALK·ONLY OR LlSTEN·ONLY CAPABILITY 6ELECTABLE AUTOMATIC FEATURES TO MINIMIZE SOFTWARE SYNCHRONIZATION TRIGGER OUTPUT F6800 BUS COMPATIBLE
>-I-~f----
~- L -_ _.+-J
--
~ ~ ~ ~ ~
F68488 GPIA
010,
-
~ ~ 0104
R'W
~
~
~
01°5 010 6
~EG
010 7
DATA 110
BUS
RFD DAV
~
F3448
F6800
~ ~ ~
~ ~
F3448
~
~
~RANT
,I
TR2
I
VSS
F68488 GPIA INTERFACE
F6850 ASYNCHRONOUS COMMUNICATIONS INTERFACE ADAPTER (ACIA) "0
.c
...o
°cu u.
GENERAL DESCRIPTION - The F6850 Asynchronous Communications Interface Adapter (ACIA) provides the data formatting and control to interface serial asynchronous data communications -information to bus organized systems such as the F6800 Microprocessing Unit, ' The bus interface of the F6850 includes select, enable, read/write, interrupt and bus interface logic to allow data transfer over an 8-bit bi-directional data bus, The parallel data of the bus system is serially transmitted and received by the asynchronous data interface, with proper formatting and error checking, The functional configuration of the ACIA is programmed via the data bus during system initialization. A programmable Control Register provides variable word lengths, clock division ratios, transmit control, receive control, and interrupt control. For peripheral or modem operation, three control lines are provided. These lines allow the ACIA to interface directly with the F6860 0-600 ,bps digital modem,
TRANSMIT CLOCK IT. elk)
4 _ _ _ _ _---,
.NA8l."'14----. REAQ/WRITE (RIWI13----..
11
_ _____
_
CHIP SElECT OleSOI 8 _____ CHIP SELECT 1 IC$,I 10
---+-
CHIP SElECT 21CS2' 9---+REGISTER SelECT IRS) 11---+-
00 22 . . .
°1 21 . . . . °2
2
° ....
°3 '9 . . .
• • • • • • • • • •
L----___il>-------
0.18.,.
8 AND 9-BIT TRANSMISSION OPTIONAL EVEN AND ODD PARITY PARITY, OVERRUN AND FRAMING ERROR CHECKING PROGRAMMABLE CONTROL REGISTER OPTIONAL +1. +16, AND +64 CLOCK MODES UP TO 500 kbps TRANSMISSION FALSE-START BIT DELETION PERIPHERAL/MODEM CONTROL FUNCTIONS DOUBLE BUFFERED ONE OR TWO STOP BIT OPERATION
130:0., .. CAHHI[ H
D517~
mUC1·DCI>'
°6 '6 . . . . °7 15 , . . .
Vee
Vss
RECEIVE CLOCK
(R~
elkl
3 _ _ _ _ _ _ _ _ _ _ _ _•
F6850 ACIA
1280
@
Ie MASTER 1983
FAIRCHIL.D A Schlumberger Company
F6852 SYNCHRONOUS SERIAL DATA ADAPTER (SSDA) GENERAL DESCRIPTION - The F6852 Synchronous Serial Data Adapter provides a bi· directional serial interface for synchronous data information interchange. It contains interface logic for simultaneously transmitting and receiving standard synchronous com· munications characters in bus organized systems such as the F6800 Microprocessor systems. .----------.:.::~;:':~::.:'
The bus interface of the F6852 includes Select, Enable, R,ead/Write, Interrupt, and bus interface logic to allow data transfer over an 8·bit bi·directional data bus. The parallel data of the bus system is serially transmitted and received by the synchronous data inter· face with synchronization, fill character insertion/deletion, and error checking. The func· tional configuration of the SSDA is programmed via the data bus during system initializa· tion. Programmable control registers provide control for variable word lengths, transmit control, receive control, synchronization control, and interrupt control. Status, timing and control Hnes provide peripheral or modem control. Typical applications include floppy disk controllers, cassette or cartridge tape controllers, data communications terminals, and numerical control systems.
1-+-+-+-+-----"-- ,~:~~"' 1.....-+-+-+----
• PROGRAMMABLE INTERRUPTS FROM TRANSMITTER, RECEIVER, AND ERROR DETECTION LOGIC • CHARACTER SYNCHRONIZATION ON ONE OR TWO SYNC CODES • EXTERNAL SYNCHRONIZATION AVAILABLE FOR PARALLEL·SERIAL OPERATION • PROGRAMMABLE SYNC CODE REGISTER • UP TO 600 KBPS TRANSMISSION • PERIPHERAL/MODEM CONTROL FUNCTIONS • THREE BYTES OF FIFO BUFFERING ON BOTH TRANSMIT AND RECEIVE • SEVEN, EIGHT, OR NINE BIT TRANSMISSION • OPTIONAL EVEN AND 000 PARITY • PARITY, OVERRUN, AND UNDERFLOW STATUS
,~~~:",
",_TCHI
oAfiTEiliiii"Nii'
Vee Vss
Pm 12 Pin 1
F6852 SSDA
F6854 ADVANCED DATA LINK CONTROLLER (ADLC) GENERAL DESCRIPTION - The F6854/F68A54 Advanced Data Link Controllers (ADLCs) perform the complex MPU/data communication link function. for the Advanced Data Communication Control Procedure (ADCCP), High·level Data Link Control (HDLC) and Synchronous Data Link Control (SDLC) standards, The ADLC provides key interface requirements with improved software efficiency. The ADLC is designed to provide the data communications interface for both primary and secondary stalions in stand·alone, polling and loop configurations. • •
• • • •
F6800 COMPATIBLE PROTOCOL FEATURES • AUTOMATIC FLAG DETECTION AND SYNCHRONIZATION • ZERO INSERTION AND DELECTION • AUTOMATIC ADDRESS FIELD EXTENSION (OPTIONAL) • EXTENDED CONTROL FIELD (OPTIONAL) • AUTO EXTENDABLE LOGIC CONTROL FIELD (OPTIONAL) • VARIABLE WORD LENGTH INFORMATION FIELD (5·, 6·, 7·, OR 8·BIT) • AUTOMATIC FRAME CHECK SEQUENCE GENERATION AND CHECK • ABORT DETECTION AND TRANSMISSION • IDLE DETECTION AND TRANSMISSION MODEMIDATA CHANNEL CONTROL LINES LOOP MODE SINGLE 5 V POWER SUPPLY ENHANCED SPEED OPTIONS·
F35316/F683162048
X
8 ROM F6854 ADLC
GENERAL DESCRIPTION - The F35316/F68316 is a mask·programmable byte· organized MOS Read Only Memory (ROM) designed for use in bus·organized systems requiring non·volatile data storage. It is fabricated with n·channel silicon· gate technology. For ease of use, the F35316/F68316 operates from a single + 5 V power supply, inputs and outputs are TTL and DTL compatible, and the device needs no clocks or refreshing because of its static operation. The F35316/F68316 is compatible with the F6800, F8 and other microcomputer families providing read only storage in byte increments. To facilitate memory expansion, the device contains three programmable Chip Select inputs providing any combination of active HIGH or LOW or an optional DON'T CARE state coupled with output wired·OR capability. Chip select code and memory content are user defined and are fixed during the masking process. The F35316/F68316 provides maximum circuit density, reliability and performance yet maintains low power diSSipation and yields significant cost advantages over an EPROM approach.
"0 00 A, A, 03 04
as
.c
o
06 07
~
'«3 u.. AlO
A9 A8
A6 As
• • • • • • •
• •
©
2048 x 8·BIT BUS·COMPATIBLE ORGANIZATION FULLY STATIC OPERATION 3·STATE DATA OUTPUTS FOR WIRED·OR CAPABILITY MASK·PROGRAMMABLE CHIP SELECTS FOR SIMPLIFIED MEMORY EXPANSION SINGLE + 5 V ± 10% POWER SUPPLY TTL AND DTL·COMPATIBLE INPUTS MULTIPLE SPEED GRADES t ACC 250 ns, 300 ns (F35316) t ACC = 350 ns, 450 ns, 500 ns (F68316) DIRECTLY COMPATIBLE WITH 2316E PIN COMPATIBLE WITH F2708 and F2716 EPROMs
=
Ie MASTER 1983
18,384·BIT CELL MATRIX 128.128
Ao
F35316/F68316 ROM
1281
FAIRCHILD A Schlumberger Company
F3532/F68332/F35334096 (ROM)
X
8·BIT READ ONLY MEMORY 00 0, 0, OJ O. 0, O. 0,
An
GENERAL DESCRIPTION - The F3532/F68332 and F3533 are 4096 x 8-bit maskprogrammable read only memories (ROMs), fabricated with n-channel silicon gate technology. They are designed for use in bus-organized systems requiring nonvolatile data storage. For ease of use, the F3532/F68332 and F3533 require only a single + 5 V power supply, have TIL-compatible inputs and outputs, and, due to their static operation, need no clocking or refreshing. Electrically identical, the F3532/F68332 and F3533 represent both JEDEC standard pinouts, thus providing compatibility with other available 32K ROMs and EPROMs. To facilitate memory expansion, these devices offer two programmable Chip Select inputs whose active levels are user defined. The F3523-30/F3533:30 and F3532/F3533-35 are high speed devices, allowing interface with faster generations of NMOS microprocessors. • • • • • • • • •
COMPLETELY STATIC OPERATION 8-BIT BUS COMPATIBLE ORGANIZATION 3-STATE OUTPUTS TWO-PROGRAMMABLE CHIP, SELECT INPUTS SINGLE + 5 V ± 10% SUPPLY FULLY TIL COMPATIBLE' 3 SPEED GRADES-t ACC = 300,.350, 450 ns BOTH JEDEC STANDARD PINOUTS PIN COMPATIBLE WITH OTHER 32K ROMs AND EPROM.
F35648192
X
CHIP ... CS, SElECT INPUT
32.768-BIT CELL MATRIX
BUFFER
... CS2
F3532/F68332/F3533 ROM
8·BIT READ ONLY MEMORY (ROM)
GENERAL DESCRIPTION - The F3564 8192 x 8-blt (64K) mask-programmable read-only memory (ROM) is designed for use In bus-organized systems requiring non-volatile memory storage. Because of Its high speed, It readily Interfaces with all generations of NMOS microprocessors. Fabricated with n-channel silicon-gate technology, the F3564 has Industry-standard pinouts and is compatible with other available 24-pln 16K, 32K, and 64K ROMs and EPROMs. • • • • • • • • •
ADDRESS LATCH FEATURE SINGLE 5 V POWER SUPPLY AUTOMATIC POWER-DOWN ACCESS TIME (t AA) OF 250 n. FOR F3584·25 AND 350 ns FOR F3564-35 LOW POWER DISSIPATION (440 mW, MAXIMUM, ACTIVE; 55 mW, MAXIMUM, STANDBY) FULLY TTL-COMPATIBLE THREE·STATE OUTPUT MASK-PROGRAMMABLE ENABLE FUNCTION PIN-COMPATIBLE WITH OTHER STANDARD 24·PIN 16K, 32K, AND 64K ROMs AND EPROM.
The programmable enable (E) Input of the F3564 controls the output and the activestandby modes of operation, The active level of the E input and the memory contents are user-defined, .
A'2 Al1 A, o Ag As A7
As As A. A3 A2
.c o
"-
as
LL
F35658192
X
65536·BIT CELL MATRIX
A, Ao
The F3564 requires only a single + 5 V power supply, has TIL-compatible inputs and outputs, and, due to Its static operation, requires no clocking or refreshing.
"0
ADDRESS INPUT BUFFERS
F3564 ROM
8-BIT READ ONLY MEMORY (ROM)
GENERAL DESCRIPTION - The F3565 8192 x 8-bit (64K) mask-programmable read-only memory (ROM) Is designed for use in bus-organized systems requiring non-volatile memory storage. Because of its high speed, it readily interfaces with all generations of NMOS microprocessors. Fabricated with n-channel silicon-gate technology, the F3565 has industry-standard pinouts and Is compatible with other available 24-pin 16K, 32K, and 64K ROMs and EPROMs. • • • • • • • • •
COMPLETELY STATIC OPERATION SINGLE 5 V POWER SUPPLY AUTOMATIC POWER-DOWN ACCESS TIME (tAA ) of 250 ns FOR F3565-25 AND 350 ns FOR F3565-35 LOW POWER DISSIPATION (440 mW, MAXIMUM, ACTIVE; 55 mW, MAXIMUM, STANDBY) FULLY TTL-COMPATIBLE THREE·STATE OUTPUT MASK·PROGRAMMABLE ENABLE FUNCTION PIN·COMPATIBLE WITH OTHER STANDARD 24-PIN 16K, 32K, AND 64K ROMs AND EPROMs
The programmable enable (E) input of the F3565 controls the output and the active/standby modes of operation. The active level of the E input and the memory contents are user:defined. The F3565 requires only a single + 5 V power supply. has TTL-compatible inputs and outputs. and. due to ils static operation. requires no clocking or refreshing.
'1282
F3565 ROM
©
Ie MASTER 1983
FAIRCHILD A Schlumberger Company
F3566 8192
X
8·BIT READ ONLY MEMORY (ROM)
GENERAL DESCRIPTION - The F3566 8192 x 8·bit (64K) read·only memory (ROM) is designed for use in bus·organized systems requiring non·volatile memory storage. Because of its high speed, it readily interfaces with all generations of NMOS micro· processors.
00 0 ,
a, a, o. as a. a, TS
A"
Fabricated with n·channel silicon·gate teChnology, the F3566 has industry·standard pinouts and is compatible with other available 24·pin 16K, 32K, and 64K ROMs and EPROMs. • • .• • • • • • •
All A,O
COMPLETELY STATIC OPERATION SINGLE 5 V POWER SUPPLY HIGH·SPEED DATA VALID TIME OF 120 ns ACCESS TIME (t AA ) OF 250 ns for F3566·25 AND 350 ns F3566·35 LOW POWER DISSIPATION (440 mW, MAXIMUM, ACTIVE) FULLY TIL·COMPATIBLE THREE·STATE OUTPUT MASK·PROGRAMMABLE ENABLE FUNCTION PIN·COMPATIBLE WITH OTHER STANDARD 24·PIN 16K, 32K, and 64K ROMs AND EPROMs
A. A. A, A. As
ADDRESS INPUT BUFFERS
A. A, A, A, Ao
The output enable (G) input controls the output and provides test data and valid time for high·speed microprocessor applications. The G input and the memory are user· defined. .
F35688192
X
F3566 ROM
8·BIT READ ONLY MEMORY (ROM)
GENERAL DESCRIPTION - The F3568 8192 x 8·bit (64K) mask·programmable, read·only memory (ROM) is designed for use in bus·organized systems requiring non·volatile memory storage. Because of its high speed, it readily interfaces with all generations of NMOS·microprocessors. Fabricated with n·channel silicon·gate technology, the F3568 has industry·standard pinouts and is compatible with other available 64K ROMs and EPROMs. • • • • • • • • •
ADDRESS LATCH FEATURE AUTOMATIC POWER·DOWN ACCESS TIME (tAA ) OF 250 ns FOR F3568·25 AND 350 ns FOR F3568·35 LOW POWER DISSIPATION (440 mW, MAXIMUM, ACTIVE; 55 mW, MAXIMUM, STANDBY) FULLY TIL·COMPATIBLE THREE·STATE OUTPUTS MASK·PROGRAMMABLE ENABLE FUNCTION SINGLE 5 V POWER SUPPLY PIN·COMPATIBLE WITH OTHER STANDARD 28·PIN 64K PROMs AND EPROMs
The chip enable (CE) input of the F3568 latches the addresses and controls the active and standby modes of operation; the output enable (OE) input controls the chip outputs and provides fast data valid time for high·speed microcomputer applications. Two chip select (CS) inputs are provided for memory expansion. The active levels of the CE and CS inputs, and the memory contents, are user·defined.
F35698192
X
F3568 ROM
"C
8·BIT READ ONLY MEMORY (ROM)
..c: (.)
GENERAL DESCRIPTION - The F3569 8192 x 8·bit (64K) mask·programmable read·only memory (ROM) is designed for use in bus·organized systems requiring non·volatile memory storage. Because of its high speed, it readily interfaces with all ., : generations of NMOS microprocessors.
00
'-
a, 0,0,0,0,0.07
Fabricated with n·channel silicon·gate technology, the F3569 has industry·standard , . pinouts and is compatible with other available 28·pin 64K ROMs and EPROMs. • AUTOMATIC POWER· DOWN . •• ACCESS TIME (t AA) OF 250 ns FOR F3569·25 AND 350 ns FOR F3569·35 LOW POWER DISSIPATION (440 mW, MAXIMUM, ACTIVE; 55 mW, MAXIMUM, STANDBY) • FULLY TIL·COMPATIBLE • THREE·STATE OUTPUTS • MASK·PROGRAMMABLE ENABLE FUNCTION • SINGLE 5 V POWER SUPPLY • COMPLETELY STATIC OPERATION • PIN·COMPATIBLE WITH OTHER STANDARD 28·PIN 64K ROMs and PROMs The chip enable (CE) input of the F3569 controls and acive and standby modes of operation; the output enable (OE) input controls the chip output and provides fast data available time for high·speed microcomputer applications. Two chip select (CS) inputs are provided for memory expansion. The active levels of the CE and CS· inputs, and the memory contents, are user·defined. @
Ie MASTER 1983
F3569 ROM
1283
F3570 64K ROM
FAIRCHILD A ~Chlumberger Company
Microprocessor Product
Description The Fairchild F3570 8192 x 8-bit (64K) mask-programmab"le, r'ead-onlY memory (ROM) is designed for use in bus-organized systems requiring non-volatile memory storage. Because of its high speed, it readily interfaces with all generations of NMOS microprocessors.
• • • •
Fabricated with n-channel silicon-gate technology, the F3570 has industry-standard pinouts and is compatible with other available 28-pin 64K ROMs and EPROMs.
The output enable (OE) input controls the chip output and provides fast data valid time for high-speed microprocessor applications. Two chip select (CS) inputs are provided for memory expansion. The active levels of the CS inputs, and the memory contents, are user-defined.
• • • • •
Access Time (tAA ) of 250 ns for F3570·25 and 350 ns for F3570·35 High·Speed Data Valid Time of 120 ns Low Power Dissipation (440 mW, Maximum, Active) Fully TTL·Compatible Three·State Outputs
Mask·Programmable Chip Select Active Levels Single 5 V Power Supply Completely Static Operation Pin·Compatible with Other Standard 28·Pin 64K ROMs . and EPROMs
The F3570 requires only a single + 5 V power supply, has TIL-compatible inputs and outputs, and, due to its static operation, requires no clocking or refreshing.
QOQ1Q2Q3Q4QSQ6Q7
OE
OUTPUT BUFFERS
A12 A11 A10 Ag
CHIP SELECT INPUT BUFFERS
Y DECODER 1·0F·32 BYTES
As A7 A6 As A4 A3
'U
..c
A2
'-
A1
(J
CU
u.
Ao
1284
ADDRESS INPUT BUFFERS
en
CS1/CS1 CS2/CS2
256
1 2
a:;:
WO
Ca:"
°eo WN (J1l)
Cu.;
xO ,....
•• •
65536·BIT CELL MATRIX
256
© Ie MASTER 1983.
F9445 Family
FAIRCHILO A Schlumberger Company
16-Bit High-Speed Microprocessor 13L® Bipolar VLSI Technology Device
PkgType
Features
F9445CPU Clock Speed 16MHz 20 MHz 24 MHz
40-Pin DIP or Chip Carrier
• Advanced Parallel Architecture • Fast Execution Times -16 x 16 Bit Multiply: 3.5!J.s (20 MHz Clock) • Operating Temperature Range: -55 0 C to + 1250 C
F9447
64-Pin, 50-Mil DIP or Chip Carrier
• 1/0 Controller - Provides All Timing and Decode Signals for IB Access for Peripheral Devices - F9445 1/0 and Data Channel Timing • Operating Temperature Range: -55 0 C to + 1250 C
F9448
64-Pin, 50-Mil DIP or Chip Carrier
• Programmable Multiport Interface - Four Independent 1/0 Ports Provide Interface Between F9445 and Industry-Standard 1/0 Devices. - Memory-Mapped and Programmed 1/0 - Interfaces With Serial, Parallel DMA, and Other SpecialPurpose Devices - Programmable Peripheral Timing • Operating Temperature Range: -55 0 C to + 1250 C
F9449
64-Pin, 50-Mil DIP or Chip Carrier
• Multiple Data Channel Controller • - Provides Control of Four Independent Data Channels - Internal Priority Arbitration - Supports Memory-to-Memory Transfers • Operating Temperature Rang~: -55 0 C to + 1250 C
F9444
64-Pin, 50-Mil DIP or Chip Carrier
• Memory Management and Protection Unit - Expands Memory Addressing to 4M Bytes - 1/0 Protection - Validity Protection - Runaway Defer Protection - Auto Increment/Decrement Protection • Operating Temperature Range: -55 0 C to + 1250 C
F9446
64-Pin, 50-Mil DIP or Chip Carrier
• Dynamic Memory Controller - 16K or64K Memories - Automat:c Page Mode - Complete Memory Timing Signals - 3-State Outputs for Multiport Memories - Internal Refresh Rate Ti mer • Operating Temperature Range: -55 0 C to + 1250 C
40-Pin DIP
• Console and Communication Controller - Provides Console. Control for F9445 System • Operating Temperature Range:-55° C to + 1250 C • NMOS Technology
1/0 Interface
Memory Interface
Console F9470
© Ie MASTER 1983
1285
F9443 Floating-Point Processor
FAIRCHILD A Schlumberger Company
Microprocessor Product Description
•
The F9443 Floating-Point Processor is designed to provide enhancement to the numeric capabilities of 16-bit microprocessors by providing a set of floatingpoint instructions. It can interface with the F9445, F9450 . or any other standard 16-bit microprocessor, and it uses the microprocessor memory to directly fetch the required operands. It has eight general-purpose registers on-chip and supports all the basic functions with on-chip microcode. Use of additional off-chip microcode readonly memories (ROMs) provides extended capabilities. Figure 1 is a block diagram of the F9443.
•
Circuit Description
• •
• • • • • • •
Full IEEE SP D DX Floating-Point Standard Support (80 Bits) Fast Algorithms for Add, Subtract, Multiply, Square ' Root, and Divide Functions Support for Full Set of Trigonometric Exponential and Logarithmic Functions . Expandable Instruction Set That Can Include Macro Operations (e.g., Vector rotate, Fourier Transform, Array and Matrix Applications) User-Alterable Microcode for User Functions Support of Integer Decimal and Logical Functions Standard 64·Pin Package 13L ® High Speed Bipolar Logic Low·Power Schottky·Compatible 110 Very Fast Execution Times Interface to Any 16·Bit Microprocessor
The F9443 includes special hardware to provide fast , algorithms for the basic functions. This hardware includes full-carry look-ahead for add and subtract (ADD/SUB) functions, recoding logic for multiply and square root functions, and partial-remainder-prediction logic for divide functions. An advanced control scheme provides a 2-level microcode/nanocode control with offchip microcode expansion. The off-chip microcode can be programmable ROM (PROM) or random-access memory (RAM), with easy expansion for fast implementation of user algorithms. Operation of the F9443 can proceed in parallel with the host processor to maximize throughput. Multiple F9443s can be connected to the host processor ,for array processing or other high-speed applications.
Figure 1
9443 Block Diagram
SYSTEM
(!)
BU~
INSTRUCTION REGISTER
MICROCODE ROM
18·BIT ARITHMETIC AND LOGIC UNIT
16·BIT ARITHMETIC AND LOGIC UNIT
NANOCODE ROM
8 )( 40 RAM
32.BIT ARITHMETIC AND LOGIC UNIT
IEEE 488 DATA BUS (8)
CS.RD·~
IEEE 488 STATE DIAGRAM AND CONTROL LOGIC
CTTL
DMAR DMAG TRIG OR DMAE
CPU(8)
cs------.-J
1304
© Ie MASTER 1983
FUJITSU
MBLS086
MICROELECTRONICS
16·BIT GENERAL PURPOSE :MICROPROCESSOR
MBL8086
GENERAL DESCRIPTION The MBL8086 is a new high performance microprocessor fabricated using N-channel, depletion load, silicon gate technology and packaged in a 40-pin package. The processor has attributes of both 8- and 16-bit microprocessors. It addresses memory as a sequence of 8-bit bytes, but has a 16-bit wide physical path to memory for high performance. The MBL8086 is compatible with Intel 8086 microprocessor and will be supported with several peripheral devices, including the MBL8089 1/0 processor device during 1982.
FEATURES • Assembly language compatible with 8080/8085 microprocessors • Bit. byte, word and block operations • 24 Operand Addressing Modes • 8-and 16-bit Signed and unsigned arithmetic in binary or decimal, including multiply and divide • 5 MHz Clock Rate • 14 word, by 16-bit Register Set with Symmetrical Operations
PIN ASSIGNMENT GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 ADS AD4 AD3 AD2 AD1 ADO NMI INTR ClK GND
Vee AD1S A16/S3 A17/S4 A18/SS A19/S6 BHE/S7 MN/MX RD RQ/GTO (HOLD) RQ/Gn (HlDA) lOCK (WR) 52 (M/iO)
51
(DTlR)
SO
(DEN) QSO (ALE) QS1 (lNTA) TEST READY RESET
• Compatible with Intel 8086
MICROCOMPUTER AND PERIPHERAL GUIDE Description
Max. Power Dissipation (W)
Alternate Source (Intel)
High-Performance 16-Bit Microprocessor/ 1M-Byte Memory Direct Addressing Capability/14-Word. By 16-Bit Register Set with Symmetrical Operations/ 24 Operand Addressing Modes
2.5
8086 8086-2
Numeric Processor Extension used with 8086 and 8088 I/O Processor Extension used with 8086 and 8088
-
8087
-
8089
2.5
8088
Device Number MBL8086 MBL8086-2
°MBL8087 MBL8089 MBL8088
8-Bit Microprocess/16-Bit Internal Architecture with 8-Bit Interface Direct Software Compatible with MBL8086
UJ
o
c o 20...... o
Q) Q)
MBL8259A
-
o
Programmable Interrupt Controller/ 8 Level Priority/Expandable to 64 Levels/ Programmable Interrupt Modes/ Indivisual Request Mask Capability
1
MBL8282
8-Bit Latch (Non-Inverting)
1
MBL8283
8~Bit Latch (Inverting)
1
8283
05'
MBL8284A
1
8284A
LL
MBL8286
Clock Generator and Driver for MBL8086 Series 8-Bit Transceiver (Non-Inverting)
1
8286
MBL8287
8-Bit Bus Transceiver (Inverting)
1
8287
MBL8288
Bus Controller for MBL8086 Series Bipolar Driver Capability Advanced CommandslWide System-Configuration Flexibility
1.5
8288
MBL8289
Bus Arbiter
1
8289
8259A
20-
o
~ :::J UJ
8282
=:
• Available soon . For complete data sheets contact: Fujitsu Microelectronics • 2985 Kifer Road • Santa Clara, CA 95051 • (408) 727-1700· Telex 1/11: 910-338-0190
@
Ie MASTER 1983
1305
FUJITSU
MB884 0 IMB88400 Series MB885 0 IMB885 0 0 Series
MICROELECTRONICS
SINGLE COMPONENT 4-BIT· MICROCOMPUTER SERIES
MB88200Series
GENERAL DESCRIPTION
FEATURES
This 4-bit series, available in both CMOS and NMOS, provides the user with a common architecture, instruction set and speed regardless of which device in the family is selected. As shown, various combinations of options are available so that a processor can specifically be tailored to an application and thereby be cost effective. On-board timers, LCD driver, AID or D/A converter and power down options are available. To facilitate . prototype development, devices with piggyback EPROMS are available for each subseries. Devices are provided in standard DIP, skinny DIP (70 mil pin spacing) or flatpack.
• Various RAM and ROM levels available • 57 I/O lines maximum • 3 p.S Instruction Cycle Time at 2 MHz clock rate • TTUCMOS compatible I/O level • 70 powerful instructions for NMOS version • 72 powerful instructions including power saving HALT and STOP modes for CMOS version
Technology
Device Number MB8841 MB8842 MB8843 MB8844 MB88401 MB88411
NMOS
MB88413 MB88421 MB88423 MB8851 MB8853 MB8854 MB8851A MB8854A MB8851L MB8854L MB88501
MB88503 CMOS
MB88535 MB88536 MB88541 MB88201 MB88202
Package 42-pin 28-pin 42-pin 28-pin 42-pin 42-pin 42-pin 42-pin 42-pin 42-pin 64-pin 64-pin
DIP DIP DIP DIP DIP SDIP DIP SDIP DIP SDIP SDIP SDIP
42-pin 42-pin 28-pin 42-pin 28-pin 42-pin 28-pin _42-pin 42-pin
DIP DIP DIP DIP DIP DIP DIP DIP SDIP
42-pin DIP 42-pin SDIP 42-pin DIP 42-pin SDIP 42-pin DIP 42-pin SDIP 7a-pin FLTPK 16-pin DIP 16-pin DIP
ROM
RAM
I/O Ports
VCC
2Kx 8 2Kx 8 1Kx 8 1K x 8
128 x 4 128 x4 64x4 64x4
37 23 37 23
+5V +5V +5V +5V
4Kx 8
192 x4
36
+5V
On-board PLA
4Kx 8
192 x4
32
+5V
8-bit ND converter
2Kx 8
192 x 4
32
+5V
8-bit ND converter
4Kx 8 2Kx 8
192 x4 128 x4
57 57
+5V +5V
Watch-dog timer, Detect circuit for power down
1Kx 8 1K x 8 1Kx 8 2Kx 8 1K x 8 2Kx 8 1K x 8
64Kx4 64Kx4 64x4 128 x4 64x4 128 x 4 64x4
37 37 23 37 23 37 23
+5V +5V +5V
4Kx 8
192 x4
36
Comments
-
Vee = 6.0 - 3.5V Vee=3.5-2.5V -S: 5V
2Kx 8
128 x4
36
2Kx 8
128 x4
34
2Kx 8
128 x4
34
4Kx 8 512 x 8 1024 x 8
196 x 4 16 x 4 32 x4
29 12 12
-A: 3.5 - 6.0V
-
-L: 2.5 - 4.0V -S: 5V -A: 3.5 - 6.0V -L: 2.5 - 4.0V 6-bif, 3 CHL +5V D/A converter 6-bit, 3 CHL 13-bit +5V 1 CHL D/A converter LCD Driver +5V Low cost series +5V Low cost series +5V
For complete data sheets contact: Fujitsu Microelectronics • 2985 Kifer Road • Santa Clara, CA 95051 • (408) 727·1700. Telex 1111: 910·338·0190
1306
© Ie MASTER 1983
FUJITSU
MBL80C49 MBL80C39
MICROELECTRONICS
CMOS SINGLE CHIP 8·BIT MICROCOMPUTER GENERAL DESCRIPTION The Fujitsu MBL80C49/MBB0C39 is a totally self-contained 8-bit single-chip microcomputer fabricated with silicon-gate CMOS technology. The MBL80C49 has a 2K x 8 ROM program memory, a 128 x 8 RAM data memory, 27 I/O ports, an 8-bit timer/counter, and clock generator on chip. The MBL80C39 is identical to the MBL80C49 except without program memory. It can be used with external memory for system prototyping and pre-
production systems. The design is optimized for low cost and high performance applications because the MBL80C49/ MB80C39 is fabricated on a Single silicon chip and can be used for applications that require additional expansion of ROM, RAM, I/O ports, etc. This microcomputer permits external program operation and Single-step operation.
Low power applications are possible by using the stand-by mode feature. The software is upward compatible with the MBL8049/ MBL8039 and Intel i8049/i8039. The MBL80C49/MB80C39' uses a Single power supply of +5V. It is packaged in a standard 40-pin DIP and operation is guaranteed over the range of -40°C to +85°C.
FEATURES • •
• •
12-bit Addressing 98 Instructions (232 Instruction Codes): 70% of Instructions are Single Byte 2.51LS Instruction Cycle: All Instructions are 1 or 2 Cycles On-chlp Clock Generator (or External Clock Source) Device Number
MBL80C49 MBLBOC39 (ROM-less) MBLB051 MBLB031 (ROM-less)
• • • • • • •
2K x bit ROM 128 x 8 bit RAM 27110 Lines 8-bit Interval TimerlEvent Counter 8-Level Stack 8 pairs of Working Registers Low-power Standby Mode Capability by HALT and STOP Instructions
• • • • •
External Program Mode Capability Single-step Operation Capability Easily Expandable Memory and 1/0 Single-level Interrupt Capability ALU Functions: Addition, Decimal Adjust Addition, and Logic Operations
Freq.
Power Supply (V)
Power DiSSipation (mW Max.)
CMOS18-Bit Microcomputerl 98 Instructions with Bit Operationsl On-
f-
tr
E
~
::J
:....
...... en r:::: RAM (48 x 8) F20·F77
CO :....
PROGRAM ROM 1024 x 13
a> r:::: a>
(!J
0 f-
tr
~
10 RT
8-BIT DATA BUS MCLR
© Ie MASTER 1983
1309
PIC1670 ARCHITECTURAL DESCRIPTION The firmware architecture of the PIC1670 microcomputer is based on a register file concept with simple yet powerful instruction commands designed to optimize the code for bit, byte, and register transfer operations. The instruction set also supports computing functions as well as these control and interface functions. Internally, the functional blocks of the PIC1670 are connected by an a-bit bidirectional bus: the 64 a-bit registers of which the first 16 are special purpose, an Arithmetic Logic Unit, and a user defined program ROM composed of 1024 x 13 words. The register file is divided into two functional groups: operational registers and general purpose registers. The first sixteen are the operational registers and they include the Real Time Clock Counter A and B, four I/O registers, two Status registers, a Program Counter and a File Select Register. The general purpose registers are used for data and control information under command of the· instructions.
The Arithmetic Logic Unit contains one temporary working register (W Register), an adder, and hardware for decimal adjust. Manipulation between data in the working register and any other register can be performed. The Program ROM contains the user defined application program and is supported by an instruction decoder and instruction register. Sequencing of microinstructions is controlled via the Program Counter (PC) which automatically increments to execute in-line programs. The Program Counter is modified by bit test, jump, call or branch instructions and the lower a-bits can be modified for computed addresses by file register instructions. In addition, an on-chip six level stack is employed to push and pull the contents of the program counter. This provides easy to use subroutine nesting. Activating the MCLR input on power-up initializes the ROM program to address 17778 .
PIN FUNCTIONS Signal
Function
OSC1 (Input), OSC2 (output)
Oscillator pins. The on-board oscillator can be driven by an external crystal, ceramic resonator or LC network, or an external clock via these pins.
RT (Input)
Real Time Input. Negative transitions onthis pin increment the RTCC (F6) register. This pin can also be used for an interrupt input. This pin uses a Schmitt trigger input. There is no internal active pull-up device.
RAO-7, RBO-7, RCO-7, RDO-7
User programmable input/output lines. These lines can be used as inputs and/or outputs and are under direct control of the program.
MCLR (Input)
Master Clear. Used to initialize the internal ROM program to address 1777e, latch all I/O registers high, and disables the interrupts. This pin uses a Schmitt trigger input. There is no internal active pull-up device.
TEST
Test pin. This pin is used for testing purposes only. It must be grounded for normal operation.
Voo
Power supply pin.
Vss CLKOUT
Ground pin. Clock Output. A signal derived from the internal oscillator. May be used by external circuitry to synchronize with PIC1670 timing.
PIN CONFIGURATION 40 LEAD DUAL IN LINE Top View
.....
--;;..OSCl
Q)
-OSC2
e:
E :::J
.....en ~
e:
(ij ~
Q)
e: Q)' (!)
MCLR~
~AAO ~RAl
RD7~
~RA2
RD6~
_RA3
RDS~
-CLKOUT _AA4
RD4~
_RAS _RA6
RD2~
_RA7
RDO~
~RBO
RC7~
RD3~
RD1~
~RBl
RC6~
~RB2
RCS_
~RB3
_
RB4
_RBS ~RB6
_
RB7
- , Vss
1310
voo -
R'T_
AC4~
RC3 _
RC2~
RC1 _
RCO~
TEST ___
© Ie MASTER 1983
GENERAL INSfRUMENT
PIC1670 REGISTER FILE ARRANGEMENT File (Octal) FO F1
Function . Not a physical register. FO calls for contents of the FSR (F4) to be used to select a file register. F4 is used as an indirect address pointer. W Register - The working register.
F2
Program Counter -
F3
Arithmetic Status Register 7
654
Points to the next program ROM address to be executed.
321
0
I 0 I X IA91ABlovi z loci C I Bit 0 (C) -
Bit 0 is the carry flag, and is usually the carry from the A.L.U., also used as a borrow in subtract instructions.
Bit 1 (DC) - Bit 1 is the half carry (decimal carry) and is used to indic~te a carry from bit 3 in the A.L.U. as the result of an addition (byte). This bit is used in the decimal adjust instruction to allow B.C.O. decimal addition. Bit 2 (Z) Bit 3 (OV) -
Bit 2 is the zero flag and is set to a one if the results of the previous operation was identically zero. Bit 3 is the overflow flag, and is set to a one by operations which cause a signed two's complement arithmetic overflow. The bit is set when the carry from the MSB in the A.L.U. is opposite to the carry from the MSB-1 bit.
Bit 4 (AB) -
Bit 4 is the 9th bit of the program counter. This bit is a read only bit.
Bit 5 (A9) -
Bit 5 is the 10th bit of the program counter. This bit is a read only bit.
F4
File Select Register - The FSR is used in generating effective file register addresses under program control.
F5
Interrupt Status Register X CNTE AlB CNTS RTCIR XIR RTCIE XIE Used to control interrupts and registers F6 and F7. RTCCA and RTCCB - Real Time Clock Counters A & B respectively can be configured as a single 16 bit counter, an 8 bit counter and an 8 bit general purpose register, or two general purpose registers when no external counting is required. The RTCC registers can be loaded and read by the program, as well as count negative transitions on the RT pin or count at 1/8 the frequency of the oscillator. If data are being stored into RTCCA simultaneous with a negative transition on the RT pin (and CNTE=1 and CNTS=1), RTCCA will contain the new stored value and the external transition will be ignored by the microcomputer. (See the section "Real Time Clock Interrupt" for further details about the RTCC.)
F6,F7
F10,11
I I
I I
I
I
I
I
I-
I/O Port A
F12,13
I/O Port B
F14,15
I/O Port C
F16,17
I/O Port 0
F20,77
General Purpose Registers-Used for temporary and general purpose storage during program execution time.
NOTE:
F10, 12, 14 & 16 are the I/O registers and F11, 13, 15 & 17 are used for reading the actual pin levels.
.....c Q)
E :J J... ..... en c
as J... Q)
C Q)
CJ
©
Ie MASTER 1983
1311
GENERAL INSfRUMENT
PIC1670
Basic Instruction
Se~
Summary
"d" is one, the result is returned to the file register specifif~d in the instruction. For bit-oriented instructions, "b" represents a bit field designator which selects the number of the bit affected by the operation, while "f" represents the number of the file in which the bit is located. For literal and control operations, "k" represents an eight or nine bit constant or literal value. For an oscillator frequency of 4MHzthe instruction execution time is 2.0llsec unless a conditional test is true or the program counter is changed as a result of an instruction. I n these two cases, the instruction execution time is 4.0 Ilsec.
Each PIC instruction is a 13-bit word divided into an OP code which specifies the instruction type and one or more operands which further specify the operation of the instruction. The follow-: ing PIC instruction summary lists byte-oriented, bit-oriented, and literal and control operations. For byte-oriented instructions, "f" represents a file register designator and "d" represents a destination designator. The file register designator specifies which one of the PIC file registers is to be utilized by the instruction. The destination designator specifies where the result of the operation performed by the instruction is to be placed. If "d" is zero, the result is placed in the PIC W register. If (12-7)
Inllrucllon-Blnary (Oclal)
Name
6 0 0
000 000 000 000 000 001 001 001 001 o10 o10 o10 o10 o1 1 o1 1 o11 o1 1
000 00 1 1d 10 d 1 , d 00 d Old 10 d 1 1d 00 d Old 10 d 1 1d 00 d Old 10 d 1 1d
.
000 I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I ( I I I I I I I I I I I I I
1 I I I I I I I I I I
00 I I I I I I I I I I I I I I I I I I I I I I I I I I I I
(00004) (00100) (00200) (00400) (00600) (01000) (01200) (01400) (01600) (02000) (02200) (02400) (02600) (03000) (03200) (03400) (03600)
000 000 000 000 000 000 000 000
000 001 o10 o1 1 100\ 101 1 10 11 1
I I I I I I I I
I I I I I I I I
(10000) (10100) (10200) (10300) (10400) (10500) (10600) (10700)
0 0 0 0
1 00 101 1 1 0 111
b b b b
(04000) (05000) (06000) (07000)
b b
b b b b b b
(])
LITERAL AND CONTROL OPERATIONS
E
Inllructlon-Blnary (Octal)
...... (J)
0 0 0 0 1
~
c
(ij ~
(])
c
(])
~
'000 000 000 000 001 001 o10 010 o11 o11
000 000 000 000 ok k 1 k k ok k 1 k k ok k 1 k k
000 000 000 000 k k k k k k k k k k k k k k k k k k
Mnemonic, Operandi
(12-6)
(5-0)
OP CODE
f (FILE II)
(00000) (00001) (00002) (00003) (11000) (11400) (12000) (12400) (13000) (13400)
Mnemonic, Operands
Operallon
MOVFW CLRF RRNCF RLNCF CPFSL T CPFSEQ CPFSGT TESTF
I-W 0-1 I(n)-d(n-l). f(O). -1(7) I(n)-d(n+ 1). 1(7) . .,-1(0) I - W. Skip il C 0 I - W. Skip il ~ =:= 1 I - W. Skip if Z • C 1 I-I
=
kkk kkk
kkk kkk
Sialul Affecled Z Z
=
=
(12-9)
(8-6)
(5-0)
OP CODE
b (BIT II)
f (FILE II)
Z
Name
Mnemonic, Operandi
Operallon
Bit Bit Bit Bit
BCF BSF BTFSC BTFSS
O-I(b) l-I(b) Bit Test I(b): skip il clear Bit Test I(b): skip il set
clear II Ie set Ille test. skip II clear test. skip II set
I.b I.b I.b I.b
Sialul Affecled
(7-0) k (LITERAL)
Name
Mnemonic, Operands
Operation
No Operation Halt In PIC1665 Return Irom Interrupt Return Irom Subroutine Move Literal to W Add literal to W Inclusive OR Literal to W And literal and W Exclusive OR literal and W Return and load literal in W
NOP HALT RETFI RETFS MOVLW ADDLW IORLW ANDLW XORLW RETLW
Stack - PC Stack - PC k':'W k+W-W kVW-W k.W-W k0w-w k-W. Stack -PC
(12-10)
(9-0)
OP CODE
k (LITERAL)
Instruction-Binary (Oclal) 10k 11k
Sialul Affected
Move 'Ile to W Clear Ille Rotate Ille rlght/no carry Rotate Ille lell/no carry Compare Ille to W. skip II F < W Compare Ille to W. skip II F W Compare Ille to W. skip II F > W Move Ille to Itself
(12-8) OP CODE
000 001 o10 o1 1 k k k k k k k k k k k k k k k k k k
I I.d I.d I.d I.d I.d I·.d I.d I.d I.d I.d I.d I.d I.d I.d I.d
Operallon
(Note 1) C W-I f+W+c -d OV,C,DC,Z OV,C.DC,Z f+W + 1-d I -l-d OV.C.DC.Z WVI-d Z W.I-d Z W01-d Z W+I-d OV,C.DC,Z W+f+c-d OV.C.DC.Z f-d Z f+1-d OV.C.DC.Z I - 1- d. skip il zero I(n)-d(n-l). c-d(7). I(O)-c C f(n)-d(n+l). c-d(O). f(7)-c C 1(0-3)~ (4-7)-d 1+1 -d. skip II zero
Name
BIT ORIENTED fiLE REGISTER OPERATIONS Inllructlon-Blnary (Oclal)
.
DAW Decimal adJust W Move W to Ille MOVWF Subtract W Irom Ille wi borrow SUBBWF SUBWF Subtract W Irom Ille Decrement Ille DECF Inclusive or W with file IORWF And W with Ille ANDWF Exclusive OR W with Ille XORWF Add W with Ille ADDWF Add W to Ille with carry ADCWF Complement Ille COMPF Increment Ille INCF Decrement Ille. skip II zero DECFSZ Rotate Ille right thru carry RRCF Rotate Ille lelt thru carry RLCF Swap upper and lower nibble 01 Ille SWAPF Increment Ille. skip II zero INCFSZ
I Inllrucllon-Blnary (Octal)
::J
(5-0)
r----O-P-C-O-D-E---.-d~I--t-(F':"'I-LE~II)--'
0 0 0 0 0 0 0 0 0 0 0 0 0 0
.....c
(6)
BYTE ORIENTED fiLE REGISTER OPERATIONS
OV.C.DC.Z
Z Z Z
Mnemonic, Operands kkk kkk
(14000) (16000)
Go to address' Call Subroutine
GO TO CALL
k-PC PC+1-Slack. k-PC
NOTE: DAW: Decimal Adjust W.
This instruction adjusts the eight bit number in the W register to form two valid BCD (binary coded decimal) digits, one in the lower and one in the upper nibble. (The results will only be meaningful if the number in W to be adjusted is the result of adding together two valid two digit BCD numbers.) The adjustment obeys the following two step algorithm: 1. If the lower nibble is greater than 9 or the digit carry flag (DC) is set, 06 is added to the W register. 2. Then. if the upper nibble is greater than 9 or the carry from the original or step 1 addition is set, 60 is added to the W register. The carry bit is set if there is a carry from the original, step 1 or step 2 addition.
1312
©
Ie MASTER 1983
GENERAL INSfRUMENf
PIC1670 INT,ERRUPT SYSTEM The interrupt system of the PIC1670 is comprised of an external interrupt and a real-time clock counter interrupt. These have different interrupt vectors, enable bits and status bits. Both interrupts are controlled by the status register (F5)*" shown below.
7"
6
5
4
3
o
2
"Bit 7 is unused and is read as zero. ""Register 5 will power up to all zeroes.
EXTERNAL INTERRUPT On any high to low transition of the RT pin the external interrupt request (XIR) bit will be set. This request will be serviced if the external interrupt enable (XI E) bit is set or if it is set at a later point in the program. The latter allows the processor to store a request (without interrupting) while a critical timing routine is being executed. Once external interrupt service is initiated, the processor will clear the XIR bit, delay one cycle (to execute the current instruction), then push the cu rrent prog ram counter onto the stack and execute the instruction at location 1760 8, It takes three to four instruction cycles from the transition on the RT pin until the instruction at 1760 8is executed. No new interrupts can be serviced until a return from interrupt (RETFI) instruction has been executed.
REAL-TIME CLOCK INTERRUPT The real-time clock counter (RTCCA & RTCCB, file registers F6 and F7) have a similar mechanism of interrupt service. The RTCCA register will increment if the count enable (CNTE) bit is set. If this bit is not set the RTCCA & RTCCB will maintain their present contents and can therefore be used as general purpose.
RAM registers. The count source (CNTS) bit selects the clocking source for RTCCA. If CNTS is cleared to a '0', then RTCCA will use the internal instruction clock and increment at 1/8 the frequency present on the OSC pins. If CNTS is set to a '1', then RTCCA will increment on eacl) high to low transition of the RT pin. RTCCB can only be incremented when RTCCA makes a transition from 377 8to oand the AlB status bit is set. This condition links the two eight bit registers together to form one sixteen bit counter. An interrupt request under these condition~ will occur when the combined registers make a transition from 1777778 to O. If, however, the AlB bit is not set, then RTCCA will be the only incrementing register and an interrupt request will occur when RTCCA makes a transition from 3778 to O. (In this setup the RTCCB register will not increment and can be used as a general purpose RAM register.) Once a request has come from the real-time clock counter, the real-time clock interrupt request (RTCIR) bit will be set. At this point, the request can either be serviced immediately if the realtime clock interrupt enable (RTCIE) bit is set or be stored if RTCIE is not set. The latter allows the processor to store a real-time clock interrupt while a critical timing routine is being executed. Once interrupt service is initiated, the processor will clear the RTCI R bit, delay one cycle (to execute the current instruction), then push the present program counter onto the stack and execute the instruction at location 1740slt takes three instruction cycles from when the RTCC (A or B) overflows until the instruction of 1740 is executed. No new interrupts can be serviced until a RETFI instruction has been executed. The RETFI instruction (00002 8 ) must be used to return from any interrupt service routine if any pending interrupts are to be serviced. External interrupts have priority over RTCC driven interrupt in the event both types occur simultaneously. Interrupts cannot be nested but will be serviced sequentially. The existence of any pending interrupts can be tested via the state of the XIR (bit 2) and RTCIR (bit 3) in the status word F5.
INTERRUPT SYSTEM BLOCK DIAGRAM
~
EDGE TO SYNC PULSE GEN
INTERNAL CLOCK
.rL
.......
c E (J)
::J ~
.......
UJ C
1740.
©
Ie MASTER 1983
1313
GENERAL INSTRUMENT
PIC1670
1/0 TIMING ~l---"'"
CLK OUT
\
~REMENT
1\
PC ADDRESS ROM FOR NEXT INSTRUCTION
1\ GATE ANSWER
1\
EXECUTE INSTRUCTION INTERNAL BUS
1/0
__I_~~
OUTPUT
I
~
WRIT=---.! TO
I
VAUO
NOTE: Rise and fall times are load dependent
I
thl.-
I INPUT
r ~ 'l.tcv ~ I r----~ I
CLK OUT TIMING
J
------;0 ~-----------------------~~ ~ I
cv
CLKOUT~
t,41-----:y.t
,
I
1~~----------------tCy--------------·~~1
,I ...
RTCCTIMING +-'
C
Q)
E ::J
RTCC
'-
-------~
~1'4
tATH
I
j
\
I
I
+-'
en c
I~
tAT
tATl
~I
I
l I
~I
L
(ij 'Q)
c
SCHMITT TRIGGER CHARACTERISTICS (Typical)
Q)
4.0
(!J
-
3.0 II"""""'" VTHRESHOlO
(VOLTS)
V.THL
2.0
1.0 4.5
5.5
5.0 Voo (VOLTS)
1314
©
Ie MASTER 1983
PIC1670
PIC1670 OSCILLATOR OPTIONS (TYPICAL CIRCUIT) LC OPERATION
...------1 t----iIIIt---:l~
OSC1 (PI N 1)
fosc
2" 'l/L (C l
+ C 1NT )
,
where C 1NT = 10pF. L
'---..........f r---_-~~
Typical values for 4MHz operation: L = 70J.lH C L = 10pF
OSC2 (PIN 2)
CRYSTAL INPUT OPERATION 20pF
t--tt---..,_---..
OSC1 (PIN 1)
OSC2 (PIN 2) 20pF
1K
* or ceramic resonator, parallel resonant (0.8 - 5.0MHz)
EXTERNAL CLOCK INPUT OPERATION
---[>---------~)~
CLOCK FROM EXTERNAL SYSTEM
OSC1 (PIN 1)
~ NO CONNECTION --->~ OSC1 (PIN2)
MASTER CLEAR (TYPICAL CIRCUIT)
R ~ 100K
R
---........;~
C
I
MCLR (PIN 39)
O.1J.1F
Master Clear requires 10ms delay (assuming a 4MHz crystal) before activation after power is applied to the Voo pin, for the crystal to start up. To achieve this, an external RC configuration as shown can be used (assuming Voo is applied as a step function).
© Ie MASTER 1983
1315
PIC1670
POWER DISSIPATION DERATING GRAPH
1000 ~
800
~
700
0
~ -< ....
'0
Cf.
~l> ....