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QUICK REFRESHER GUIDE For Electronics & Communication Engineering

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Quick Refresher Guide

Contents

CONTENTS Part #1. Mathemathics 1.1 Linear Algebra 1.2 Probability & distribution 1.3. Numerical Method 1.4. Calculus 1.5. Differential Equations 1.6. Complex Variables

#2. Network Theory 2.1 Network Solution Methodology 2.2 Transient/Steady State Analysis of RLC Circuits to dc Input 2.3 Sinusoidal Steady State Analysis 2.4 Transfer Function of an LTI System 2.5 Two Port Networks 2.6 Network Topology

#3. Signals & Systems 3.1 Introduction to Signals & Systems 3.2 Linear Time Invariant (LTI) Systems 3.3 Fourier Representation of Signals 3.4 Z-Transform 3.5 Laplace Transform 3.6 Frequency response of LTI systems and Diversified Topics

#4. Control System 4.1 Basics of Control System 4.2 Time Domain Analysis 4.3 Stability & Routh Hurwitz Criterion 4.4 Root Locus Technique 4.5 Frequency Response Analysis using Nyquist Plot 4.6 Frequency Response Analysis using Bode Plot 4.7 Compensators & Controllers 4.8 State Variable Analysis

#5. Digital Circuits 5.1 Numebr Systems & Code Conversions 5.2 Boolean Algebra & Karnaugh Maps 5.3 Logic Gates 5.4 Logic Gate Families 5.5 Combinational Digital Circuits

Page No. 1 – 42 1–8 9 – 14 15 – 19 20 – 30 31 – 37 38 – 42

43 – 69 43 – 49 50 – 54 55 – 62 63 – 64 65 – 66 67 – 69

70 – 87 70 – 72 73 – 74 75 – 77 78 – 80 81 – 83 84 – 87

88 – 114 88 – 90 91 – 94 95 – 96 97 – 98 99 – 101 102 – 104 105 – 110 111 – 114

115 – 138 115 – 116 117 – 118 119 – 122 123 – 124 125 – 129

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5.6 AD /DA Convertor 5.7 Semiconductor Memory 5.8 Introduction to Microprocessors

#6. Analog Circuits 6.1 Diode Circuits - Analysis and Application 6.2 DC Biasing-BJTs 6.3 Small Signal Modeling Of BJT and FET 6.4 Operational Amplifiers and Their Applications 6.5 Feedback and Oscillator Circuits Feedback Amplifiers 6.6 Power Amplifiers 6.7 BJT and JFET Frequency Response

#7. Electronics Devices & Circuits 7.1 Semiconductor Theory 7.2 P-N Junction Theory and Characteristics 7.3 Transistor Theory (BJT, FET) 7.4 Basics of OPTO Electronics

#8. Communication Systems 8.1 Basics of Communication Signals 8.2 Amplitude Modulation (AM) 8.3 DSBSC and SSB Modulation 8.4 Vestigial Sideband (VSB) Modulation 8.5 Angle Modulation 8.6 Superhetrodyne Receivers 8.7 Noise in Analog Modulation 8.8 Digital Communications

#9. Electromagnetic Theory 9.1 Electromagnetic Field 9.2 EM Wave Propagation 9.3 Transmission Lines 9.4 Guided E.M Waves 9.5 Antennas

#Reference Books

Contents

130 131 132 – 138

139 – 170 139 – 145 146 – 150 151 – 155 156 – 159 160 – 161 162 – 163 164 – 170

171 – 194 171 – 177 178 – 182 183 – 192 193 – 194

195 – 209 195 196 – 197 198 – 199 200 201 – 204 205 206 207 – 209

210 – 225 210 – 214 215 – 217 218 – 219 220 – 222 223 – 225

226 -227

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Mathematics

Part - 1: Mathematics 1.1 Linear Algebra 1.1.1

Matrix Definition: A system of “m n” numbers arranged along m rows and n columns. Conventionally, single capital letter is used to denote a matrix. Thus,

A=[

a

a a

a a

a

a

a a a

a a a a

]

ith row, jth column

1.1.1.1 Types of Matrices 1.1.1.2 Row and Column Matrices  Row Matrix [ 2, 7, 8, 9] 

Column Matrix

[1 ] 1 1

single row ( or row vector) single column (or column vector)

1.1.1.3 Square Matrix     -

Same number of rows and columns. Order of Square matrix no. of rows or columns Principle Diagonal (or Main diagonal or Leading diagonal): The diagonal of a square matrix (from the top left to the bottom right) is called as principal diagonal. Trace of the Matrix: The sum of the diagonal elements of a square matrix. tr (λ A) = λ tr(A) , λ is scalartr ( A+B) = tr (A) + tr (B) tr (AB) = tr (BA)

1.1.1.4 Rectangular Matrix Number of rows

Number of columns

1.1.1.5 Diagonal Matrix A Square matrix in which all the elements except those in leading diagonal are zero. e.g. [

]

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Mathematics

1.1.1.6 Unit Matrix (or Identity Matrix) A Diagonal matrix in which all the leading diagonal elements are ‘1’. 1 e.g. I = [ ] 1 1 1.1.1.7 Null Matrix (or Zero Matrix) A matrix is said to be Null Matrix if all the elements are zero. e.g.

0

1

1.1.1.8 Symmetric and Skew Symmetric Matrices:  Symmetric, when a = +a for all i and j. In other words  Skew symmetric, when a = - a In other words = -A

=A

Note: All the diagonal elements of skew symmetric matrix must be zero. Symmetric Skew symmetric a h g h g f] [h b f ] [h g f c g f

Symmetric Matrix

𝐀𝐓 = A

Skew Symmetric Matrix 𝐀𝐓 = - A

1.1.1.9 Triangular Matrix  A matrix is said to be “upper triangular” if all the elements below its principal diagonal are zeros.  A matrix is said to be “lower triangular” if all the elements above its principal diagonal are zeros. a a h g [ ] [ g b ] b f f h c c Upper Triangular Matrix Lower Triangular Matrix 1.1.1.10

Orthogonal Matrix: If A. A = I, then matrix A is said to be Orthogonal matrix.

1.1.1.11

Singular Matrix: If |A| = 0, then A is called a singular matrix.

1.1.1.12

̅) Unitary Matrix: If we define, A = (A Then the matrix is unitary if A . A = I

= transpose of a conjugate of matrix A

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1.1.1.13

Mathematics

Hermitian Matrix: It is a square matrix with complex entries which is equal to its own conjugate transpose. A = A or a = a̅̅̅

1.1.1.14

Note: In Hermitian matrix, diagonal elements

1.1.1.15

Skew Hermitian matrix: It is a square matrix with complex entries which is equal to the negative of conjugate transpose. A = A or a =

a̅̅̅

Note: In Skew-Hermitian matrix , diagonal elements 1.1.1.16

always real

either zero or Pure Imaginary

Idempotent Matrix If A = A, then the matrix A is called idempotent matrix.

1.1.1.17

Multiplication of Matrix by a Scalar:

Every element of the matrix gets multiplied by that scalar. Multiplication of Matrices: Two matrices can be multiplied only when number of columns of the first matrix is equal to the number of rows of the second matrix. Multiplication of (m n) , and (n p) matrices results in matrix of (m p)dimension , =, . 1.1.1.18

Determinant:

An n order determinant is an expression associated with n

n square matrix.

If A = [a ] , Element a with ith row, jth column. For n = 2 ,

a D = det A = |a

a a |=a

a

-a

a

Determinant of “order n”

D = |A| = det A = ||

a a

a

a

a

a

a a

| |

a

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1.1.1.19 

Mathematics

Minors & Co-Factors:

The minor of an element in a determinant is the determinant obtained by deleting the row and the column which intersect that element. Cofactor is the minor with “proper sign”. The sign is given by (-1) (where the element th th belongs to i row, j column).



1.1.1.20 Properties of Determinants: 1. A determinant remains unaltered by changing its rows into columns and columns into rows. 2. If two parallel lines of a determinant are inter-changed, the determinant retains its numerical values but changes its sign. (In a general manner, a row or a column is referred as line). 3. Determinant vanishes if two parallel lines are identical. 4. If each element of a line be multiplied by the same factor, the whole determinant is multiplied by that factor. [Note the difference with matrix]. 5. If each element of a line consists of the m terms, then determinant can be expressed as sum of the m determinants. 6. If each element of a line be added equi-multiple of the corresponding elements of one or more parallel lines, determinant is unaffected. e.g. by the operation, + p +q , determinant is unaffected. 7. Determinant of an upper triangular/ lower triangular/diagonal/scalar matrix is equal to the product of the leading diagonal elements of the matrix. 8. If A & B are square matrix of the same order, then |AB|=|BA|=|A||B|. 9. If A is non singular matrix, then |A |=| | (as a result of previous). 10. 11. 12. 13.

Determinant of a skew symmetric matrix (i.e. A =-A) of odd order is zero. If A is a unitary matrix or orthogonal matrix (i.e. A = A ) then |A|= ±1. If A is a square matrix of order n, then |k A| = |A|. |I | = 1 ( I is the identity matrix of order n).

1.1.1.21

Inverse of a Matrix



A

 

|A| must be non-zero (i.e. A must be non-singular). Inverse of a matrix, if exists, is always unique. a b d If it is a 2x2 matrix 0 1 , its inverse will be 0 c d c



=

| |

b 1 a

Important Points: 1. IA = AI = A, (Here A is square matrix of the same order as that of I ) 2. 0 A = A 0 = 0, (Here 0 is null matrix) 3. If AB = , then it is not necessarily that A or B is null matrix. Also it doesn’t mean BA = . 4. If the product of two non-zero square matrices A & B is a zero matrix, then A & B are singular matrices. 5. If A is non-singular matrix and A.B=0, then B is null matrix. 6. AB BA (in general) Commutative property does not hold 7. A(BC) = (AB)C Associative property holds 8. A(B+C) = AB AC Distributive property holds THE GATE ACADEMY PVT.LTD. H.O.: #74, Keshava Krupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com

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9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20.

Mathematics

AC = AD , doesn’t imply C = D ,even when A -. If A, C, D be matrix, and if rank (A)= n & AC=AD, then C=D. (A+B)T = A + B (AB)T = B . A (AB)-1 = B . A AA =A A=I (kA)T = k.A (k is scalar, A is vector) (kA)-1 = . A (k is scalar , A is vector) (A ) = (A ) ̅ ) (Conjugate of a transpose of matrix= Transpose of conjugate of matrix) (̅̅̅̅ A ) = (A If a non-singular matrix A is symmetric, then A is also symmetric. If A is a orthogonal matrix , then A and A are also orthogonal.

21. If A is a square matrix of order n then (i) |adj A|=|A| (ii) |adj (adj A)|=|A|( ) (iii) adj (adj A) =|A| A 1.1.1.22 Elementary Transformation of a Matrix: 1. Interchange of any 2 lines 2. Multiplication of a line by a constant (e.g. k ) 3. Addition of constant multiplication of any line to the another line (e. g.

+p

)

Note:  Elementary transformations don’t change the ran of the matrix.  However it changes the Eigen value of the matrix. 1.1.1.23

Rank of Matrix

If we select any r rows and r columns from any matrix A,deleting all other rows and columns, then the determinant formed by these r r elements is called minor of A of order r. Definition: A matrix is said to be of rank r when, i) It has at least one non-zero minor of order r. ii) Every minor of order higher than r vanishes. Other definition: The rank is also defined as maximum number of linearly independent row vectors. Special case: Rank of Square matrix Rank = Number of non-zero row in upper triangular matrix using elementary transformation. Note: 1. 2. 3. 4.

r(A.B) min { r(A), r (B)} r(A+B) r(A) + r (B) r(A-B) r(A) - r (B) The rank of a diagonal matrix is simply the number of non-zero elements in principal diagonal. 5. A system of homogeneous equations such that the number of unknown variable exceeds the number of equations, necessarily has non-zero solutions. THE GATE ACADEMY PVT.LTD. H.O.: #74, Keshava Krupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com

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Mathematics

If A is a non-singular matrix, then all the row/column vectors are independent. If A is a singular matrix, then vectors of A are linearly dependent. r(A)=0 iff (if and only if) A is a null matrix. If two matrices A and B have the same size and the same rank then A, B are equivalent matrices. 10. Every non-singular matrix is row matrix and it is equivalent to identity matrix. 6. 7. 8. 9.

1.1.1.24

Solution of linear System of Equations:

For the following system of equations A X = B a a

a

x x

a a

Where, A =

, [a

a

a

]

=

,

B =

[x ]

[

]

A= Coefficient Matrix, C = (A, B) = Augmented Matrix r = rank (A), r = rank (C), n = Number of unknown variables (x , x , - - - x ) Consistency of a System of Equations: For Non-Homogenous Equations (A X = B) i) If r r , the equations are inconsistent i.e. there is no solution. ii) If r = r = n, the equations are consistent and there is a unique solution. iii) If r = r < n, the equations are consistent and there are infinite number of solutions. For Homogenous Equations (A X = 0) i) If r = n, the equations have only a trivial zero solution ( i.e. x = x = - - - x = 0). ii) If r < n, then (n-r) linearly independent solution (i.e. infinite non-trivial solutions). Note: Consistent means:

one or more solution (i.e. unique or infinite solution)

Inconsistent means:

No solution

Cramer’s ule Let the following two equations be there a

x +a

x = b ---------------------------------------(i)

a

x +a

x = b ---------------------------------------(ii)

a D = |b

a b |

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b D =| b

a | a

a D =| a

b | b

Mathematics

Solution using Cramer’s rule: x =

and x =

In the above method, it is assumed that 1. No of equations = No of unknowns 2. D 0 In general, for Non-Homogenous Equations D 0 single solution (non trivial) D = 0 infinite solution For Homogenous Equations D 0 trivial solutions ( x = x =………………………x = 0) D = 0 non- trivial solution (or infinite solution) Eigen Values & Eigen Vectors 1.1.1.25

Characteristic Equation and Eigen Values:

Characteristic equation: | A λ I |= 0, The roots of this equation are called the characteristic roots /latent roots / Eigen values of the matrix A. Eigen vectors: [

]X=0

For each Eigen value λ, solving for X gives the corresponding Eigen vector. Note: For a given Eigen value, there can be different Eigen vectors, but for same Eigen vector, there can’t be different Eigen values. Properties of Eigen values 1. The sum of the Eigen values of a matrix is equal to the sum of its principal diagonal. 2. The product of the Eigen values of a matrix is equal to its determinant. 3. The largest Eigen values of a matrix is always greater than or equal to any of the diagonal elements of the matrix. 4. If λ is an Eigen value of orthogonal matrix, then 1/ λ is also its Eigen value. 5. If A is real, then its Eigen value is real or complex conjugate pair. 6. Matrix A and its transpose A has same characteristic root (Eigen values). 7. The Eigen values of triangular matrix are just the diagonal elements of the matrix. 8. Zero is the Eigen value of the matrix if and only if the matrix is singular. 9. Eigen values of a unitary matrix or orthogonal matrix has absolute value ‘1’. 10. Eigen values of Hermitian or symmetric matrix are purely real. 11. Eigen values of skew Hermitian or skew symmetric matrix is zero or pure imaginary. | | 12. is an Eigen value of adj A (because adj A = |A|. A ). THE GATE ACADEMY PVT.LTD. H.O.: #74, Keshava Krupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com

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13. If i) ii) iii) iv) v)

Mathematics

λ is an Eigen value of the matrix then , Eigen value of A is 1/λ Eigen value of A is λ Eigen value of kA are λ (k is scalar) Eigen value of A I are λ + k Eigen value of (A I)2 are ( )

Properties of Eigen Vectors 1) Eigen vector X of matrix A is not unique. Let is Eigen vector, then C is also Eigen vector (C = scalar constant). 2) If λ , λ , λ . . . . . λ are distinct, then , . . . . . are linearly independent . 3) If two or more Eigen values are equal, it may or may not be possible to get linearly independent Eigen vectors corresponding to equal roots. 4) Two Eigen vectors are called orthogonal vectors if T∙ = 0. ( , are column vector) (Note: For a single vector to be orthogonal , A = A or, A. A = A. A =  ) 5) Eigen vectors of a symmetric matrix corresponding to different Eigen values are orthogonal. Cayley Hamilton Theorem: Every square matrix satisfies its own characteristic equation. 1.1.1.26

Vector:

Any quantity having n components is called a vector of order n. Linear Dependence of Vectors  If one vector can be written as linear combination of others, the vector is linearly dependent. Linearly Independent Vectors  If no vectors can be written as a linear combination of others, then they are linearly independent. Suppose the vectors are x x x x  

Its linear combination is λ x + λ x + λ x + λ x = 0 If λ , λ , λ , λ are not “all zero” they are linearly dependent. If all λ are zero they are linearly independent.

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Mathematics

1.2 Probability and Distribution 1.2.1

Probability

Event: Outcome of an experiment is called event. Mutually Exclusive Events (Disjoint Events): Two events are called mutually exclusive, if the occurrence of one excludes the occurrence of others i.e. both can’t occur simultaneously. A

B =φ, P(A

B) =0

Equally Likely Events: If one of the events cannot happen in preference to other, then such events are said to be equally likely. Odds in Favour of an Event = Where m n

no. of ways favourable to A

no. of ways not favourable to A

Odds Against the Event = Probability: P(A)=

=

. .

P(A) P(A’)=1 Important points:  P(A B) Probability of happening of “at least one” event of A & B  P(A B) ) Probability of happening of “both” events of A & B  If the events are certain to happen, then the probability is unity.  If the events are impossible to happen, then the probability is zero. Addition Law of Probability: a. For every events A, B and C not mutually exclusive P(A B C)= P(A)+ P(B)+ P(C)- P(A B)- P(B C)- P(C A)+ P(A B C) b. For the event A, B and C which are mutually exclusive P(A B C)= P(A)+ P(B)+ P(C) Independent Events: Two events are said to be independent, if the occurrence of one does not affect the occurrence of the other. If P(A B)= P(A) P(B)

Independent events A & B

Conditional Probability: If A and B are dependent events, then P. / denotes the probability of occurrence of B when A has already occurred. This is known as conditional probability. P(B/A)=

(

) ( )

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For independent events A & B

Mathematics

P(B/A) = P(B)

Theorem of Combined Probability: If the probability of an event A happening as a result of trial is P(A). Probability of an event B happening as a result of trial after A has happened is P(B/A) then the probability of both the events A and B happening is P(A B)= P(A). P(B/A),

[ P(A) 0]

= P(B). P(A/B),

[ P(B) 0]

This is also known as Multiplication Theorem. For independent events A&B P(B/A) = P(B), P(A/B )= P(A) Hence P(A B) = P(A) P(B) Important Points: If P 1. 2. 3. 4.

& P are probabilities of two independent events then P (1-P ) probability of first event happens and second fails (i.e only first happens) (1-P )(1-P ) probability of both event fails 1-(1-P )(1-P ) probability of at least one event occur PP probability of both event occurs

Baye’s theorem: An event A corresponds to a number of exhaustive events B , B ,.., B . If P(B ) and P(A/B ) are given then, P. /=

( (

). ( ) ). ( )

This is also known as theorem of Inverse Probability. Random variable: Real variable associated with the outcome of a random experiment is called a random variable. 1.2.2

Distribution

Probability Density Function (PDF) or Probability Mass Function: The set of values Xi with their probabilities P constitute a probability distribution or probability density function of the variable X. If f(x) is the PDF, then f(x ) = P( = x ) , PDF has the following properties:  Probability density function is always positive i.e. f(x)  ∫ f(x)dx = 1 (Continuous)  f(x ) = 1 (Discrete)

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Mathematics

Discrete Cumulative Distribution Function (CDF) or Distribution Function The Cumulative Distribution Function F(x) of the discrete variable x is defined by, F (x) = F(x) = P(X x) =

P(x ) =

f(x )

Continuous Cumulative Distribution function (CDF) or Distribution Function: If F (x) = P(X x) =∫ f(x)dx, then F(x) is defined as the cumulative distribution function or simply the distribution function of the continuous variable. CDF has the following properties: ( ) i) = F (x) =f(x) 0 ii) 1 F (x) 0 iii) If x x then F (x ) F (x ) , i.e. CDF is monotone (non-decreasing function) ) =0 iv) F ( v) F ( ) = 1 vi) P(a x b) =∫ f(x)dx = ∫ f(x)dx - ∫ f(x)dx = F (b) F (a) Expectation [E(x)]: 1. E(X) = x f(x ) (Discrete case) 2. E(X) = ∫ x f(x )dx (Continuous case) Properties of Expectation 1. E(constant) = constant 2. E(CX) = C . E(X) [C is constant] 3. E(AX+BY) = A E(X)+B E(Y) [A& B are constants] 4. E(XY)= E(X) E(Y/X)= E(Y) E(X/Y) E(XY) E(X) E(Y) in general But E(XY) = E(X) E(Y) , if X & Y are independent Variance (Var(X)) Var (X) =E,(x

) ]

Var (X)= (x x

) f(xx )

Var (X)=∫ (xx Var (X) =E(

(Discrete case)

) f(x)dx (Continuous case)

)-,E(x)-

Properties of Variance 1. Var(constant) = 0 2. Var(Cx) = C Var(x) -Variance is non-linear [here C is constant] THE GATE ACADEMY PVT.LTD. H.O.: #74, Keshava Krupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com

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Mathematics

3. Var(Cx D) = C Var(x) -Variance is translational invariant [C & D are constants] 4. Var(x-k) = Var(x) [k is constant] 5. Var(ax+by) = a Var(x) + b Var(y) 2ab cov(x,y) (if not independent) [A & B are constants] = a Var(x) + b Var(y) (if independent) Covariance Cov (x,y)=E(xy)-E(x) E(y) If independent

covariance=0,

E(xy) = E(x) . E(y)

(if covariance = 0, then the events are not necessarily independent) Properties of Covariance 1. Cov(x,y) = Cov(y,x) (i.e. symmetric) 2. Cov(x,x) = Var(x) 3. |Cov(x,y)| Standard Distribution Function (Discrete r.v. case): 1. Binomial Distribution : P(r) = C p q Mean = np, Variance = npq, S.D. =√npq 2. Poisson Distribution: Probability of k success is P (k) = no. of success trials , n no. of trials , P success case probability mean of the distribution For Poisson distribution: Mean = , variance = , and =np Standard Distribution Function (Continuous r.v. case): 1. Normal Distribution (Gaussian Distribution): f(x) =

√

e

(

)

Where and are the mean and standard deviation respectively  P( 1), it leads to expansion in frequency and vice versa. Convolution Property For continuous-time signals, x t ↔

j

y t ↔ x t

j

y t ↔

j

.

j

Convolution in time domain results in multiplication in frequency domain. Parseval Theorem Energy or power in the time domain representation is equal to energy or power in frequency domain representation. ∫ ∑

|

| |

∫ |

| ∫ |

|

, |

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Signals & Systems

3.4: Z-Transform Introduction ZT is a generalization of frequency response for discrete-time signals. ∑ Two sided ZT/Bilateral ZT, ∑ One sided ZT/Unilateral ZT, . For |z| or z e , T is equal to DTFT. Therefore ZT evaluated along unit circle reduces to DTFT. For any given sequence, the set of values of Z for which the Z transform converges is called the region of convergence (ROC). Rational Representation of Z.T. (X(z)) Consider the class of Z transform where in X(z) can be expressed as, X(z) =

where P(z) is numerator polynomial and Q(z) is denominator

polynomial Values of z for which P(z)=0 are called the zeroes of X(z).Values of z for which Q(z) = 0 are called the poles of X(z). Location of poles of X(z) is related to the ROC and ROC is bounded by poles. To uniquely specify a discrete time signal, one needs to specify both X(z) and ROC. x [n] = an u[n]

Z.T

x [n] = -an u(-n-1) Z.T

(z) = (z) =

; ROC : |z| > |a| ; ROC : |z| < |a|

From above we see that two different signals x n and x [n] have same Z-transform but different ROCs. Properties of ROC (1) ROC of X(z) consists of a ring in the z-plane centered about the origin. (2) ROC does not contain any poles, but is bounded by poles. (3) If x[n] is a finite duration sequence, then ROC is the entire z plane except possibly z = 0 or z . (4) If x1[n] is a right sided sequence, then ROC extends outward from the outermost pole to possi ly inclu ing z . As c us l sequences re right si e , RO of those sequences is outside a circle. (5) If x2[n] is a left sided sequence, the ROC extends inward, from the innermost non-zero pole to possibly including z = 0. As anti-causal sequences are left sided, ROC of those sequences is inside a circle. (6) If x3[n] is two sided sequence, the ROC will consist of a ring in the z plane bounded on the interior and exterior by a pole. (7) If is a finite duration sequence, ROC is entire z-pl ne except possi ly z or z .

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Properties of Z Transform Linearity Z.T a X1(z) + b X2(z); ROC (R1 R2) a x1[n] + b x2[n] ROC in the current case is at least ( R R ). If there is no poles zero cancellation, ROC will be (R R ). If there is a pole-zero cancellation, ROC may be more than R R . If R R ∅, then Z{ax n x n oesn’t exist. Time Shifting .

X[n – no]↔

z

. (z)

If no>0, ROC is R except z = 0. If no< 0, ROC is R except z =

.

Modulation .

an x[n] ↔

X(

; ROC: |a| r1 < |z| < |a| r2

If |a|>1, Z transform gets shrinked in Z-domain and vice versa. If a = e Multiplication in time domain by .

e

,

.

r.e

.

results in frequency shift in frequency domain by

Differentiation in Z- domain .

nx n ↔

z z

z

RO

R

Conjugate property x

.

n ↔

z

RO

R

Time Reversal property x

n ↔

.

( ) RO z

r

|

z

|

r

Convolution property x n

x n ↔

.

z

z

RO

R

R

Initial Value Theorem x[0] = lim

z

If X(z) is expressed as ratio of polynomials P(z) and Q(z), order of P(z) should be less than that of Q(z) for initial value theorem to be applied to X(z). Final Value Theorem lim

x n = x[ ] = lim

z

z

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Necessary condition for applying final value theorem is that poles of (1-z strictly inside the unit cycle.

X(z) should be

Characterization of LTI System from H(z) and ROC h[n]

x[n]

ZT

h[n]

y[n]

H(z) ; ROC

Fig. LTI System A LTI system can be characterized for causality, stability and memoryless properties based on ROC of the system function, H(z). 1. 2. 3. 4. 5. 6.

If ROC includes unit circle, then system is stable. If ROC is outside a circle, then system is causal. If ROC is inside a circle, then system is anti-causal. If ROC is all z, then system is memoryless. If ROC is strictly a ring, then system is non-causal. If ROC includes unit-circle, then the system’s impulse response is hence DTFT of the sequence exists.

solutely summ

le n

Finding Inverse Z.T. given X(z) and ROC By Inspection and Partial Fraction Given X(z) in rational form, split it into partial fractions and based on ROC, find x[n] by inspection. By Division Given X(z) in rational form, perform the division based on the condition that x[n] is causal or anti-causal and find X(z) in expansion form. By Power Series Expansion Given X(z) in a standard form, find the expansion of X(z), then x[n]

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3.5: Laplace Transform Introduction Laplace Transform (LT) is a method to get generalized frequency domain representation of a continuous – time signal and is generalization of CTFT (Continuous Time Fourier Transform). Definition of Laplace Transform f t

F s

∫ e

f t

F s =∫

. f t t : One sided/ unilateral LT where S

e

σ

. f t t : Two sided/ bilateral LT

Properties of Laplace transform Frequency shift [e-at f(t) ] = F(s + a) and

[eat f(t) ] = F(s - a)

Time shift [f(t – to)] = e

. F(s)

Differentiation in Time domain [

f t ] = s F(s) – f(0) where f(0) is initial value of f(t).

If initial conditions are zero (i.e, f(0) = 0),differentiating in time domain is equivalent to multiplying by s in frequency domain. Similarly,

[

f t ] = s F(s) –s f(0) - f (0) where f (0) is the value of [

f t ] at t = 0

Integration in Time Domain *∫ f t t+

and

,∫

f t t-

∫

f t t

Integration in time domain is equivalent to division by s in frequency domain, if f(t) = 0 for t < 0. Differentiation in Frequency Domain [ t f(t) ] =

and

t f t

(F(s))

Differentiation in frequency domain is equal to multiplication by t in time domain. Integration in Frequency Domain *

+ = ∫ F s

s

Integration in frequency domain is equal to division by t in time domain. Initial Value Theorem If f(t) and its derivative f t are Laplace transformable, then

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lim

f t

lim

Signals & Systems

sF s

This theorem does not apply to the rational function F(s) in which the order of numerator polynomial is equal to or greater than the order of denominator polynomial. Final Value Theorem If f(t) and its derivative f (t) are Laplace transformable, lim

f t

lim

then

sF s

For applying final value theorem, it is required that all the poles of plane (strictly) i.e. poles on axis also not allowed.

be in the left half of s-

Convolution theorem . . Laplace transform of the periodic function If f(t) is periodic function with period T, then f t

=

. F (s) where F (s) = ∫ e

f t t

Laplace transform of standard functions Table: Laplace transform of standard functions S. No

Function, f(t)

Laplace transform of f(t), L{f(t) = F(s)

1. 2.

u(t)

3. 4.

u(t)

⁄s

5.

e .u t

⁄s

6.

t.u(t)

⁄s

7.

t .u t

n

8.

f(t).e u t

F(s-a)

9.

Sin at. u(t)

⁄s

⁄ s

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10.

Cos at. u(t)

s⁄ s

11.

sinhat. u(t)

⁄s

12.

coshat. u(t)

s⁄ s

13.

f (t)

s.F(s)-f(o )

14.

f (t)

s .F s

15.

∫

16.

∫

Signals & Systems

s. f o ) –f (o )

⁄s F(s) . ∫

17.

f(t-a).u(t-a)

18.

t .F t

19.

f(t⁄ )

20.

f(at)

e

.F s .

f t f t =∫

22

e

. cos

23

e

sin t

24 25 26

.f t

)

| |. F s | |

21.

(

F s⁄

F s . F s where * is convolution operator . t

s

⁄ s

⁄ s ∫ F s s √

√

Applications 1. LT is generalization of CTFT for continuous-time signals and hence signal can be characterized at any generalized frequency. 2. LT is helpful to perform transient and steady state analysis of any LTI system for any arbitrary input and initial conditions.

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3.6: Frequency response of LTI systems and Diversified Topics Frequency response of a LTI system Consider a LTI system of impulse response h[n] as shown in figure below. For any arbitrary input x[n], output y[n] can be found by convolution, as below, y[n]= x[n] * h[n] h[n]

x[n]

y[n]

Fig. LTI System If F{x[n]} = e and Z{x[n]} = X(z), and Y(z) = H(z). X(z) (e ) (e ). e Here is called transfer function of LTI system and

is called system function.

Amplitude Response Plot of | e | with respect to is c lle the mplitu e response. It gives n i e frequency content of the signal and can be used to characterize the system.

out

Phase Response Plot of

⌊ (e ) with respect to

is called the phase response. Similar to magnitude

response, this can also be used to characterize the system. Group Delay Response ⁄

Plot of

with respect to

is c lle the group el y response.

Minimum Phase System Minimum phase system is the system for which phase variation and energy variation are minimum with respect to . Also if minimum ph se system is c us l, poles n zeroes re insi e the unit circle. Linear Phase System The system for which phase variation with respect to If

) is a linear phase system,

⌊ (e )

is line r is c lle “line r ph se system”. and hence

. Also

group delay is constant for linear phase system. For a linear phase system with real impulse response, zeroes form complex conjug te reciproc l p irs. So if there is zero t ‘ ’ for line r phase system, then other zeroes are at

,

n

. For a linear phase system with complex

impulse response, if there is zero t , then it’s ssure th t there is zero at

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All – pass system System which passes all the frequencies is called all-pass system ∴ | e | K; where K is a constant. For a all-pass filter, system function can be generalized as (

)

For a all-pass system, poles and zeroes form a conjugate reciprocal pairs. Therefore for a all-pass system with complex impulse response, if there is zero t ‘ ’, then there is pole t ⁄

and vice

versa. For an all-pass system with real impulse response, if there is a zero at a, then there is a zero at and there are poles at ⁄ and ⁄ . Magnitude transfer function A system function

z is c lle m gnitu e tr nsfer function, if it’s of form,

( ⁄ ) Therefore, for magnitude transfer function, poles form conjugate reciprocal pairs. Hence if there .

is pole t ‘ ’, there is pole t ⁄ . Same applies for zeroes also. Sampling To get discrete-time signal from analog signal, sampling is performed on analog signal. Let x(t) be analog signal & S(t) be impulse train, ∴ S(t) = ∑

t

T where T is desired sampling interval

Sampled signal, x (t) = x(t) . s(t) = ∑ ∑

∴x

x

T .

t

T

k

After sampling, signal obtained above is still in time-domain. To get FT in discrete –time domain, put T, which is c lle time norm liz tion ∴ X(e

=

∑

( (

))

From above we see that X(e is perio ic with perio any intervention between frequency bands. ∴ theorem) As X(e

where

is signal BW

. To voi

li sing, there should not be

to avoid aliasing (Nyquist sampling

is periodic, DTFT is described as one period of CTFT, if there is no aliasing.

To get x t from x[n], use low pass filter of impulse response h t = sin c(t/T) as in figure below.

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r

T

-

T

T

Fig. Low-pass filter x t =∑ ∴

x k sin c = X(e

.

t where

T

where sin c(x) = T

Discrete Fourier Transform (DFT) DFT is a sampled version of DTFT of a non-periodic signal x[n] in the range of (- , . This is mainly required for processing by computers. Consider a signal x[n] of length N, then its DFT, X[k] is given as, {∑ {

.

∑

,

where

e

,

Also, DFT is obtained by sampling DTFT with a period of ∴

e

where

Fast Fourier Transform (FFT) For evaluating DFT of x[n], number of multiplications and additions required are . To reduce the computational complexity, another implementation of DFT is used, which is called Fast Fourier Transform (FFT). Number of multiplications required for FFT is . log . FFT uses butterfly architecture with in place computation to save the processing time and memory requirements. Filters Filters are typically used to extract any useful information from a signal or to process a signal. FIR Filters Here output at any instant n, depends on only input and impulse response of FIR filter has finite length. IIR Filter Here output at any instant n, depends on input and past/future output and impulse response of IIR filter has infinite length.

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Correlation and Covariance If x is a real and stationary signal, then auto-correlation and covariance functions can be defined as below, Auto-correlation function, R m x .x Auto-covariance function, m x m . x m Here m x and x is advanced version of x by m samples. Power spectral density of x is given as (e ) F R n e (e ) ∑ R R

∫

(e ). e

.

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Control System

Part – 4: Control System 4.1: Basics of Control System Definition of Control system (CS) It is a system by means of which any quantity of interest in a machine or mechanism is controlled (maintained or altered) in accordance with the desired manner. Control systems can be characterized mathematically by ‘Transfer function’ or ‘State model’. Transfer function is defined as the ratio of Laplace Transform (LT) of output to that of input assuming that initial conditions are zero. Transfer function is also obtained as Laplace transform of the impulse response of the system. pl tr ns orm o output Tr ns r un tion | pl tr ns orm o input [ t ] S T s | [r t ] R S For any arbitrary input r(t), output c(t) of control system can be obtained as below, r(t) = (R (s)) = (T (s) . R (s)) (T(s)) * r(t) Where L and are forward and inverse Laplace transform operators and * is convolution operator.

Classification of Control Systems Open-Loop Control System Reference input

Controller

Output

Process



The reference input controls the output through a control action process. Here output has no effect on the control action, as the output is not fed-back for comparison with the input.  Due to the absence of feedback path, the systems are generally stable Closed-Loop Control System (Feedback Control Systems): Closed-Loop control systems can be classified as positive and negative feedback (f/b) control systems. In a closed-loop control system, the output has an effect on control action through a feedback. G(s)

Reference input r(t)

Controller

Process

Output c(t)

Feedback signal, f(t)

Feedback, H(s) Network Block diagram of closed loop control system

Let T(s) be the overall transfer function of the closed-loop control system, then THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 88

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T(s) =

(

Control System

)

Here negative sign in denominator is considered for positive feedback and vice versa. S

S → Op n loop tr ns r function

Error transfer function = Effect of Feedback 1. Effect of Feedback on Stability  Stability is a notion that describes whether the system will be able to follow the input command.  A system is said to be unstable, if its output is out of control or increases without bound. 2. Effect of Feedback on overall gain  Negative feedback decreases the gain of the system and positive feedback increase the gain of the system. 3. Effect of Feedback on Sensitivity The sensitivity of the gain of the overall system T to the variation in G is defined as S = Similarly, 4. 5. 6. 7.

S =

= =

1

Negative feedback makes the system less sensitive to the parameter variation. Negative feedback improves the dynamic response of the system Negative feedback reduces the effect of disturbance signal or noise. Negative feedback improves the bandwidth of the system.

Signal Flow Graphs (SFG) A signal flow graph is a graphical representation of portraying the input-output relationships between the variables of a set of linear algebraic equations. Also following are the basic properties of signal flow graphs. 1. A signal flow graph applies to only linear systems. 2. The equations based on which a signal flow graph is drawn must be algebraic equation in the form of effects as functions of causes. 3. Signals travel along branches only in the direction described by the arrows of the branches. 4. The branch directing from node y to y represents the dependence of the variable yk upon yj, but not the dependence of y upon y 5. A signal y travelling along a branch between nodes y and y is multiplied by the gain of the branch, , so that signal y is delivered at node y . M son’s

in Formula

The general gain formula is, T=

=

(∑

)

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Control System

yin = input node variable N = total number of forward paths Pk = gain of the kth forward path = determinant of the graph= 1 - ∑ Pm1 + ∑ Pm2 - ∑ Pm3

…..

= 1 – (sum of all individual loop gains) + (sum of gain products of all possible combinations of two non- touching loops) – (sum of the gain products of all possible combinations of three non- tou hing loops …. = gain product of the mth possibl

ombin tion o ‘r’ non-touching loops

= that part of the signal flow graph which is non-touching with the kth forward path

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4.2: Time Domain Analysis Introduction Whenever an input signal or excitation is given to a system, the response or output of the system with respect to time is known as time response of the system. The time response of a control system is divided into two parts namely, transient and steady state response. Total response of a system = transient response + steady state response (or C (t) = C tr (t) + Css(t)) Where

t is overall response of the system, t is transient response component of the system and t is steady state response component of the system

Following are salient characteristics of transient response of a control system.    

This part of the time response which goes to zero after a large interval of time. It reveals the nature of response (e.g. oscillatory or over damped) It gives an indication about the speed of response. It does not depend on the input signal, rather depends on nature of the system.

Following are the salient properties of steady state response of a control system.    

The part of the time response that remains even after the transients have died out is said to be steady state response. The steady state part of time response reveals the accuracy of a control system. Steady state error is observed if the actual output does not exactly match with the input. It depends on the input signal applied.

Time Response of a First Order Control System A first ord r ontrol syst m is on or whi h th high st pow r o ‘s’ in th d nomin tor o its transfer function is equal to 1. Thus a first order control system is expressed by a transfer function, = . Time Response of a First Order Control System Subjected to Unit Step Input Function As the input is a unit step function, r(t) = u(t) and R(s) = 1/s Output is given by

c(t) = (1

The error is given by

e(t) = r(t) – c(t) =

The steady state error

) u(t) . u(t)

= im e(t) = im →

. u(t) = 0

→

Time Response of a First Order Control System Subjected to Unit Ramp Input Function As the input is a unit ramp function, r(t) = t.u(t) and R(s) = 1 / s Output is given as c(t) = ( t

T

The error is given by e(t) = r(t)

T

) u(t)

c(t) = ( T

T

) u(t)

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The steady state error is

= im ( T

T

→

Control System

) u(t) = T

From above we see that the output velocity matches with the input velocity but lags behind the input by time T and a positional error of T units exists in the system. Time Response of A First Order Control System Subjected to Unit Impulse Input Function As R(s) = 1, C(s) =

c(t) = (

The error is given by e(t) = r(t) The steady state error is

T

c(t)

= im s E(s) = 0 →

Time Response of Second Order Control System A s ond ord r ontrol syst m is on or whi h th high st pow r ‘s’ in th d nomin tor o its transfer function is equal to 2. A general expression for the T.F. of a second order control system is given by, = Characteristic Equation The characteristic equation of a second order control system is given by s The roots are

s j

√

=0 ==

j

Here is called natural frequency of oscillations, = is called damped frequency of oscillations, √ ‘ is called damping ratio and affects damping and ‘

is called damping factor or damping coefficient.

Based on roots of characteristic equation, following can be highlighted.    

The real part of the roots denotes the damping Imaginary part denotes the damped frequency of oscillation Sustained oscillations are observed if the roots are lying on imaginary axis (j As increases, system becomes less oscillatory and more sluggish.

axis).

Table: Nature of system response based on 𝛇 S. No

Range of values of System

Nature response

1.

0

Undamped

Sustained/undamped

Purly imaginary

2.

0<


of

system Nature of characteristic equation

roots

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Control System

Time Response of a Second Order Control System Subjected to Unit Step Input Function c(t) = (

sin

√

t

The steady state error is

) u t where

= im

sin [(

√

→

Here the time constant T= (1 /

=

√ √

nd ф )t

[t n

) and Speed of the system

t n √

[

√

]

]] u(t) = 0

.

Transient Response Specification of Second Order Under-Damped Control System The time response of an under damped control system exhibits damped oscillations prior to reaching steady state. C(t)

T

n

Max. overshoot 2% 1

0.5

100%

0

td

tr

tp

ts

Fig. Unit step response of second order underdamped control system (1) Delay Time (td) It is the time required for the response to rise to 50% of the final value from zero, in first . attempt. td = (2) Rise Time (tr) The time needed for the response to reach from 10% to 90% (for overdamped system) or 0 to 100% (for underdamped systems) of the desired value of the output at the very first instant. tr =

√

; wh r

φ

√

t n-1 (

)

(3) Peak Time (tp) It is the time required for the response to reach the peak value at the first instant. tp =

√

Also the response exhibits overshoot and undershoot at the instants, THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 93

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t

Control System

where n

√

The local overshoots occur for n =1, 3, . . . . . . . and local undershoots occur for n =2, 4, . . . . . Hence the first undershoot occurs at the instant, . √

(4) Maximum Overshoot (Mp) The maximum positive deviation of the output with respect to its desired value/ steady state value is called Maximum overshoot. Percentage overshoot =

× 100 =

% Mp = exp (-

/√

× 100%

) × 100

(5) Settling Time (ts) For 2% tolerance band, the settling time is given by, ts = 4. For 5% tolerance band, the settling time is given by, ts = 3. Time Response of The Higher Order System And Error Constants Steady state error,

= im

Using Final value theorem, But C(s) = E(s) G(s)

= im

→

= im

E(s) = = im

→

[

]

→

=

=

→

Type and Order of System For the open-loop transfer function,  

The type indicates the number of poles at the origin and the order indicates the total number of poles. The type of the system determines steady state response and the order of the system determines transient response.

Let

= im

Let

= im

→

Let

= im

→

= Position error constant

→

= Velocity error constant = Acceleration error constant Table. Steady state error as a variation of type of the system Type Step Ramp Parabolic

0 A(

k )

1

2

3

0

0

0

A/

0

0

A/

0

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4.3: Stability & Routh Hurwitz Criterion Introduction Any system is said to be a stable system, if the output of the system is bounded for a bounded input (stability in BIBO sense) and also in the absence of the input, output should tend to zero (asymptotic stability). Based on above discussion, systems are classified as below, 1) 2) 3) 4)

Absolutely stable systems Unstable systems Marginally stable or limitedly stable systems Conditionally stable systems

Depending on the location of poles for a control system, stability of the system can be characterized in following ways.  Stability of any system depends only on the location of poles but not on the location of zeros.  If the poles are located in left side of s-plane, then the system is stable.  If any of the poles is located in right half of s-plane, then the system is unstable.  If the repeated roots are located on imaginary axis including the origin, the system is unstable.  When non-repeated roots are located on imaginary axis, then the system is marginally stable.  As a pole approaches origin, stability decreases.  The pole which is closest to the origin is called dominant pole.  If the variable parameter is varied from 0 to and the poles are always located on left side of s-plane, then the system is absolutely stable.  When variable parameter is varied from 0 to , if some point onwards, there is a pole in right half of S-plane. Then system is called conditionally stable and typically stability is conditioned on variable parameter. Absolute Stability Analysis Absolute stability analysis is by the qualitative analysis of stability and is determined by location of roots of characteristic equation in s-plane. Relative Stability Analysis The relative stability can be specified by requiring that all the roots of the characteristic equation be more negative than a certain value, i.e. all the roots must lie to the left of the line; s = - 1, ( 1 > 0). The characteristic equation of the system under study is modified by shifting the origin of the s – plane to s = - 1, i.e. by substitution s = z – 1. If the new characteristic equation in z satisfies the Routh criterion, it implies that all the roots of the original characteristic equation are more negative than – 1. Also if it is required to find out number of roots of characteristic equation between the lines S and S , perform Routh analysis by putting S z – 1, and find out number of roots to right of S . Similarly find out number of roots to the right of S . The difference between above two numbers gives the number of roots of characteristic equation between and . THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 95

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Routh-Hurwitz Criterion The Routh-Hurwitz criterion represents a method of determining the location of poles of polynomial with constant real coefficient with respect to the left half and the right half of the splane. Routh Hurwitz criterion mainly gives a flexibility to determine the stability of the closed loop control system without actually solving for poles. s

s

s

s

…………………..

S

b =

S

b =

S

b

S S 1

b

0

s

0

= =

d

d = =

If any power of s is missing in the characteristic equation, it indicates that there is at least one root with positive real part, hence the system is unstable. If the characteristic equation contains only odd or even powers of s, then roots are purely imaginary. Thus, the system will have sustained oscillations in output response. Also when Routh – Hurwitz criterion is applied, following difficulties can be faced. Difficulty 1: When the first term in any row of the Routh array is zero while rest of the row has at least one non-zero term.  Th di i ulty is solv d i z ro o th irst olumn is r pl d by sm ll positiv numb r ‘ ’ and Routh array is formed as usual. Then as → 0 from positive side, elements in the first column of Routh array are found out and stability analysis is done as usual. Difficulty 2: When all the elements in any one row of the Routh array are zero.  This situation is overcome by replacing the row of zeros in the Routh array by a row of coefficients of the polynomial generated by taking the first derivative of the auxiliary polynomi l nd Routh’s t st is p r orm d s usu l.

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4.4: Root Locus Technique Introduction Root locus is a locus of poles of transfer function of a closed loop control system when the variable parameter is varied from 0 to . Depending on nature of variable parameter and range of variation, root locus can be classified as below.    

Root Locus (RL) Complementary RL Complete RL Root counter

-

(K is varied from 0 to ) (K is varied from 0 to ) (K is varied from to ) (Multiple parameter variation )

Characteristic equation of above system is 1 + G(S) H(S) = 0. Usually while plotting root locus, a forward path gain, K which is inherently present in G(S) is considered as independent variable and roots of characteristic equation are considered as dependent variables. Any root of 0 satisfies following two conditions, | a) | b) 0 wh r K 0, , , ………… Rules for the Construction of Root Locus (RL) Let P be the number of open-loop poles and Z be the number of open – loop zeroes of a control system. Then the following are the salient features for construction of root locus plot. 1. The root locus is always symmetrical about the real axis. 2. The root locus always starts from open-loop poles for K=0 and ends at either finite open – loop zeroes or infinity for K → . 3. The number of branches of root locus terminating at infinity is equal to (P-Z) . 4. The number of separate branches of the root locus equals either the number of open – loop poles or the number of open-loop zeroes, whichever is greater. N = max(P, Z) 5. A section of root locus lies on the real axis, if the total number of open-loop poles and zeroes to the right of the section is odd and is helpful in determining presence of root locus at any point on real axis. 6. If P >Z, (Pbr n h s will t rmin t t ‘ ’ long str ight lin symptot s whose angles are as given below, ; q

0, , , ……………..P-Z-1

If Z > P, (Z-P br n h s will st rt t ‘ ’ long str ight lin as given below, ; q = 0, 1, 2 . . . . . . . . . . . (Z-P-1) 7. The asymptotes meet the real axis at centroid s Sum o r l p rts o pol s P

symptot s whos

ngl s r

as given below

Sum o r l p rts o z ros

8. Break – away point is calculated when root locus lies between two poles and break – in point is calculated when root locus lies between two zeros. Break – away / Break – in

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points are determined from the roots of the equation

0. Also r branches of the root

locus which meet at a point, break away at an angle of

.

9. Angle of departure is calculated when there are complex poles. Also, angle of departure from an open loop pole is given as below 0 ; q= 0, 1, 2, 3 . . . . . . Where is the net contribution at the pole of all other open loop poles and zeros. Also, angle of departure is tangent to root locus at complex pole. 10. Angle of arrival is calculated when there are complex zeroes. Also, angle of arrival at the open loop zero is given as below 0 , q= 0, 1, 2, 3 . . . . . . Also, angle of arrival is tangent to root locus of complex zero. 11. Th v lu o ‘K’ nd th point t whi h root lo us br n h ross s th im gin ry xis is determined by applying Routh criterion to the characteristic equation. The roots at the intersection point are imaginary. Also the points of intersection are conjugate, if all the coefficients of S are real in the characteristic equation. 12. Th v lu o op n loop g in ‘K’ t ny point on the root locus can be calculated by using the magnitude criteria, Produ t o ph sor l ngth rom s to op n loop pol s K Produ t o ph sor l ngth rom s to op n loop z ros

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4.5: Frequency Response Analysis Using Nyquist plot Frequency Domain Specifications Consider a closed – loop control system of open – loop transfer function G(S) and feed – back transfer function, H(S). If the system has negative feedback, the overall transfer function is given by M(S) = Put S = J ,

. | M(J

The plot of |M(J

|

|=|

| |

| with respect to |

is shown in figure below.

|

3db

0 BANDWIDTH

Fig. Closed-loop frequency response of a control system The response falls by 3 dB at frequency , from its low frequency value, called cut-off frequency and the frequency range 0 to is called the bandwidth of the system. The resonant peak, M occurs at resonance frequency, . The bandwidth is defined as the frequency at which the magnitude gain of frequency response plot reduces to 1/√ = 0.707 (i.e. 3 db) of its low frequency value. For a second order control system, M(s) = B.W. =

M j =

√

|M j

|

√

√ √

M =

√

Polar Plot onsid r ontrol syst m o tr ns r un tion complex function which is given as,

s . Th sinusoid l tr ns r un tion

j

is

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|

j | nd

R [

j

]

j m[

j

]

or

j

|

j

Control System

|

j

=M

Where M =

j m y b r pr s nt d s ph sor o m gnitud M nd ph s ngl . As the input frequency is v ri d rom 0 to , the magnitude M and phase angle change and hence the tip of the ph sor j tr s lo us in th ompl x pl n , which is known as polar plot. Consider a transfer function which consists of P poles and Z zeroes.  

tr ns r un tion do sn’t ont in pol s t origin, th n th pol r plot st rts rom 0 with non-zero magnitude and terminates at 90 P with zero magnitude. If the transfer function consists of poles at origin, then the polar plot starts from 0 with ‘ ’ m gnitud nd nds t 0 P with zero magnitude.

Special Cases of LTI Control Systems Minimum Phase System If G(S) has no poles and zeroes in the R.H.S of S-pl n , th n th syst m is ll d “minimum ph s syst m’. As z ro s r lso on l t h l on s-plane, inverse system of a minimum phase system is also stable. Non Minimum Phase System If G(S) has at least one pole or zero in the R.H.S of S plane, then system is called non-minimum phase system. Also the inverse system of a non-minimum phase system is unstable. All Pass System If G(S) has symmetric poles and zeroes about the about the imaginary axis, then system is called “All p ss syst m”. Also |G(

| = K;

where K is a constant.

Linear Phase System A system is called linear phase if plot of ;

with r sp t to

is lin r.

where K is a constant.

Nyquist Plot & Nyquist Stability Criteria Nyquist criterion is helpful to identify the presence of roots in a specified region based on polar plot of G(S).H(S). Thus, Nyquist stability analysis is more generalized than Routh criterion. By inspection of polar plot of G(S).H(S) more information is obtained than the stability of the control system. If N is the number of encirclements of G(s).H(s) around ( then

J0) in counter-clockwise direction,

–

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Where

Control System

is number of open loop poles with +ve real part and

is number of close-loop poles with +ve real part Tips for Getting Nyquist Plot 1. Nyquist plot is symmetric with respect to real axis. So the plot from 0 the plot from 0 is ( . 2. If the system is type N system, the angle subtended by the plot at origin as 0 0 is - N in clockwise direction.

is M(

,

varies from

Gain Margin The gain margin is a factor by which the gain of a stable system can be increased to bring the system on the verge of instability. If the phase cross-over frequency is denoted by , and the m gnitud o j j t is |G(j

j

|. The gain margin is given by

G.M = 20 log

|

|

d

Phase Margin: The phase margin of a stable system is the amount of additional phase lag required to bring the system to the point of instability. Phase margin is given as, PM =

0

where

is gain crossover frequency

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4.6: Frequency Response Analysis Using Bode Plot Bode Plots Given open – loop transfer function of a closed – loop control system as G(S) H(S), the stability of the control system can also be determined based on its sinusoidal frequency response (obtained by substituting S = J . The quantities, M = 20 |G(J H(J | (in dB) and phase, (in degrees) are plotted with respect to frequency on logarithmic scale ( in r t ngul r x s. Th plot obt in d bov is ll d “ od plot”. .M nd PM n b found out from Bode plots, thus relative stability of closed loop control system can be assessed. Bode Plots of K M

Fig. Bode plots of constant

Bode Plots of ⁄

: M

-20Ndb/decade

Fig. Bode plots of Nth order pole at 0.

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Bode Magnitude Plot of ⁄ M T 0

log

-20NdB/decade

T log

0

Fig. Bode plots of G(s) H(s) = ⁄

Bode Plot of (1 + ST)

⁄

⁄

Fig. Bode-Plots of G(S) H(S) = (1+ST) Bode Magnitude Plot of Second Order Control System M

-40 dB/dec Fig. Bode magnitude plot of II order control system

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Bode magnitude plot of any open-loop transfer function G(s) H(s) can be found out by superimposing individual magnitude plots of basic pole and zero terms. However phase response can be found out as usual by substituting S = J . M & N Circles Constant Magnitude Loci: M-Circles The constant magnitude contours are known as M-circles. M-circles are used to determine the magnitude response of a close-loop system using open-loop transfer function. It is applicable only for unity feedback systems. [x

]

y =[

]

The above Eq. represents a family of circles with center at (

, 0 and radius as | | . On a particular circle the value of M (magnitude of close-loop transfer function) is constant, therefore these circles are called M-circles. Constant Phase Angles Loci: N-Circles The constant phase angle contours are known as N-circles. N-circles are used to determine the phase response of a close-loop system using open-loop transfer function. [x

]

[y

]

*

+

For different values of N, above equation represents a family of circles with center at x = -½ , y = 1/2N and radius as√

. On a particular circle, the value of N or the value of phase angle of

the closed-loop transfer function is constant; therefore, these circles are called N-circles. Ni hol’s h rt The transformation of constant – M and constant – N circles to log-magnitude and phase angle coordinates is known as the Nichols chart.

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4.7: Compensators & Controllers Introduction Many a times, performance of a control system may not be upto the expectation, in which case the performance of the same can be improved by controllers or compensating networks. 1. Insertion of compensating network is nothing but addition of poles and zeros. 2. We can reduce the steady state error by increasing the forward path gain, but it makes the system unstable and oscillatory. 3. Addition of a pole to the open loop transfer function will lead the system towards instability. The speed of the response slows down. But the accuracy of the system increases. 4. Addition of a zero to the open loop transfer function will lead the system towards stability. The speed of the response becomes faster. But the accuracy of the system is reduced. Compensating Network 1. Cascade Compensation: The compensating network is introduced in forward path in this case. Phase lag/ lead compensators fall into this category. 2. Feedback Compensation: The compensating network is introduced in feedback path in this case. Phase Lag Compensator A compensator having the characteristic of a lag network is called a lag compensator. Hence, the poles of this network should be closer to origin than zeroes. 1. 2. 3. 4. 5. 6.

Results in a large improvement in steady sate response (i.e. steady state error is reduced). Results in a sluggish response due to reduced bandwidth. It is low pass filter and so high frequency noise signals are attenuated. Acts as an Integrator. Settling time increases. Gain of the system decreases. +

+

1/ sC _

_ Fig. Electric lag compensator

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j

Fig. Pole-zero plot of lag compensator General form of lag compensator,

s =

.

Approximate magnitude plot |

j | in dB

√

-20 dB/decade

0

j

Phase plot

ф

0

log √ Fig. Bode plot of lag compensator Frequency of maximum phase lag, Maximum lag angle, ф = t n

=√ [

√

] = sin

(

=√

T .

)

=

T

=

√

ф ф

Phase Lead compensator A compensator having the characteristics of a lead network is called a lead compensator. Lead compensator has zero placed more closer to origin than a pole. 1. Lead compensation appreciably improves the transient response. 2. The lead compensation increases the bandwidth, which improves the speed of the response and also reduces the amount of overshoot. 3. A lead compensator is basically a high pass filter and so it amplifies high frequency noise signals. 4. Acts as a differentiator. 5. Settling time decreases. 6. Gain of the system increases. 7. There is no improvement in steady state response. THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 106

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1/ sC +

+

_

_ Fig. Electrical lead network jω

T

T

Fig. Pole-zero plot of a lead network General form of transfer function of lead compensator,

s =

=

.

Approximate magnitude plot + 20 dB/decade |

j

20

|

20

√ ) 1/T

ф

0

j

0

log

√ Fig. Bode plot for lead compensator

Frequency of maximum phase lead, Also, ф = t n

*

√

+ = sin

*

=√ +

=√

T .

T =

√

.

ф ф

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Comparison of Phase Lag And Phase Lead Compensators Table. Comparison of characteristics of lead and lag compensators Characteristics Phase-Lead 1. Circuit Differentiator 2. ξ n r s s ↑ 3. w n r s s ↑ 4. T rise , t settling D r s s ↓ 5. Phase shift Increases 6. Phase Margin mprov ↑ 7. Gain cross over n r s s ↑ frequency (w ) 8. Band width Increases 9. Over shoot Decreases 10. Gain Decreases 11. Steady state error Increases 12. Constant (
|Z|

|Z|>|P|

√

√

R

R

↑↑ ↓ ↑ ↓

Decreases Decreases Increases Decreases >

15. sin ∅m) 16. Time constant

Phase Lag – Lead Compensator A compensator having the characteristics of lag –lead network is called a lag – lead compensator. 1. A lag – lead compensator improves both transient and steady state response. 2. Bandwidth of the system is increased. The transfer function of lag – lead compensator,
,0
.

together

State Equation Consider a system described as below, (x t ) = ẋ t =

x t

x t

b u t

b u t

(x t ) = ẋ

x t

x t

b u t

b u t

t =

State – space model can be described as below based on above state equation. ẋ t [

ẋ

t

] =[

][

x t

b

b

x t

] + [ b

b

u t ] [

u t

]

(t) = AX(t) + BU(t) Where X(t) = State vector, = Rate of change of state vector, U(t) = Input vector, A = System matrix or Evolution matrix B = Control matrix Output Equation For the system described above, let the output equations be y t = y t =

x t x t

x t x t

d u t d u t

d u t d u t

By representing these in matrix form, y t [

y t

x t ] =[

][

x t

d ] + [

d

d d

u t ] [

u t

]

Y(t) = CX(t) + DU(t) Where

y(t) is output vector, C is observation matrix D is transmission matrix

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Different State – Space Representations Direct Decomposition n dir t d omposition, th m trix A is o ush’s ph s v ri bl orm s b low, 0 ………. 0 0 0 0 ………. 0 0 0 ………. 0 0 0 0 0 If

0

[ , ,………

……….. 0 ] …………. ………… are eigen values of A, eigen vector matrix, P can be represented as. 0

…………….. ……………… ……………… .. ..

.. ..

.. ..

[

]

Cascade Decomposition Here given system is converted into multiple systems in cascade and direct decomposition is performed to each of these sub-systems. Parallel Decomposition Here the given system transfer function is split into partial fractions first and by considering direct decomposition of each of the sub-system (partial fraction terms) in parallel, parallel decomposition can be performed. State Transition Matrix The transition matrix is defined as a matrix that satisfies the linear homogeneous state equation. A t For t

0,

X(t) =

[ Sl

t Here

t =

S

A

A

] (0)

s .

0 =

t .

0 where

s = S

A

is called state transition matrix.

Properties of the State Transition Matrix Th st t tr nsition m trix ф t poss ss s th 1. 2. 3. 4. 5.

ollowing prop rti s

ф 0 th id ntity m trix ф t ф -t) [ф t ] ф nt ф t -t ф t -t ф t -t or any t , t , t ф t t ф t ф t

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Time Response Given a state space representation of a control system, the time response for any generic input and initial conditions contains the following. Zero Input Response Only initial conditions are considered and input is considered to be zero. t

0

Zero State Response Only input functions are considered and initial conditions are zero. t

[

B U(s)]

Total Response Total response can be described as, t ∅ t x 0 (∅ S . U S ) Transfer Matrix of System Consider a MIMO described by,

Transfer matrix of system is given as G(s) = C Controllability of Linear Systems A system is said to be controllable, if there exists an input to transfer the state of system from any given initial state X(t to any final state X(t ) in a finite time (t t ) 0. The condition of controllability depends on the coefficient matrices A and B of the system. Kalman Test for Controllability For the system to be completely state controllable, it is necessary and sufficient that the following matrix Qc has a rank n, where n is order of A. Q = [ B : AB : A B: . . . . . . . . A

B]

For the system to be controllable, rank of Q should be n or |Q |

0.

Observability of Linear Systems A system is said to be observ bl i it’s possibl to g t in orm tion bout st t v ri bl s rom th measurements of the output and input Kalman Test for Observability For the system to be completely observable, it is necessary and sufficient that the following composite matrix Q0 has a rank of n, where n is order of A. Q0 = [

A

A

...... A

].

For the system to be observable, rank of Q0 should be n or |Q |

0.

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Part – 5: Digital Circuits 5.1: Number Systems & Code Conversions Characteristics of any number system are: 1. Base or radix is equal to the number of possible symbols in the system 2. The largest value of digit is one (1) less than the radix Decimal to Binary Conversion: (a) Integer number: Divide the given decimal integer number repeatedly by 2 and collect the remainders. This must continue until the integer quotient becomes zero. (b) Fractional Number: Multiply by 2 to give an integer and a fraction. The new fraction is multiplied by 2 to give a new integer and a new fraction. This process is continued until the fraction becomes 0 or until the numbers of digits have sufficient accuracy. Note: To convert a decimal fraction to a number expressed in base r, a similar procedure is used. Multiplication is by r instead of 2 and the coefficients found from the integers any range in value from 0 to (r-1). The conversion of decimal number with both integer and fraction parts separately and then combining the answers together.    

Don’t care values or unused states in BCD code are 1010, 1011, 1100, 1101, 1110, 1111. Don’t care values or unused state in excess – 3 codes are 0000, 0001, 0010, 1101, 1110, 1111. The binary equivalent of a given decimal number is not equivalent to its BCD value. Eg. Binary equivalent of 2510 is equal to 110012 while BCD equivalent is 00100101. In signed binary numbers,MSB is always sign bit and the remaining bits are used for magnitude. A7

A6

Sign Bit  

A5

A4

A3 A2

A1

A0

Magnitude

For positive and negative binary number, the sign is respectively ‘0’ and ‘1’. Negative numbers can be represented in one of three possible ways. 1. Signed – magnitude representation. 2. Signed – 1’s complement representation. 3. Signed – 2’s complement representation.

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Example: Signed – magnitude

+9 0 0001001

Digital Circuits

-9 (a) 1 000 1001 signed – magnitude (b) 1 111 0110 signed – 1’s complement (c) 1 111 0111 signed – 2’s complement

     

Subtraction using 2’s complement: Represent the negative numbers in signed 2’s complement form, add the two numbers, including their sign bit and discard any carry out of the most significant bit. Since negative numbers are represented in 2’s complement form, negative results also obtained in signed 2’s complement form. The range of binary integer number of n-bits using signed 1’s complement form is given by +(2 – 1) to –(2 – 1),which includes both types of zero’s i.e., +0 and -0. The range of integer binary numbers of n-bits length by using signed 2’s complement representation is given by + (2 – 1) to – 2n-1 which includes only one type of zero i.e. + 0. In weighted codes, each position of the number has specific weight. The decimal value of a weighted code number is the algebraic sum of the weights of those positions in which 1‘s appears. Most frequently used weighted codes are 8421, 2421 code, 5211 code and 84 2’1’ code.

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5.2: Boolean Algebra & Karnaugh Maps  Boolean properties: a) Properties of AND function 1. X . 0 = 0 3. X . 1 = X

2. 0 . X = 0 4 .1.X = X

b) Properties of OR function 5. X + 0 = X

6. 0 + X = X

7. X + 1 = 1

8. 1 + X = 1

c) Combining a variable with itself or its complement 9. X .X’ = 0

10. X . X = X

11. X + X = X

12. X + X’ = 1

13. (X’)’ = X d) e) f) g)

Commutative laws: Distributive laws: Associative laws: Absorption laws:

h) Demorgan’s laws:

14. 16. 18. 20.

x. y = y. x x(y +z) = x.y + x.z x(y.z) = (x. y) z x + xy= x

15. 17. 19. 21.

x+y=y+x x + y. z = ( x+y) (x + z) x + ( y + z) = (x + y) +z x(x + y) = x

22. x + x’y = x+ y

23. x(x’ + y) = xy

24. (x + y)’ = x’ .y’

25. (x . y)’ = x’ + y’

 Duality principle: It states that every algebraic expression deducible from theorems of Boolean algebra remains valid if the operators and identify elements are interchanged.  To get dual of an algebraic function, we simply exchange AND with OR and exchange 1 with 0.  The dual of the exclusive – OR is equal to its complement.  To find the complement of a function is take the dual of the function and complement each literal.  Maxterm is the compliment of its corresponding minterm and vice versa.  Sum of all the minterms of a given Boolean function is equal to 1.  Product of all the maxterms of a given Boolean function is equal to 0 Boolean Algebraic Theorems Theorem No. Theorem ̅) = ( + B). ( + B 1. ̅ 2. B + C = ( + C)(̅ + B) ( + B)(̅ + C) = C + ̅ B 3. 4. B + ̅ C + BC = B + ̅ C ̅ ( + B)( + C)(B + C) = ( + B)(̅ + C) 5. ̅̅̅̅̅̅̅̅ ̅ + C̅ + 6. . B. C. = ̅ + B ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅ ̅. C̅ 7. + B + C + = ̅. B THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 117

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Karnaugh Maps (K – maps)  A map is a diagram made up of squares. Each square represents either a minterm or a maxterms.  The number of squares in the karnaugh map is given by 2 where n = number of variable.  Gray code sequence is used in K – map so that any two adjacent cells will differ by only one bit. No. of cells Number of No. of variables No. of literals present containing 1’s variables eliminated in the resulting term grouped 4 2 0 2 1 1 2 1 0 2 8 3 0 4 2 1 3 2 1 2 1 0 3 16 4 0 8 3 1 4 2 2 4 2 1 3 1 0 4

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5.3: Logic Gates  OR, AND, NOT are basic gates  NAND and NOR gates are called Universal gates because, by using only NAND gates or by using only NOR gates we can realize any gate or any circuit.  EXOR, EXNOR are arithmetic gates.  There are two types of logic systems 1) Positive level logic system (PLLS) : Out of the given two voltage levels, the more positive value is assumed as logic ‘1’ and the other as logic ‘0’. 2) Negative level logic system (NLLS):out of the given two voltage levels, the more negative value is assumed as logic ‘1’ and the other as logic ‘0’.  NOT gate:Truth Table A Y 0

1

1

0

+VCC

Symbol A Y=̅

 AND gate: Truth Table A B Y 0 0 0 0 1 0 1 0 0 1 1 1

VCC A B

Y = AB

A B

 OR gate: A 0 0 1 1

B 0 1 0 1

Y 0 1 1 1

Y=̅

A

Y

A Y = A+B

B

A Y B

 NAND gate: A 0 0 1 1

B 0 1 0 1

Y 1 1 1 0

A B

Y = ̅̅̅̅ B

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Digital Circuits

 NOR gate: A 0 0 1 1

B 0 1 0 1

Y 1 0 0 0

A Y = ̅̅̅̅̅̅̅ +B

B

 The circuit, which is working as AND gate with positive level logic system, will work as OR gate with negative level logic system and vice-versa.  The circuit which is behaving as NAND gate with positive level logic system will behave as NOR gate with negative level logic system and vice – versa.  Exclusive inputs”. A 0 0 1 1

OR gate (X– OR): “The output of an X – OR gate is high for odd number of high B 0 1 0 1

Y 0 1 1 0

A Y = A⊕B= B’ + ’B

B

 Exclusive NOR gate (X–NOR): The output is high for odd number of low inputs”. (OR) “The output is high for even number of high inputs”. A B Y A 0 0 1 Y = A⨀B= B + ’B’ 0 1 0 B 1 0 0 1 1 1  Realization of Basic gates using NAND and NOR gates: 1. NOT gate A

NAND Y=̅

A A 1

NOR Y = ( . )’ A = Y = ( .1)’ A 0 = ’

( + )’ = ’ Y = ( + 0)’ =

2. AND gate A A B

A Y =AB

B

Y =AB

Y =AB

B

3. OR gate: A A B

A Y =A+B B

Y = A+B B

Y = A+ B

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 Realization of NAND gate using NOR gates: A

A B

Y = ( B)’ Y = ( B)’ B

 Realization of NOR gate using NAND gates: A

A Y = ( + B)’

B

B

Y = ( + B)’

 Realization of X – OR gate using NAND and NOR gates: A Y = B’+ ’B

B A

Y = B’ + ’B B A `

Y = B’ +

B

B  The minimum number of NAND gates required to realize X – OR gate is four.  The minimum number of NOR gates required to realize X – OR gate is five.  Equivalence Properties: 1. (X ⊕Y)’ = X’Y’ + XY = X 2. X 0 = X’ 3. X 1 = X 4. X X = 1 5. X X’= 0 6. X Y = Y X 7. (X Y)’ = X ⊕ Y

Y

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Digital Circuits

Alternate Logic Gate Symbols 4. A bubbled NAND gate is equivalent to OR gate A `

A Y=( B)

B `

=A+B

Y = A+B

B

5. A bubbled NOR gate is equivalent to AND gate A Y=(

B

A `

+ B ) =AB

B `

Y= B

6. A bubbled AND gate is equivalent to NOR gate A ` B `

A Y=

B = ( + B)

Y = ( + B)

B

7. A bubbled OR gate is equivalent to NAND gate A B

Y=

+ B =( B)

A ` B `

Y = ( B)

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5.4: Logic Gate Families  Fan- Out: “The number of standard loads that the output of the gate can drive without disturbing its normal operation’’.  Fan-In: “The maximum number of inputs that can be applied to the logic gate’’.  Noise Margin: “It is the limit of a noise voltage which may be present without impairing the proper operation of the circuit’’ NM = and NM = .  Figure of Merit: The product of propagation delay time and power dissipation.  Saturation Logic: A form of logic gates in which one output state is the saturation voltage level of the transistor. Example: RTL, DTL, TTL.  Unsaturated Logic or Current Mode Logic: A form of logic with transistors operated outside the saturation region. Example: CML or ECL.  Voltage Parameters of the Digital IC: : This is the minimum input voltage which is recognized by the gate as logic 1. : This is the maximum input voltage which is recognized by the gate as logic 0. : This is the minimum voltage available at the output corresponding to the logic 1. VOL: This is the maximum voltage available at the output corresponding to logic 0.  Passive Pull- up: In a bipolar logic circuit, a resistance output transistor is known as passive pull-up.

used in the collector circuit of the

 Active Pull-up: In a bipolar logic circuit, a BJT and diode circuit used in the collector circuit of the output transistor instead of is known as active pull-up. This facility is available is TTL family.  The advantages of active pull- up over passive- pull up are increased speed of operation and reduced power dissipation.  In TTL logic gate family, three different types of output type configurations are available: they are open collector output type, Totem-pole output type and tri-state output type.  The advantages of open-collector output are wired-logic can be performed and loads other than the normal gates can be used.  The tri- state logic devices are used in bus oriented systems.  If any input of TTL circuit is left floating, it will function as if it is connected to logic 1 level.  If any unused input terminal of a MOS gate is left unconnected, a large voltage may get induced at the unconnected input which may damage the gate.  Comparison of Different Logic Gate families DTL

TTL

ECL

CMOS

PMOS

Fan-out

8

10

25

50

20

Propagation Delay

30n sec

10nsec.

4nsec.

70 nsec.

300 sec

Power Dissipation

8mW

10mW

40mW

0.01mW

0.2 -10mW

Noise Margin(min.)

700mV

400mV

200mV

300mV

150mV

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

Gates with open collector output can be used for wired VCC

A

Digital Circuits

AND operation

̅̅̅̅. ̅̅̅̅ = ̅̅̅̅̅̅̅̅̅̅̅̅ +

B C D



Open emitter output is available in ECL. Wired – OR operation is possible with ECL circuits. A B (

+

+

+

)=(

+ )( + )

C D stream Video of Nayanthara and Simbu www.http://yahoo.com/

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5.5: Combinational Digital Circuits Digital circuits can be classified into two types: o Combinational digital circuits and o Sequential digital circuits. Combinational Digital Circuits: In these circuits “the outputs at any instant of time depends on the inputs present at that instant only.” For the design of Combinational digital circuits, basic gates (AND, OR, NOT) or universal gates (NAND, NOR) are used. Examples for combinational digital circuits are adder, decoder etc. Sequential Digital Circuits: The outputs at any instant of time not only depend on the present inputs but also on the previous inputs or outputs. For the design of these circuits in addition to gates we need one more element called flip-flop. Examples for sequential digital circuits are Registers, Shift register, Counters etc. Half Adder: A combinational circuit that performs the addition of two bits is called a halfadder. Sum = X ⊕ Y = XY’ + X’ Y

Carry = XY

Half Subtractor: It is a Combinational circuit that subtracts two bits and produces their difference. Diff. = X ⊕ Y = XY’ + X’Y Borrow = X’ Y Half adder can be converted into half subtractor with an additional inverter. Full Adder: It performs sum of three bits (two significant bits and a previous carry) and generates sum and carry. Sum=X⊕ ⊕Z Carry = XY + YZ + ZX Full adder can be implemented by using two half adders and an OR gate. X Y

H.A.

H.A.

Sum

Z

Carry

Full subtractor: It subtracts one bit from the other by taking pervious borrow into account and generates difference and borrow. Diff.=X⊕ ⊕Z Borrow = X’Y + YZ + ZX’ 

Full subtractor can be implemented by using two half- subtractors and an OR gate. X Y Z

H.S.

H.S.

Diff.

Borr.

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Multiplexers (MUX)   

It selects binary information from one of many input lines and directs it to a single output line The selection of a particular input line is controlled by a set of selection lines There are 2 input lines where ‘n’ is the select lines i/p then n = log M 2 : 1 MUX I 2:1 MUX

I

Y=S̅I + SI

Y

S 4 : 1 MUX I I I I

4:1 MUX

S1

S1 0 0 1 1

Y

S0 0 1 0 1

Y I I I I

S0

Y=S̅ S̅ I + S̅ S I + S S̅ I + S S I  Decoder: Decoder is a combinational circuit that converts binary information from ‘n’ input lines to a maximum of 2 unique output lines. Truth table of active high output type of decoder.

X

Y

D

D

D

D

0

0

1

0

0

0

X 2

0

1

0

1

0

0

1

0

0

0

1

0

1

1

0

0

0

1

4

Y

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 Encoder  Encoder is a combinational circuit which has many inputs and many outputs  It is used to convert other codes to binary such as octal to binary, hexadecimal to binary etc.  Clocked S-R Flip-flop: It is called set reset flip-flop. No change Reset set Forbidden

0

0

0

1

0

1

0

1

1

1

*

Pr S Clk R

Q

Cr Q

= S +R Q

PRESET S

Q

Clk

Q’

R CLEAR

 S and R inputs are called synchronous inputs. Preset (pr) and Clear (Cr) inputs are called direct inputs or asynchronous inputs.  The output of the flip-flop changes only during the clock pulse. In between clock pulses the output of the flip flop does not change.  During normal operation of the flip flop, preset and clear inputs must be always high.  The disadvantage of S-R flip-flop is S=1, R=1 output cannotbe determined. This can be eliminated in J-K flip-flop.  S-R flip flop can be converted to J-K flip-flop by using the two equation S=JQ’ and R= KQ.

Pr

S

J Q’

Q

J

Clk

Clk Q’

R Cr

Q K Q

Q

K

Q’

= JQ + K Q

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Digital Circuits

Truth table

0

0

0

1

0

1

0

1

1

1

 Race around problem is present in the J-K flip flop, when both J=K=1.  Toggling the output more than one time during the clock pulse is called Race around Problem.  The race around problem in J-K flip-flop can be eliminated by using edge triggered flip-flop or master slave J-K flip flop or by the clock signal whose pulse width is less than or equal to the propagation delay of flip-flop.  Master-slave flip-flop is a cascading of two J-K flip-flops Positive or direct clock pulses are applied to master and these are inverted and applied to the slave flip-flop. D-Flip-Flop: It is also called a Delay flip-flop. By connecting an inverter in between J and K input terminals. D flip-flop is obtained. Truth table

D

J

Q

0

0

1

1

D

Q Clk

K

Q’

T Flip-flop: J K flip-flop can be converted into T- Flip-flop by connecting J and K input terminals to a common point. If T=1, then Q n+1 = Q . This unit changes state of the output with each clock pulse and hence it acts as a toggle switch. Truth table T 0 1

Q Q Q

T

J

Q Clk

K

Q’

 Ring Counter: Shift register can be used as ring counter when Q0 output terminal is connected to serial input terminal.  An n-bit ring counter can have “n” different output states. It can count n-clock pulses.  Twisted Ring counter: It is also called Johnson’s Ring counter. It is formed when Q output terminal is connected to the serial input terminal of the shift register. THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 128

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Digital Circuits

 An n-bit twisted ring counter can have maximum of 2n different output states. Counters: The counter is driven by a clock signal and can be used to count the number of clock cycles counter is nothing but a frequency divider circuit.  Two types of counters are there: (i) Synchronous (ii) Asynchronous  Synchronous counters are also called parallel counters. In this type clock pulses are applied simultaneously to all the flip – flops  Asynchronous counters are also called ripple or serial counter. In this type of counters the output of one flip – flop is connected to the clock input of next flip – flop and soon.

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5.6: AD /DA Convertor  There are two types of DACs available a) Binary weighted resistor type of DAC and b) R – 2 R ladder type of DAC  The advantage of R – 2R ladder type of DAC over Binary weighted type of DAC a) Better linearity and b) It requires only two different types of resistors with values R and 2R.  The percentage resolution of n – bit DAC is given by

100

 The resolution of an n –bit DAC with a range of output from 0 to V volts is given by Volts  Different types of DC’s are available:  Simultaneous ADC or parallel comparator of Flash type of ADC  Counter type ADC or pulse width type of ADC  Integrator type of ADC or single slope of ADC  Dual slope integrator ADC  Successive approximation type ADC etc.  Flash type of ADC is the faster type of ADC, An n – bit Flash type ADC requires 2 – 1 comparators.  Dual slope ADC is more accurate.

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5.7: Semiconductor Memory The capacity of a memory IC is represented by 2 m, where ‘2 ’ represents number of memory locations available and ‘m’ represents number of bits stored in each memory location. Example:- 2 8 = 1024 8 To increase the bit capacity or length of each memory location, the memory ICs are connected in parallel and the corresponding memory location of each IC must be selected simultaneously. Eg. 1024 × 8 memory capacity can be obtained by using 4 ICs of memory capacity 1024×2. Types of Memories:

Memories

Semiconductor Memories

Magnetic Memories

Drum

Read/Write Memory (RAM or user memory)

Disk

Bubble

Core

Read Only Memory (ROM)

PROM Static RAM

Tape

EPROM

EEPROM

Dynamic RAM

 Volatile Memory: The stores information is dependent on power supply i.e., the stored information will remain as long as power is applied. Eg. RAM  Non- Volatile Memory: The stored information is independent of power supply i.e., the stored information will present even if the power fails. Eg: ROM, PROM, EPROM, EEPROM etc.  Static RAM (SRAM): The binary information is stored in terms of voltage. SRAMs stores ones and zeros using conventional Flip-flops.  Dynamic RAM (DRAM): The binary information is stored in terms of charge on the capacitor. The memory cells of DRAMs are basically charge storage capacitors with driver transistors. Because of the leakage property of the capacitor, DRAMs require periodic charge refreshing to maintain data storage.  The package density is more in the case of DRAMs. But additional hardware is required for memory refresh operation.  SRAMs consume more power when compared to DRAMs. SRAMS are faster than DRAMs.

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5.8: Introduction to Microprocessors                





8085 Microprocessor is a 40 pin IC, requires +5V single power supply. Address Bus width of 8085 is 16-bit. Its addressing capacity is 216=65,536=64K (1K=1024) Low order address Bus A0-A7 is multiplexed with data bus D0-D7 Maximum clock frequency of 8085 microprocessor is 3.07 MHz. Crystal frequency of 8085 processor is 6.144 MHz. It is always double to that of clock frequency. It supports five hardware Interrupts and eight software Interrupts. 8085 supports five status flags: Sign (S), Zero (Z), Auxiliary Carry (Ac), Parity (P) and Carry (Cy). It consists of two 16-bit address registers: Program Counter (PC) and Stack Pointer register (SP). PC always holds address of next memory location to be accessed. SP always holds address of the top of the stack. 8085 consists of six 8-bit general purpose registers which are accessible to the programmer: B, C, D, E, H and L. They can also be used as three register pairs: BC, DE and HL. ALE (Address Latch Enable) signal is used to latch low order 8 – bit address present on AD0 – AD7 into external latches HOLD and HLDA signals are used for DMA (Direct Memory Access) operation. READY signal is used by the microprocessor to communicate with slow operating peripherals. ̅̅̅̅̅̅̅̅̅̅̅̅̅ RESET IN is chip reset which is active low signal 8085 uses S0 and S1 signals to indicate the current status of the processor. S1 S0 Status 0 0 Halt 0 1 Write 1 0 Read 1 1 Fetch ̅ with control signals RD ̅̅̅̅ and ̅̅̅̅̅ By Combining the status signal IO/M R we can generate four different signals ̅ ̅̅̅̅ ̅̅̅̅̅ Operation IO/M RD R ̅̅̅̅̅̅̅̅̅ 0 0 1 MEMR ̅̅̅̅̅̅̅̅̅̅ 0 1 0 MEM ̅̅̅̅̅ 1 0 1 IOR ̅̅̅̅̅̅ 1 1 1 IO DMA is having highest priority over all the interrupts

Interrupts

Type

Instruction

Hardware

Trigger

Vector

TRAP

Nonmaskable Maskable

No external Hardware No external Hardware

Level & Edge sensitive Edge sensitive

0024

RST 7.5

RST 6.5

Maskable

Independent of EI & DI Controlled by EI & DI; Unmasked by SIM Controlled by EI & DI; Unmasked by SIM

No external Hardware

Level sensitive

0034

003C

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RST 5.5

Maskable

INTR

Maskable

Controlled by EI & DI; Unmasked by SIM Controlled by EI & DI

No external Hardware

Digital Circuits

Level sensitive

002C

RST Code Level 0000 to 0038 from external sensitive Hardware  Accumulator register content and status register content together is called PSW (Program Status Word or Processor Status Word) with Accumulator as Upper byte.  Data Transfer Instructions: These instructions are used to transfer data from register to register, register to memory or from memory to register. No flags will be affected for these instructions. r1, r2 r can be any one out of B, C, D, E, H, L, A and rp can be any one of 3 register pairs BC, DE & HL. MOV r1, r2 ( r1 ) ← ( r2 ) ( r ) ← (M) or ( r ) ←((HL)) MOV r, M ( M ) ← ( r ) or ((HL)) ← ( r) MOV M, r ( r/M ) ← ( 8 – bit data ) d8 MVI ( r/M ), d8 Rp ← 16 – bit rp = BC, DE, L XI rp, 16 – bit HL or SP LDA 16 – bit address STA 16 – bit address LHLD 16 – bit address SHLD 16 – bit address LD Xr } rp can be either BC or DE pair ST Xr XCHG PCHL

(HL) ←→ (DE) (PC) ←→ (HL)

 Arithmetic Instructions: This group consists of addition, subtraction, increment and decrement operations. 8085 microprocessor does not support multiplication and division instructions ADD r

(A)(A)+(A)

ADD M

(A)(A)+(M)

ADI d8

(A)(A)+d8

ADC r

(A)(A)+(r)+Cy

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Digital Circuits

ADC M

(A)(A)+(M)+Cy

ACI d8

(A)(A)+d8+Cy

SUB r

(A)(A)-(r)

SUB M

(A)(A)-(M)

SUI d8

(A)(A)-d8

SBB r

(A)(A)-(r)-Cy

SBB M

(A)(A)-(M)-Cy

SBI d8

(A)(A)-d8-Cy

INR r

(r)(r)+1

INR M

(M)(M)+1

INX rP

(rP)(rP)+1 (rp=BC, DE, HL or SP)

DCR r

(r)(r)-1

DCR M

(M)(M)-1

DCX rp

(rp)(rp)-1

DAD rP

(HL)(HL)+(rP) (rP=BC, DE, HL or SP)

(rp=BC, DE, HL or SP)

DAA  In 8085, the service of AC flag is used by only one instruction. It is DAA.  For INX and DCX instructions, no flags is affected  Following table shows the list of flags affected for different instructions Instruction S Z Ac P Yes Yes Yes Yes INR, DCR No No No No DAD Yes Yes Yes Yes ADD, ADC, SUB, SBB, DAA

Cy No Yes Yes

 Logical Instructions: This group consists of AND, OR, NOT, XOR, Compare and Rotate operations ORA r (A)(A) V (r) ORA M

(A)(A) V (M)

ORI d8

(A)(A) V d8

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Digital Circuits

ANA r

(A)( ) ∧ (r)

ANA M

(A)( ) ∧ (M)

ANI d8

(A)( ) ∧ (d8)

XRA r

(A)( ) ∀ (r)

XRA M

(A)( ) ∀ (M)

XRI d8

(A)( ) ∀ d8

CMP r

( )⋛ (r)

CMP M

( )⋛ (M)

CPI d8

( )⋛ d8

CMA

(A)( )

CMC

Cy

STC

Cy1

RLC

Rotate accumulator left

RAL

Rotate accumulator left through carry

RRC

Rotate accumulator right

RAR

Rotate accumulator right through carry

 Following table shows how flags affected for different logical instructions Instruction

S

Z

Ac

P

Cy

ANA

Yes

Yes

1

Yes

0

ORA, XRA

Yes

Yes

0

Yes

0

RLC, RRC, RAL, RAR, STC, CMC

No

No

No

No

Yes

CMP, CPI

Yes

Yes

Yes

Yes

Yes

 Branch Instructions: These are also called program control transfer instruction. These are two types: Un conditional branch and Conditional branch instructions  No flags will be affected for branch instructions  Unconditional Branch Instructions JMP 16-bit address CALL 16-bit address RET RST n (n=0 to 7)

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Digital Circuits

 Conditional branch instruction Jump Instructions

Call Instructions

Return Instruction

Condition

J Z 16 – Bit addr

CZ 16 – bit addr

RZ

If Z =1

JNZ 16 – bit addr

CNZ 16 – bit addr

RNZ

If Z = 0

JC 16 –bit addr

CC 16 – bit addr

RC

If Cy = 1

JNC 16 – bit addr

CNC 16 – bit addr

RNC

If Cy = 0

JP 16 – bit addr

Cp 16 - bit addr

RP

If S = 0

JM 16 – bit addr

CM 16 – bit addr

RM

If S = 1

JPO 16 – bit addr

CPO 16 – bit addr

RPO

If P = 0

JPE 16 – bit addr

CPE 16 – bit addr

RPE

If P = 1

 Machine Control, Stack and IO related Instructions: No Flags affected for these instructions.  Machine Control: EI, DI, SIM, RIM , NOP, HLT  Stack related : PUSH rp (rp = BC 1 (d) Ramp Input Vi(t) = t u (t) and Vo(t) =

Signal

(1 e

), are shown below,

Input = Output

Deviation from Linearity Output

0 Fig (a)

T

t

0

t

T Fig (b)

Fig. (a) Response of a high pass RC circuit to a ramp voltage for RC / T >> 1; (b)Response to a ramp voltage for RC / T 1. (

e

)e

f

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Clamping Networks: V0 vi V

+ T

+

C R

t

0

V0

t 2V

-

-V

-2V +

V0

+

C R

Vi

V0

2V 0

t

V

+

+

C

Vi

R

V

-

V0

R

V0

V

-

V0

+

C

Vi

t 2V

-

1

+

0

V 10

0 -Vi

t

-

1

2V

V0 + Vi -

+

C V1

R

V0 -

2V 0 -V1

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t

Quick Refresher Guide

Analog Circuits

Parameter Ripple frequency (f )

Half-Wave fs

Full-Wave 2fs

Bridge 2fs

PIV

Vm

2Vm

Vm

Im

Vm/(Rf +RL)

Vm/(Rf +RL)

Vm/(2Rf +RL)

Average current(Idc)

Im

2Im

2Im

R.M.S value (Irms)

Im/2

Im/√

Im/√

D.C. voltage (Vdc)

Vm

Form factor(F)

1.57

1.11

1.11

Ripple factor(r)

1.21

0.482

0.482

RL

RL

RL

Pdc

- Idc Rf

Pi

2Vm

(Rf + RL)

Efficiency( r)

(

)

%

- Idc Rf

2Vm

(Rf + RL) (

)

-2 Idc Rf

(Rf + RL)

%

(

)

%

Regulation fs = a.c input supply frequency, PIV (Peak Inverse Voltage)=the maximum voltage to which the diode is subjected in a rectifier circuit ( d ( ∫ d ) ∫ Vdc = Idc RL, Form factor, F = Irm/Idc ) (√

–

i

ef c

= RMS value of the ac components of current =

)0.5 ’rms / Idc

’rms / Vdc = √

= Efficiency of Rectification = P

/ Pi, Regulation =

(

)

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6.2: DC Biasing-BJTs VBE: decreases about 7.5 mV per degree Celsius (0C) increase temperature. ICO (reverse saturation current): doubles in value for every 100C increase in temperature. IC = f (ICO, VBE β) β

Biasing Type

β

β

Operating Point Stability Factor

Fixed Bias Circuit

Fixed Bias Circuit With Emitter Resistor

β

( + )

β

β (β

)

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Collector To Base Biasing Circuit

β

Self Bias Circuit

Type

Analog Circuits

(

)

h

Symbol Basic Relationships

β

β β

Input Resistance and Capacitance

JFET (n-channel)

> MΩ Ci: (1-10)

D G S (

)

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MOSFET Depletion-type (n-channel)

Analog Circuits

D R> Ω Ci: (1-10)

G S (

)

MOSFET Enhancement-type (n-channel)

D

R> MΩ Ci: (1-10)

G S ( K=

Type JFET Fixed-bias

( (

(

Configuration

(

)

))

) (

))

Pertinent Equations

JFET Self-bias (

)

(

)

JFET Voltage-divider bias

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Analog Circuits

JFET Common-gate (

JFET (

)

JFET (

)

( (

)

) )

Depletion-type MOSFET *(All configurations above plus cases where +voltage) Fixed-bias

Depletion-type MOSFET Voltage-divider Bias (

)

Enhancement-type MOSFET Feedback configuration

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Analog Circuits

Enhancement-type MOSFET Voltage-divider bias

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6.3: Small Signal Modeling Of BJT and FET Configuration

Fixed-bias (JFET or D-MOSFET)

= High (

MΩ)

Medi m ( kΩ) =

Medium (-10) g (

=

)

g (

Port

)

(

)

System

Self-bias bypassed

(JFET or D-MOSFET)

High(

MΩ)

Medi m ( kΩ) =

Medium (-10) = g ( ) = g ( )

= (

Port

)

g (

System

Self-bias unbypassed Rs (JFET or D-MOSFET)

g

High( =

MΩ)

Medi m ( kΩ)

Low(-2) g

g

g

= (

Voltage-divider bias(JFET or D MOSFET)

)

High (

MΩ)

= (

))

Medi m ( kΩ)

(

(

(

))

Medium (-10) g (

)

g

) (

)

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Quick Refresher Guide Source Follower(JFET or D-MOSFET)

High( =

MΩ)

L = = (

(

Analog Circuits

MΩ) g g )

Low ( Gain Band Width: Because of the compensation circuits included in an op amp, the voltage gain drops off as frequency increases. A frequency of interest is where the gain drops by 3dB, this being the cutoff frequency of the op-amp, f . The unity gain frequency f and cutoff frequency are related by f =

f = gain x BW

where

is differential voltage gain

It should be noted that gain bandwidth product of op-amp remains constant whether it is open loop or feedback amplifier. If gain is decreased, bandwidth increases and vice-versa.

f

f

e

e cy ( g c e)

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Maximum Signal Frequency: Let = K sin2 ft. The maximum voltage rate of change can be shown to be signal maximum rate of change 2 fK V/s. To prevent distortion at the output the rate of change must also be less than the slew rate, i.e, 2 fK

SR

rad/sec

Slew Rate, SR is maximum rate at which amplifier output can change in volts per µs. SR =

V/µs

Differential Inputs: when separate inputs are applied to the op-amp, resulting difference signal is the difference between the two points. =

-

Common Inputs: When both input signals are the same a common signal element due to the two inputs can be defined as the average of the sum of the two signals. = (

)

Output Voltage: Since any signals applied to an op-amp in general have both in-phase and out of phase components, the resulting output can be expressed as =

+

Common-Mode Rejection Ratio: CMRR =

, CMRR(log) = 20 log10

Negative feedback creates a condition of equilibrium (balance). Positive feedback creates a condition of hysteresis (the tendency to "latch" in one of two extreme states).

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Analog Circuits

6.5: Feedback and Oscillator Circuits Feedback Amplifiers Signal or Ratio

A β

Parameter

Type of Feedback Voltage Series

Current Series

Current Shunt

Voltage Shunt

Voltage Voltage

Current Voltage

Current Current

Voltage Current

⁄

⁄

⁄

⁄

Type of Feedback (Effect of –ve Feedback) Voltage Series Current Series Current Shunt

Voltage Shunt

Decreases

Increases

Increases

Decreases

Increases

Increases

Decreases

Decreases

Voltage amplifier

Transconductance amplifier

Current amplifier

Transresistance amplifier

Bandwidth

Increases

Increases

Increases

Increases

Nonlinear distortion

Decreases

Decreases

Decreases

Decreases

Improve characteristics of. Desensitizes

Parameter

Current Shunt

Voltage Shunt

Current Series

1.Output signal

Voltage Series Voltage

Current

Voltage

Current

2.Input signal

Voltage

Current

Current

Voltage

3.Basic amplifier

Voltage

Current

Trans resistance Transconductance

4.A(with out feedback) AV=V0/Vi

AI =I0/Ii

Rm=V0/Ii

Gm=I0/VI

5.

Vf/V0

If / I0

If / V 0

Vf/I0

6.D=1+A

1+AV

1+AI

1+Rm

1+Gm

7.Af

AV/D

AI/D

Rm/D

Gm/D

8.Rif

RiD

Ri/D

Ri/D

RiD

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Analog Circuits

9.Rof

RO/D

RO.D

RO/D

ROD

10.f1f

f1/D

f1/D

f1/D

f1/D

11.f2f

f2.D

f2.D

f2.D

f2.D

13.df(distortion)

=d/D

=d/D

=d/D

=d/D

14.Noise

Decreases Decreases

Decreases

Decreases

12.BWf

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Analog Circuits

6.6: Power Amplifiers

Parameter

Amplifier Type Current Trans Conductance 0

Voltage

Trans resistance

0

0 0

Transfer characteristic Class A: The output signal varies for a full 3600 of the cycle this requires the Q- point to be biased at a level so that at least half the signal swing of the output may vary up and swing down without going to a high enough voltage to be approach the lower supply level. Class B: A class B circuit provides an output signal varying over one-half the output signal cycle, or for 1800. Here the dc bias is at cut off (zero current) so, the output is not a faithful reproduction of the input as only half cycle is present. Two class B operations, one to provide output on the positive-output half cycle and another output to provide operation on the negative-output half cycle are necessary. This type of connection is referred to as push-pull operation. Class AB: An amplifier may be biased at a dc level above the zero base current level of class B and above one – half the supply voltage level of class. This bias condition is class AB. For class AB operation the output signal swing occurs between 1800 and 3600 and is neither class A nor class B operation. Class C: The output of a class C amplifier is biased for operation at less than 180 0 of the cycle and will operate only with a tuned (resonant) circuit which provides a full cycle of operation for the tuned or resonant frequency Class D: This operating class is a form of amplifier operation using pulse signals which are on for a short interval and off for a longer interval. The major advantage of class D operation is that amplifier is on only for short intervals and the overall efficiency can practically be very high. Amplifier Efficiency: defined as the ratio of o/p power to i/p power , improves (gets higher) going from class A to class D. P ( P( P

(

)

=

Where

) )

x

(rms) (rms) = (rms) =

(rms)

=

(rms)/

(peak)/√

Peak – to Peak Signals : The ac power delivered to the load may be expressed using P

(

)

(

)

(

)

(

)

(

)

The maximum efficiency of a class A circuit, occurring for the largest output voltage and current swings, is only 25% with a direct or series fed load connection and 50% with a transformer connection to the load. Class B operation, with no dc bias power for no input signal, reaches 78.5%. Class D operation can achieve power efficiency over 90% and provide the most efficient operation of all the operating classes. Since class AB falls between class A and class B in bias, it also falls between their efficiency rating between 25% (or 50%) and 78.5% THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 162

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Analog Circuits

Amplifier Distortion %THD = D = √

. . . . . . . . 100%

The total power can also be expressed in terms of THD, i.e., P = (1

. . . . . . .)

= (1 +

) P1

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6.7: BJT and JFET Frequency Response

At low frequencies we shall find that the coupling and bypass capacitors can no longer be replaced by the short circuit approximation because of the increase in reactance of these elements. The frequency – dependent parameters of the small signal equivalent circuits and the stray capacitive elements associated with the active device and the network will limit the high – frequency response of the system. Miller Effect Capacitance

A V= /

_

Miller Input Capacitance c

(1-

)

Miller output Capacitance =(

)

Multistage Frequenct Effects, For n stages Lower cut-off frequency is Upper cut-off frequency is

=√ √(

)

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Phase Shift Oscillator

Transistor Hartley oscillator

C

D

C

C +

+ G

S

R

(

R

R

-

-

f

Analog Circuits

√ ) L

f =

L

√

Wien Bridge oscillator =

where: i =

Ring oscillator

f= 1/(no. of inverters*inverter del)

√ (

i ’ Oscillator )

Low Pass Filters

(

)

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Analog Circuits

High Pass Filters

(

)

Band Pass Filters

(

)

(

)

>

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Analog Circuits

Sinusoidal Oscillators ∑

Amplifier A

Frequency selective network 𝛃

Fig. Basic structure of sinusoidal oscillator

  

( ) ( ) ( )

( )

Gain with feedback

An Oscillator should have finite output for zero input signal at a particular frequency. So condition for feedback loop to provide sinusoidal oscillations of frequency is ( ) ( ) L(j ) Here, L is Loop gain = β So at , the phase of the loop gain should be zero and magnitude of loop gain should be unity. This is shown as Bakhausen Criterion

OP Amp RC Oscillators Circuits I.

Wien Bride Oscillator

C

C

R

β



L



Magnitude of loop gain should be



Ph e f

g i

β

R

*

g i

+

h

*

d e ze

+ i y⟹ ⟹

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Analog Circuits

II. Phase Shift Oscillator

C

C

C k

R

  

R

R

It consist of three section (3rd order) RC ladder network in feedback. Amplifier is of –ve gain ( k) For phase shift of loop gain to be 0° (or 3600), RC network should have phase shift of 180° as A have 180° phase shift. Minimum three section of RC network (3rd order) is required to get 180° shift at a finite frequency.



LC Tuned Oscillators

R

R

L

L

C

L

(a) Colpitts 

For Colpitts oscillator, Oscillation frequency g



(b) Hartley

⁄

√ (

)

for oscillation to start

For Hartley oscillator. L )

√(L g

>

L L

f

ci

i

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Analog Circuits

Crystal Oscillator

L

r

 Series capacitance  Parallel capacitance 

Series resonant frequency √



Parallel resonant frequency √ (

)

Bistable Multivibrators  

Has two stable states. Circuit can remain in either state and it moves to other stable state only when appropriately triggered.

(A) Inverting

(

)

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Analog Circuits

βL

0



Transfer Characteristics From transfer characteristics, we see that for input voltage in either be L or L depending on state the circuit is already in.

, o/p can

(B) Non – Inverting

L ( ) L ( )

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Part -7: Electronics Device & Circuits 7. 1: Semiconductor Theory Atomic Structute 

The emitted radiation by its wavelength λ in Angstroms , when electron transition from one state to the other state is ,

A

And this energy is emitted in the form of a photon of light.

Insulators, Semiconductors and Metals 

A very poor conductor of electricity is called an insulator; an excellent conductor is a metal; and a substance whose conductivity lies between these extremes is semiconductor.

Insulator: For a diamond (Carbon) crystal the region containing no quantum states is several electron volts high ( ≈6eV). The energy gap is so large that electrons cannot be easily excited from the valence band to the conduction band by any external stimuli (Electrical, thermal or optical). Metal: This refers to a situation where the conduction and valence bands are overlapping. This is the case of a metal where = 0. This situation makes a large number of electrons available for electrical conduction and, therefore the resistance of such materials is low or the conductivity is high. Semiconductor: A substance for which the width of the forbidden energy region is relatively small (~1eV) is called a semiconductor. 

The energy gap EG for silicon decreases with temperature at the rate of 3.60 × 10-4 eV / K. Hence, for silicon, T T and at room temperature (300 K), EG = 1.1 eV.



Similarly for germanium, 0.72 eV

T

–

T and at room temperature, EG =

Current Density: If N electrons are contained in a length L of conductor (fig) and if it takes an electron a time T sec to travel a distance of L meter in the conductor, the total number of electrons passing through any cross section of wire in unit time is N/T. N electrons A L Thus the total charge per second passing any point, which by definition is the current in amperes, is I = Nq / T………… 1) Where q = 1.602 x 10-19 C THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 171

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By definition, the current density, denoted by the symbol J, is the current per unit area of the conducting medium, i.e., assuming a uniform current distribution J = I /A……… 2) J

n qv

ρV

Where ρ

nq is the charge density, in coulombs per cubic meter, and v is in meters per second.

Mobility and Conductivity 

The drift velocity v is in the direction opposite to that of the electric field, and its magnitude is proportional to 𝛆. Thus v electric field where



m2 / V - s) is called the mobility of the electrons.

If the concentration of free electrons is n (electrons per cubic meter), the current density J (amperes per square meter) is J nqv nq -19 where q = electron charge = 1.602 x 10 C and V nq is the conductivity of the substance in (ohm meter)-1



The parameter µ varies as T-m over a temperature range of 100 to 400 K. For silicon, m = 2.5 (2.7) for electrons (holes), and for germanium, m = 1.66 (2.33) for electrons (holes).

Electrons and Holes in an Intrinsic Semiconductor 

Germanium (Ge) and Silicon (Si) are the two most important semiconductors used in electronic devices.



The energy EG required to break such a covalent bond is about 0.72 eV for germanium and 1.1 eV for silicon at room temperature.

Conductivity of a Semiconductor 

The current density J is given by J n n p p q

n = magnitude of free electron (negative) concentration, p = magnitude of hole (positive) concentration, conductivity, electric field and q electron charge Hence n n

p p q

The resistivity ρ is inversely proportional to the conductivity and is given by ρ 

n n

p p

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

With increasing temperature, the density of hole – electron pair increases and correspondingly, the conductivity increases. n A T e



The intrinsic concentration ni varies with temperature in accordance with the above relationship. Where A0 = material constant. T = temperature in degree Kelvin, EGO = energy gap at 0 K in eV, K = Boltzmann constant in eV/ K

Carrier Concentration in an Intrinsic Semiconductor: 

The probability of occupation f(E) of an energy level E by electron is given by f

exp

KT



The Fermi level can be defined as that level which has a 50% probability of occupation by an electron at any temperature.



As temperature increases conduction increase in intrinsic semiconductor. KT eV meV



The electron concentration n is proportional to f(E). n∝e n

ce

(

)

Nc = Conduction constant = 4.82 × 1015 (mn/m) 3/2. T3/2 per cm3 

Similarly hole concentration is ve The above equations (for n and p) apply to both intrinsic and extrinsic or impure semiconductors.

For Intrinsic Semiconductor: Fermi level in intrinsic semiconductor is called Intrinsic Fermi level

So n p

e e

(

)

n n

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Also for intrinsic semiconductor, n

p

So n

n n p

n

e

Also n

p KT ln (

)

KT ln ( ) KT ln ( Here m 

)

is effective mass of hole m

is effective mass of electron

When an electron in a periodic potential is accelerated ‘relative’ to the lattice in an electric field or magnetic field then the mass of that electron is called “effective mass” ni = 2.5 × 1013 carries/ cm3 → Ge (at room temperature) ni = 1.5 × 1010 carries/ cm3 → Si (at room temperature)



Where ni is no. of carriers (or) no. of covalent bonds that are broken for the given temperature.

Fermi Potential N – type Semiconductor KT n KT ln ( ) ln ( ) q n q n Where

q

P – type semiconductor KT p KT ln ( ) ln ( ) q n q n Where

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The Fermi Level in an Intrinsic Semiconductor 

Hence the Fermi level lies in the center of the forbidden energy band.

The Intrinsic Concentration 

For intrinsic material n = p = ni, we have the important relationship (called the mass – action law) np n



Note that, regardless of the individual magnitudes of n and p, the product is always constant at a fixed temperature.

Charge Densities in a Semiconductor np = gives the relationship between the electron n and the hole p concentrations. 

Since the semiconductor is electrically neutral, the magnitude of the positive charge density must equal to that of the negative concentration, or ND + p =NA +n



--- (1)

Consider an n – type material having NA = 0. Since the number of electrons is much greater than the number of holes in an n – type semiconductor (n >> p) then equation (1) reduces to n≃

D

or nn ≃

D



In a n- type material the free electron concentration nn is approximately equal to the density of donor atoms.



The concentration pn of holes in the n – type semiconductor is obtained from nn pn = n Thus , pn

n

Similarly, for a p - type semiconductor p n p ≃ n n 

According to the law of mass action, the product of the number of electrons in the conduction band and the number of holes in the valence band must be constant.

For material doped with both acceptor and donor impurity and if then

or

,

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np

n and

n

p

√(

p=

)

√(

And n =

EDC

n )

n

Fermi level in a semiconductor having impurities Variation n- type Doping increases EF goes up Temperature Increases EF goes down

P – type EF goes down EF goes up

conduction Increases Decreases

Temperature Effect on Extrinsic Semiconductor 

At very low temperature range the conductivity is an exponential function of temperature. The conductivity increases as the temperature increases upto certain level that depends on doping concentration. Increasing temperature, the density of carriers will increases in decreasing mean free path of the conduction electrons or holes. So, the conduction decreases with increasing temperature. At extraordinary high temperatures extrinsic will behave as intrinsic semiconductor.

Drift and diffusion Currents 

The diffusion current density for electrons is Jn = q Dn



Dn = Diffusion constant of the electrons in m2/sec.



Similarly, diffusion current density for holes is Jp =- q Dp



The hole current in any point x may be written as the sum of two contributions, one from the field and one from the diffusion process: Jp



p

p q𝛆

–q

dp

Similarly, the total electron current density Jn = n



Dp = diffusion constant of the holes in m2/sec.

n q𝛆

+q

dn

The diffusion constant is proportional to the mobility =

=VT

Where VT = kT/q = T/11,600 where = volt equivalent of Temperature

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The continuity equation 

The diffusion length for holes is given by Lp =√



Similarly for electrons Ln =√

.

The Hall Effect 

If a specimen (metal or semiconductor) carrying a current I is placed in a transverse magnetic field B. an electric field 𝛆 is induced in the direction perpendicular to both I and B. This phenomenon, known as the “Hall ffect”



The Hall voltage V

d

vd

Jd

ρ

I

ρW

Where d = distance between two surfaces; w= width of the specimen; J = current density; v= drift velocity; ρ = charge density. nq or pq q= charge of electron 

The Hall coefficient RH is defined by ρ

   

q

ρ

VHw

I

Aq

If conduction is due to primary charges of one sign, the conductivity is related to the mobility by ρ If the conductivity is measured together with the Hall coefficient RH, the mobility can be determined from H The Hall coefficient RH of an intrinsic semiconductor is negative under all conditions. In an extrinsic semiconductor, the Hall coefficient RH increases with increase of temperature.

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7.2: P - N Junction Theory and Characteristics Potential Variation within a Graded Semiconductor 

In a graded (non – uniform) semiconductor, doping is non – uniform.

, 1

, 2 x

0 x  distance v  built in potential p  hole concentration n  electron concentration  v

v ln



V ln

e

 n

n e

 n p

n p

Step – Graded Junction Semiconductor p type

n type

v x

x

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The type of doping where doping density changes abruptly from p-type to n-type is called Step grading. v

v

v

v

V ln

V ln

V ln

The P-N Junction as a Diode  Diode permits the easy flow of current in one direction but restrains the flow in the opposite direction. Forward Bias (i) More majority carriers will be allowed to flow across the junction. (ii) The junction width decreases. The current flow is principally due to majority charge carriers and is large (mA). Reverse Bias  The junction width will increase.  Reverse bias current will be due to the minority carriers only Band Structure of an Open Circuited P-N Junction This energy E0 represents the potential energy of the electrons at junction. p - region

n- region

Space charge region

Conduction band ECP ½ EG

E0

Conduction band ECN

EF

E1 E0

½ EG

E2

EF ½ EG

EVP Valence band

½ EG

Eo EVN Valence band

Fig: Band diagram for a p-n junction under open-circuit conditions. THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 179

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E0 = kT ln

=

kT ln

EDC

= kT ln

Forward Currents I = I0(eV/𝛈VT -1) ≃2 for silicon,

………… ≃ for germanium

 I0 depends on material and it is fixed for a given device. But varies with temperature |

I02 = I01x

|

 Where I01(I02) is the reverse saturation current at a temperature T1(T2).  I0 doubles for every 10oC rise in temperature. Volt-Ampere Characteristic (a) When the voltage V is positive and several times VT, the unity in the paranthesis of equation (1) may be neglected. i.e., 𝛈 ∴ I=I0

𝛈

,

Accordingly except for a small range in the neighborhood of the origin, the current increases exponentially with voltage. (b) When the diode is reverse-biased and |V| is several times VT,I≈-I0. The “reverse current” is therefore constant, independent of the applied reverse bias. Consequently, I0 is referred to as the “reverse saturation current” Transition or Space Charge (or Depletion Region) Capacitance (Ct) The parallel layers of oppositely charged immobile ions on the two sides of the junction form the transition capacitance, CT, which is given by CT A W, where 0 r) is the permittivity of the material, A is the cross-sectional area of the junction and W is the width of the depletion layer over which the ions are uncovered. The net charge must be zero across the depletion region will satisfy the condition NAWP=NDWn Where NA=acceptor concentration; ND=donor concentration; Wp=width of the depletion region in p-side; Wn=width of the depletion region in n-side; if NAWn.

𝛆

The total depletion width, W is given by W=[

𝛆

*

+]

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Where, VB= (V0-V), V is the applied voltage and V0 is the barrier potential, or the contact potential.  When forward bias +V is applied, the effective barrier potential, VB= [V0-(+V)], is lowered and hence the width of the depletion region W decreases and CT increases. Under reverse bias condition, the majority carriers move away from the junction, thereby uncovering more immobile charges. Now the effective barrier potential, VB= [V0-(-V)], is increased and hence, W increase with reverse voltage and CT decreases correspondingly. Diffusion (or Storage) Capacitance (Cd) The capacitance that exists in a forward biased junction is called a diffusion or storage capacitance (CD), whose value is usually much larger than CT, which exists in a reverse-biased junction. This is also represented as, CD I VT), where is the mean life time for holes and electrons. Diode Applications The same PN junction with different doping concentration finds special applications as follows: (i) (ii) (iii) (iv) (v) (vi)

Detectors (apd, pin photo diode) in optical communication circuits Zener diodes in voltage regulators Varactor diodes in tuning sections of radio and tv receivers Light emitting diodes in digital displays Laser diodes in optical communications Tunnel diodes as a relaxation oscillator at microwave frequencies.

Breakdown Diodes The upper limit on diode current is determined by the power dissipation rating of the diode. The thermally generated electrons and holes acquire sufficient energy from the applied potential to produce new carriers by removing valence electrons from their bonds. These new carriers, in turn, produce additional carriers again through the process of disrupting bonds. This cumulative process is referred to as "avalanche multiplication". It results in the flow of large reverse currents, and the diode finds itself in the region of "avalanche breakdown". This avalanche effect is now known to play with breakdown voltages below or about 6V. Even if the initially available carriers do not acquire sufficient energy to disrupt bonds, it is possible to initiate breakdown through a direct rupture of the bonds because of the existing of the strong electric field. Under these circumstances the break down is referred to as the "zener breakdown". This zener effect is now known to play with breakdown voltages below or about 6V. Tunnel Diode Tunneling phenomenon: The width of the junction barrier varies inversely as the square root of impurity concentration (1 in ) and therefore is reduced from 5 microns to less than 100A°( cm).

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The barrier is very thin to allow the carriers to tunnel through it. The tunnel diode exhibits a negative resistance characteristic between the peak current Ip and the minimum value Iv, called the valley current. The tunnel diode useful in pulse and digital circuitry.

Forward current

I IP

Symbol for tunnel diode

RS

LS

IV VP Reverse current

Reverse voltage

VF Vv Forward voltage

Rn

V

Fig. The volt-ampere characteristics of tunnel diode

Fig. Small signal model of tunnel diode in the negative resistance region

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7.3: Transistor Theory (BJT, FET) Transistor Circuit configurations Basically, there are three types of circuit connections (called configurations) for operating a transistor. 1. Common-base (CB),

2. Common-emitter (CE),

3. Common-collector (CC).

CB Configuration In this configuration, emitter current IE is the input current and collector IC is the output current. The input signal is applied between the emitter and base whereas output is taken out from the collector and base as shown in below figure. The ratio of the collector current to the emitter current is called dc alpha αbc or just α of a transistor αbc α IC/IE It is also called forward current transfer ratio (hFB). In hFB, subscript F stands for forward and B for common-base. C

E

C

⁄

⁄

B

E

B ⁄

⁄

⁄ ⁄

C

E

B

(a)

(b)

(c)

The α of a transistor is a measure of the quality of a transistor higher the value of α, better the transistor in the sense that collector current more closely equals the emitter current. Its value ranges from 0.95 to 0.999. Obviously, it applies only to CB configuration of a transistor. IC α IE Now, IB= =IE – αIE=(1-α IE I

I

I

Incidentally, there is also an a c α for a transistor It refers to the ratio of change in collector current to the change in emitter current. αac ∆IC ∆IE It is also, known as short-circuit gain of a transistor and is written as hfb. It may be noted that uppercase subscript ‘ ’ indicates dc value whereas lowercase subscript ‘fb’ indicates ac value or all practical purposes, αdc αac α

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CE Configuration Here, input signal is applied between the base and emitter and output signal is taken out from the collector and emitter circuit. As seen from above figure. (b)IB is the input current and IC is the output current. The ratio of the d.c. collector current to d c base current is called dc beta βdc or just β of the transistor. ∴ β IC/IB or IC β IB It is also called common-emitter d.c. forward transfer ratio and is written as hFE. It is possible for β to have as high a value as While analyzing ac operation of a transistor, we use a c β which is given by βac ∆IC ∆IB. It is also written as hfe. elation etween α and β β IC/IB and α IC/IE

∴ β α IE/IB

α β

∴β α

β

(1-α

-α

β

CC Configuration In this case, input signal is applied between base and collector and output signal is taken out from emitter-collector circuit. Conventionally speaking, here IB is the input current and IE is the output current as shown in above figure (c). The current gain of the circuit is I I

I I

I I

β α

β β

β

β

Relationship Between Transistor Currents While deriving various equations, following definitions should be kept in mind. α

IC/IE),

β

(IC/IB),

(i)

IC =βIB αIE=

(ii)

IB=IC/β=

(iii) IE=IC/ α=

α

and β

IE α IE βI

β I

(iv) The three transistor d.c. currents always bear the following relation IE : IB : IC : : 1: (1-α : α Incidentally, it may be noted that for ac currents, small letters ie, ib and ic are used. CB Configuration The leakage current ICBO where the subscripts C O stand for ‘Collector to ase with emitter Open ’ Very often, it is simply written as ICO. It should be noted that (i) ICBO is exactly like the reverse saturation current IS or I0 of a reverse-biased diode. (ii) ICBO is extremely temperature-dependent because it is made up of thermally-generated minority carriers. THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 184

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ICBO doubles for every 10oC rise in temperature for Ge and 6oC for Si. Total collector current is actually the sum of two components: (i) Current produced by normal transistor action i.e. component controlled by emitter current. Its value is ∝ I and is due to majority carriers. (ii) temperature-dependent leakage current ICO due to minority carriers. ∴ IC α IE + ICO Since ICO 0. Reach-through The second mechanism by which a transistor’s usefulness may be terminated as the collector voltage is increased is called punch-through, or reach-through, and results from the increased width of the collector-junction transition region with increased collector-junction voltage (the Early effect).

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As the voltage applied across the collector junction increases, the transition region penetrates deeper into the collector and base. Because neutrality of charge must be maintained, the number of uncovered charges on each side remains equal. Since the doping in the base is ordinarily substantially smaller than that of the collector, the penetration of the transition region into the base is much larger than into the collector. This process is known as Early Effect, or Base-width Modulation. Field Effect Transistors The acronym 'FET' stands for field effect transistor. It is a three-terminal unipolar solid-state device in which current is controlled by an electric field as is done in vacuum tubes. Broadly speaking, there are two types of FETs a. Junction field effect transistor (JFET) b. metal-oxide semiconductor FET (MOSFET) It is also called insulated-gate FET (IGFET). It may be further subdivided into (i) depletion-enhancement MOSFET i.e. DE-MOSFET (ii) enhancement-only MOSFET i.e. E-only MOSFET Both of these can be either P-channel or N-channel devices. The FET family tree is shown below FET

Metal-Oxide Semiconductor FET (MOSFET/IGFET)

Junction FET (JFET)

DE-MOSFET

N-Channel D

G

S

P-Channel D

+VD D G

N-Channel D

-VDD G

S

N-Channel

P-Channel D

+VD D

S

E-only MOSFET

G

S

-VDD G

D

P-Channel +VD D

S

D -VDD G

S

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Junction FET (JFET) (a) Basic Construction Depletion region

IG p+ type gate

Drain

D

IS S

w

2b(x)

2a Source

VGG

G

n-type channel

W(x)

x

Gate

p+ type gate

ID

+ VDD

Fig. shows, the basic structure of a n-channel field-effect transistor. The normal polarities of the drain-to-source and gate-to-source supply voltages are shown. In a p-channel FET the voltages would be reversed. 1. Source: It is the terminal through which majority carriers enter the bar. Since carriers come from it, it is called the source. 2. Drain: It is the terminal through which majority carriers leave the bar i.e. they are drained out from this terminal. The drain-to-source voltage VDS drives the drain current ID. 3. Gate: These are two internally-connected heavily-doped impurity regions which form two P-N junctions. The gate-source voltage VGS reverse-biases the gates. 4. Channel: It is the space between two gates through which majority carriers pass from source-to- drain when VDS is applied. Schematic symbols for N-channel and P-channel JFET are shown in the above Figures. It must be kept in mind that gate arrow always points to N-type material (channel). (b) Theory of Operation While discussing the theory of operation of a JFET, it should be kept in mind that 1. Gates are always reversed-biased. Hence, gate current IG is practically zero. 2. The sourced terminal is always connected to that end of the drain supply which provides the necessary charge carriers. In a N-channel JFET, source terminal S is connected to the negative end of the drain voltage supply (for obtaining electrons).In a P-channel JFET, S is connected to the positive end of the drain voltage supply for getting holes which flow through the channel.

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Drain +

ID

VGG

-

Gate G + IG

+

VGS -

+ VDD -

VDS IS -

S

Figure shows Circuit symbol for a n-channel FET. (For a p-channel FET the arrow at the gate junction points in the opposite direction.) For a n-channel FET, ID and VDS are positive and VGS is negative. For a p-channel FET, ID and VDS are negative and VGS is positive. (i) Keeping VGS at a fixed value (either zero or negative), as VDS is increased, ID initially increases till channel pinch-off when it becomes almost constant and finally increases excessively when JFET breaks down under high value of VDS . As VGS is kept fixed at progressively higher negative values, the values of VP as well as breakdown voltage decrease. (ii) Keeping VDS at a fixed value, as VGS is made more and more negative, ID decreases till it is reduced to zero for a certain value of VGS called VGS(off). Since gate voltage controls the drain current, JFET is called a voltage-controlled device. A P-channel JFET operates exactly in the same manner as an N-channel JFET except that current carriers are holes and polarities of both VDD and VGS are reversed. Since only one type of majority carrier (either electrons or holes) is used in JFETs, they are called unipolar devices unlike bipolar junction transistors (BJTs) which use both electrons and holes as carriers. Static Characteristics of a JFET We will consider the following two characteristics: (i) Drain characteristics It gives relation between ID and VDS for different values of VGS (which is called running variable). (ii) Transfer characteristics It gives relation between ID and VGS for different values of VDS. JFET Drain Characteristics with VGS = 0 Ohmic region

IDSS

Pinch off (Saturation) region B

C

VGS=0

Breakdown region

A

ID

0

VP

VDS

VA

VDS

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Such a characteristic is shown in Fig. It can be sub-divided into following four regions: 1. Ohmic Region OA This part of the characteristic is linear indicating that for low-values of VDS, current varies directly with voltage following Ohm's Law. It means that JFET behaves like an ordinary resistor till point A (called knee) is reached. 2. Curve AB In this region, ID increases at reverse square-law rate upto point B which is called pinch-off point. The drain-to-source voltage VDS corresponding to point B is called pinch-off-voltage Vp. But it is essential to remember that pinch-off does not mean current-off. 3. Pinch – off Region BC It is also known as saturation region or amplified region. Here, JFET operates as constant – current device because ID is relatively independent of VDS.It is due to the fact that as VDS increases, channel resistance also increases proportionally thereby keeping ID practically constant at IDSS. Drain current in this region is given by Shockley’s equation ID = IDSS *

+ = IDSS *

+

It is the normal operating region of the JFET when used as an amplifier. 4. Breakdown Region If VDS is increased beyond its value corresponding to point C (called avalanche breakdown voltage), JFET enters the breakdown region where ID increases to an excessive value. This happens because the reverse-biased gate-channel P-N junction undergoes avalanche break down when small change in VDS produce very large changes in ID. Transfer Characteristic It is a plot of ID versus VGS for a constant value of VDS and as shown in fig. It is similar to the transconductance characteristics of vacuum tube or a transistor. It is seen that when VGS = 0, ID = IDSS and when ID = 0, VGS = VP The transfer characteristics approximately follows the equation IDSS VDS Constant

- 4V

ID

-2V

0

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ID = IDSS *

+ = IDSS [

EDC

]

The above equation can be written as VGS =

=[

√

]

(i) Transconductance, gm It is simply the slope of transfer characteristics. change in I ∆I r at V constant or rd at V constant change in V ∆V Its unit is Siemens (S) earlier called mho. It is also called forward transconductance (gfs) or forward transadmittance yfs. The transconductance measured at IDSS is written as gmo. Mathematical Expression for gm The Shockely equation is ID = I g =

[

[

]

]

When VGS = 0, gm=gm0 ∴ gmo = From the above equations, we have gm=gmo [ (ii) Amplification actor , It is given by µ =

at ID constant or

]=gmo

∆ ∆

at ID = constant

It can be proved from above that gm×rd (iii)DC Drain Resistance, RDS It is also called the static or ohmic resistance of the channel. It is given by Depletion-enhancement MOSFET or DE-MOSFET (i) Depletion Mode of N-channel DE-MOSFET When VGS = 0, electrons can flow freely from source to drain through the conducting channel which exists between them. When gate is given negative voltage, it depletes the N-channel of its electrons by including positive charge in it. Greater the negative voltage on the gate, greater is the reduction in the number of electrons in the channel and, consequently, lesser its conductivity. In fact, too much negative gate voltage called V V can-off the channel. For obvious reasons, negative-gate operation of a DE-MOSFET is called its depletion mode operation. THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 190

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(ii) Enhancement Mode of N-channel DE-MOSFET The circuit connections are shown in above Figure. Again drain current flows from source to drain even with zero gate bias. When positive voltage is applied to the gate, the input gate capacitor is able to create free electrons in the channel, which increases Id. As positive gate voltage is increased, the number of induced electrons is increased, so conductivity of the source-to-drain channel is increased and, consequently, increasing amount of current flows between the terminals. That is why, positive gate operation of a DEMOSFET is known as its enhancement mode operation. Since gate current in both modes is negligibly small, input resistance of a MOSFET is incredibly high varying from 1010Ω to 1014Ω In fact, MOS T input current is the leakage current of the capacitor unlike the input current for JFET which is the leakage current of a reverse-biased P-N junction ID, mA

Enhancement

Depletion ID(on)

2 1 0 -1 -2 -3

6

6 5 4 3 2 1

4 2

-3 -2 -1 0 VGS(OFF)

VGS = +3V

ID, mA

1

2

3

(a)

VGS, V

0

5

1 0 (b)

1 5

Enhancement

Depletion

VDS, V

Fig. (a) The transfer curve (for VDS = 10 V) & (b) The drain characteristics for a n-channel MOSFET which may be used in either the enhancement or the depletion mode. MOSFET Current & threshold voltage The MOS transistor is a symmetric device. This means that the drain and source terminals are interchangeable. For a conducting nMOS transistor, VDS > 0V; for the pMOS transistor, VDS < 0V (or VSD > 0V). Basic MOS Device Equations Drain Gate Bulk(or substrate for nMOS device in n – well technology) Source The nMOS device is a four terminal device: Gate, Drain, Source, and Bulk. Bulk (substrate) terminal is normally ignored at schematic level, usually tied to ground for the nMOS case. In analog applications, however, the bulk terminal may not be ignored.

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Gate controls channel formation for conduction between Drain and Source. Drain is at higher potential than source. Source usually tied to GND to act as pull - down (nMOS). Three regions of operations – first – order (ideal) equations: Cutoff region ID = 0A VGS

VTn (nMOS threshold voltage)

Linear region ID β ,

- 0 < VDS < VGS - VTn

Note: ID is linear with respect to

only when

is small.

Saturation region ID =

V

Where β

V

0 < VGS -VTn< VDS

2

Co ×

MOSFET Threshold Voltage VT = VT-MOS +VFB

(VT-MOS is positive for nMOS, negative for pMOS)

VT-MOS ideal threshold voltage for a MOS capacitor the capacitor formed between the gate and substrate) VFB – Flatband Voltage VT-MOS = 2b + b =

In *

ote: “Qb” sometimes referred to as “Qbo”

+ ⟸ bulk Fermi potential

Cox = oxide capacitance, inversely proportional to oxide thickness [Cox = Qb = √ q this case

]

⇐ bulk charge term (total charge stored in depletion layer), p-substrate in

Bulk potential – potential difference between Fermi level in intrinsic semiconductor and Fermi level in doped semiconductor

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7.4: Basics of OPTO Electronics Fundamentals Of Light The energy contained in a photon depends on the frequency of the light and is given by the -34 joule-second). In this equation , energy relation E= hf where h is lank’s constant E is in joules and frequency f is in hertz (Hz). The wavelength of light determines its colour in the visible range and whether it is ultraviolet or infrared outside the visible range. Now, E = hf = hc λ or λ

hc

meters

For example, the wavelength of light emitted by silicon p-n junction is λ

g

= 1.242/1.1

m

Photodiodes Photodiode is a special type of photo-detector. The general principle of all semiconductor-based photo detectors is the electron-excitation from the valence band to the conduction band by photons. Suppose an optical photon of frequency V is incident on a semiconductor, such that its energy is greater than the band gap of the semiconductor ( i.e., hv >Eg).

Applications 1. 2. 3. 4. 5. 6. 7.

Detection, both visible and invisible Demodulation Switching Logic circuit that require stability and high speed Character recognition Optical communication equipment Encoders etc

PIN Photo detector When a light intensity of wavelength λ is incident on the photo diode , if energy diode then a output current ‘Ip’ in response to the incident light is produced. Quantum efficiency of I diode is given by

Responsivity R = Ip/P0

q

λ

> EG of PIN

o of electron hole pairs generated o of photons incidented

hf A/watt

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Maximum wavelength λmax

m

EDC

λmax(A0) =

f = frequency of incident photon P0 = incident optical power Ip = photocurrent generated in PIN diode Light Emitting Diode (LED) These are forward-biased p-n junctions which emit spontaneous radiation. There are two distinct energy bands in a semiconductor, the conduction (higher energy) and the valence (lower energy) bands. There may also be energy bands due to donor impurities (ED) near the conduction band or acceptor impurities (EA) near the valence band. When electron falls from the higher to lower energy level containing holes, the energy in the form of light radiation is released. Generally, radiations transitions occur (sometimes non-radioactive transition may also occur).The energy of radiation emitted by LED is equal to or less than the band gap of the semiconductor used. The semiconductor used in LED is chosen according to the required wavelength of emitted radiation. Visible LEDs are available for red, green and orange. The visible wavelength is from m to m nergy eV to eV Therefore, the least band gap of the semiconductor for use in the visible region is 1.8ev. Phosphorous doped (GaAs P) and GaP are the preferred materials. Obviously, Si (Eg ~ 1.1eV) or Ge(Eg ~ 0.7eV) are not suitable, since Eg is less than the minimum required Eg of ~ 1.8 eV. GaAs ( with Eg ~1.5 eV) alone or in conjunction with aluminum doped GaAs (AlGaAs) are commonly used for infrared LEDs. The color of the emitted light depends on the type of material used is given below: 1. GaAs infrared radiation invisible 2. Ga red or green light 3. GaAsP – red or yellow (amber) light. LEDs emit no light when reverse-biased. In fact, operating LEDs in reverse direction will quickly destroy them. Laser Diode The word LASER is an acronym and stands for “light amplification by stimulated emission and radiation”, which sums up the operation of an important optical and electronic device. The laser is a source of highly directional, monochromatic, and coherent light. Unique characteristics of Laser Light The beam of laser light produced by the diode has the following unique characteristics 1. It is coherent i.e. there is no path difference between the waves comprising the beam. 2. It is monochromatic i.e. it consists of one wavelength and hence one color only 3. It is collimated i.e. emitted light waves travels parallel to each other. Laser diodes have a threshold level of current above which the laser action occurs but below which the laser diode behave like a LED emitting coherent light incidentally, a filter or lens is necessary to view the laser beam.

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Communication System

Part – 8: Communication Systems 8.1: Basics of Communication Signals

Typical frequency range for audio and video signals are given below: Voice -----------

300 – 3.5KHz

Audio -----------

20Hz – 20KHz

Video -----------

0 – 4.5 MHz

Modulation: Modulation is defined as “the process in which some characteristic parameter of a high frequency carrier is varied linearly with the amplitude of the message signal”. Modulator converts (1) low frequency signal to a high frequency signal, (2) a wide band signal into narrowband signal, (3) a baseband signal into band pass signal

Need for Modulation: (1) To reduce the antenna height. (2) For multiplexing of signals. (3) To reduce noise and interference.

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8.2: Amplitude Modulation (AM) In A.M. the amplitude of the carrier is varied linearly with the amplitude of message signal. S(t) Ac[1+μ] m(t)

0< μ 1

Ac Ac[1-μ] 0

0

-Ac[1-μ] -Ac -Ac[1+μ]

S(t)=

cos(2πf t)+

m(t) cos(2πf t) =

where

=Amplitude Sensitivity

S(f)= [δ(f-f )+δ(f+f ) ] +

[1+

m(t)]cos2πf t,

[M(f-f )+M(f+f )] S(f) ( )

M(f)

/2

K

f -W

USB

LSB

0

-fc-w

-fc

f

-fc+w

W

where

The maximum and minimum value of the positive envelope is

cos 2πf t +

Carrier

fc

fc+w

2w

Single Tone Modulation of A.M S(t)= [1+μ cos (2πf t)]cos (2πf t),

S(t) =

fc-w

cos 2π(f +f ) t +

USB

= μ= modulation index [1+μ] and

[1-μ] respectively.

cos 2π(f -f ) t

LSB

B.W =2f =2×Highest frequency of message signal

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Communication System

Power Calculations of AM Power of carrier

=* + = √

Power of USB Total Power

= =

Power of LSB

=

+

Modulation Efficiency

=

ower in side ands = Total ower

μ 2 μ = μ 2+μ (1 + ) 2

Multi –Tone Modulation: If the message contains ‘n’ frequencies, μ = μ + μ + =

ower in side ands = Total ower

+μ

μ 2 μ = (1 + μ 2) 2 + μ

For an input of Ac[1+Kam(t)]cos2πfct, the output of envelop detector is Ac+AcKam(t). The envelope of the input must be positive to get the exact message signal. An overmodulated signal can’t e demodulated y a square law demodulator and envelope detector.

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8.3: DSBSC and SSB Modulation To increase the modulation efficiency, the carrier is suppressed and only the sidebands are transmitted. S(t)=Acm(t) cos 2πfct [Time domain equation of DSB, carrier is suppressed] S(f)=

[M(f

f ) + M(f + f )] [Frequency domain equation]

M(f)

S(f )

K

-W

0

W

2

f

+fc fc+ W Power required to transmit a DSB wave is very less compared to AM, but the bandwidth is same as AM. 0

-fc

fc-W

Single-Tone Modulation of DSBSC S(t) =

[cos 2π(fc-fm) t + cos 2π(fc+fm)t]

PLSB=PUSB=

Pt=

=1

% Power Saving compare to AM =

100 =

(

)

=

=1

Demodulation of DSB signals Coherent Detection If there is phase difference of coherent detector is, (t) =

()

in oscillator carrier in receiver and transmitter, then o/p of

cos ()

=0

(t) =

= 0

v (t) = 0 (Quadrature Null effect)

Synchronization circuits are necessary are to overcome the Quadrature null effect. So the complexity of the receiver is increased.

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f

Quick Refresher Guide

Communication System

Single Sideband (SSB) Modulation In order to reduce the bandwidth and power required to transmit the signal only one sideband is transmitted (either USB or LSB). S(f)

SSB-USB

USB -fc-w

SSB-LSB

USB

-fc

0

LSB

fc

fc+w

-fc

f

LSB -fc-w

0

S(t) =

cos 2π (f + f )t

(If USB is transmitted)

S(t) =

cos 2π (f

(If LSB is transmitted)

f )t

fc-w

fc

f

The generalized equation is [m(t) cos 2πf t

S(t) =

m ̂ (t) sin 2πf t] -ve sign means USB, +ve sign means LSB

Total ower required to transmit Power saving =

= ( ⁄

=

(

) )

=

( (

) )

Demodulation of SSB Signals: Coherent Detection Consider the locally generated signal as Ac cos(2πf t + ), then o/p of detector is, V2(t) =

[m(t). cos

= 0 , V2(t) = =

0 , V2(t) =

m ̂ (t). sin ] m ̂ (t) m ̂ (t)

[ So no Quadrature null effect in the case of SSB, which is a major advantage over DSB].

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8.4: Vestigial Sideband (VSB) Modulation This is mainly used for the transmission of video signal. Power required to transmit a VSB signal is same as SSB (ideal) but BW is more. B.W = W + fv SSB

VSB

Generation of VSB signal: m(t)

Product Modulator

DSBSC v(t)

BPF H(f)

s(t)

VSB Signal

Ac cos 2πfct

S(f + f ) =

[M(f + 2f ) + M(f)] (f + f )

To get the exact message signal at receiver H(f-fc) + H(f + fc) should be a constant (K).

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8.5: Angle Modulation Angle Modulation is defined as the process in which the angle of the carrier (either frequency or phase) is varied linearly according to the message signal and is called respectively FM and PM. Phase Modulation: Changing the phase according to the message signal is called Phase Modulation. S(t) =

cos[2πf t +

(t) =

m(t)]

m(t) ,

=Phase sensitivity of the modulator (radians/volt) ()

Instantaneous Frequency f =

(t) = 2π ∫ f (t) dt

For single-Tone modulation: (t) = f =

cos 2πf t

=

sin 2πf t f

= Maximum hase Deviation

=

= Maximum Frequency Deviation

Frequency Modulation: Changing the frequency of the carrier according to the message signal is called Frequency Modulation. S(t) = AC cos [2πfc t +2π Instantaneous frequency f (t) = f + hase of FM wave

(t) = 2πf t + 2π

∫m(t)dt ]

m(t) where

=Frequency sensitivity (hertz/Volt)

∫ m(t) dt

For Single-Tone Modulation: f (t) = f +

f=

f

f,

=f +

f,

=f

cos 2πf t

=Frequency deviation

Peak-to-peak frequency variation or total variation of carrier frequency = 2 f S(t) =

[cos(2πf t +

Modulation index of FM =

=

sin 2πf t)]

=

1, Narrow band FM 1, Wide band FM Narrow Band FM: S(t) = =

cos(2πf t + sin 2πf t) [cos 2πf t. cos( sin 2πf t) cos 2πf t cos 2πf t

sin 2πf t . sin( sin 2πf t)]

sin 2πf t sin(2πf t) , for [cos 2π(f

f )t

1

cos 2π(f + f )t]

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Communication System

Ac/2

Ac

fc-fm fm -Ac

4

Spectrum of NBFM

fc+fm

f

4

The spectrum of AM and FM are identical except that the spectral component at f 180o out of phase. = Wideband FM: S(t) =

2) ∑

is

2)

cos[2πf t + sin 2πf t] ( ) = ( )∫e (

Bessel function of order ‘n’ is: Properties: 1)

(1 +

f

( ) = ( 1)

)

d

( )

( )=1

WBFM equation: S(t) =

∑

( ) cos[2π(f + nf )t]

S(t) =

( ) cos 2πf t + ( ) cos 2π(f + f )t + ( ) cos 2π(f + 2f ) t +

S(t) =

( ) cos 2πf t + ( )[cos 2π(f + f )t cos 2π(f f ) t] ( )[cos 2π(f + 2f ) t + cos 2π(f + 2f ) t]

S(f)

( ) cos 2π(f

n = 0, 1, 2, f )+

( ) cos 2π(f + 2f ) t

( ) ( ) ( )

( )

fc-fm 0

fc-2fm

fc

fc+fm

fc+2fm

f

( ) Fig. Spectrum of WBFM Characteristics of a WBFM Signal (1) WBFM spectrum consists of carrier and infinite number of sidebands, each separated by f (2) The amplitudes of the spectral components depend on the Bessel function coefficients ( ) which decease as n increases. So the amplitudes of the spectral components also decrease on both sides of the carrier. (3) In WBFM spectrum amplitude of carrier component depends on ( ) and hence on modulation index . THE GATE ACADEMY PVT.LTD. H.O.: #74, KeshavaKrupa (third Floor), 30th Cross, 10th Main, Jayanagar 4th Block, Bangalore-11 : 080-65700750,  [email protected] © Copyright reserved. Web: www.thegateacademy.com Page 202

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J0( )

8.6

2.4 5.5

( ) = 0, when

The Bessel function coefficient

11.8

= 2.4, . , . , 11. ,

For these values of , the amplitude of the carrier component in the spectrum is zero and the modulation efficiency is 1. ( )

= , order sideband = order sideband = order sideband = Total Power = =

( )

=

,

=

( )

( ) ( ) ( )

( )+

( )+

∑

( )=

( )+

( )+

= Unmodulated carrier power

The total power is independent of modulation index. AM takes more power compared to FM for the same message and carrier. ractical B.W of WBFM using Carson’s Rule: Carson has proved that the number of sidebands having significant amplitudes containing % of the total power is +1. So Bandwidth of FM is, B. W = 2( + 1)f

= 2*

+ 1+ f = 2 f + 2f

Generation of WBFM signal 1) Direct Method 2) Indirect Method (or) Armstrong Method Direct Method: A voltage controlled oscillator is used to generate FM signal. Indirect Method: In this method, NBFM signal is converted into WBFM signal. m(t)

NBFM Modulator

NBFM S1(t)

Frequency multiplier

WBFM S(t)

Ac cos2πfct

BFM S(t) =

cos[2πf t +

sin 2πf t]

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o/p of frequency multiplier, WBFM S(t) = =

Communication System

cos[n2πf t + n

cos[2πf t +

sin 2πf t]

sin 2πf t] where f

= nf

=n

FM can be generated using Phase Modulator by prior integration of m(t) m(t)

PM modulator

∫ INT

Ac cos [2πfc t +2π f ∫ m ( t) dt] FM wave

PM can be generated using FM signal by prior differentiating message signal m(t). m(t)

Differentiator

dm(t) dt

FM Modulator

Ac cos [2πfc t +Kp m ( t) ] PM wave

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8.6: Superhetrodyne Receivers

Image Frequency: fsi=fS+2IF Image section can be suppressed using a tuned circuit. Image frequency should be removed before the mixer stage. Image (Frequency) Rejection Ratio:

IRR =

; Gain at fsi