J STD 003 PDF [PDF]

Zitiervorschau

AMERICAN NATIONAL STANDARD

ANSI/J–STD-003 APRIL 1992

JOINT INDUSTRY STANDARD Solderability Tests for Printed Boards

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EST. 1924

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1st WORKING DRAFT

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Notice

EIA and IPC Standards and Publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in any respect preclude any member or nonmember of EIA or IPC from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than EIA or IPC members, whether the standard is to be used either domestically or internationally. Recommended Standards and Publications are adopted by EIA and IPC without regard to whether their adoption may involve patents on articles, materials, or processes. By such action, EIA and IPC do not assume any liability to any patent owner, nor do they assume any obligation whatever to parties adopting the Recommended Standard or Publication. Users are also wholly responsible for protecting themselves against all claims of liabilities for patent infringement. The material in this joint standard was developed by the EIA Soldering Technology Committee (STC) and the IPC Soldering/Solderability Specifications Task Group (5-23a).

APPROVED JUNE 2, 1992 AS AN

AMERICAN NATIONAL STANDARD AMERICAN NATIONAL STANDARDS INSTITUTE

For Technical Information Contact:

Electronic Industries Association Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501

The Institute for Interconnecting and Packaging Electronic Circuits 2215 Sanders Road Northbrook, IL 60646 Phone (847) 509-9700 Fax (847) 509-9798

Please use the Standard Improvement Form shown at the end of this document.

Copyright © 1996 by the Electronics Industries Association and the Institute for Interconnecting and Packaging Electronic Circuits. All rights reserved. Published 1996. Printed in the United States of America.

No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher.

JOINT

J-STD-003

INDUSTRY STANDARD

Solderability Tests for Printed Boards

A joint standard developed by the Joint Soldering/Solderability Specifications Task Group

Users of this standard are encouraged to participate in the development of future revisions. Contact: EIA Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501

IPC 2215 Sanders Road Northbrook, IL 60062-6135 Phone (847) 509-9700 Fax (847) 509-9798

J-STD-003

April 1992

Acknowledgment Any Standard involving a complex technology draws material from a vast number of sources. While the principle members of the Soldering/

Solerability Specifications Task Group of the IPC Joining Processes Committee are shown below, it is not possible to include all of those who

assisted in the evolution of this Standard. To each of them, the members of the IPC extend their gratitude.

Joining Processes Committee

Soldering/Solderability Specifications Task Group

Technical Liaison of the IPC Board of Directors

Chairman David Schoenthaler AT&T

Chairman John DeVore G.E.

Bonnie Fena Hibbing Printed Circuits

Joint Soldering/Solderability Specifications Task Group

L. Abbagnaro, Pace Inc. F.C. Albers, Unisys Corp. P.J. Amick, Mc Donnell Douglas Elec. Sys Co. J.E. Andrews, Hadco Corp. F. Anglade, Metronelec H.R. Armfield, Litton Data Systems J. Baker, Repco Inc. G. Bates, Sherwood Medical A. Beikmohamadi, E I DuPont De Nemours & Co. J.G. Bernauer, Unisys Corp. D.F. Bernier, Kester Solder Division S.T. Bora, Smiths Industries C. Bradshaw, Memorex Telex Corp. C. Brill, AMP Inc. Dr. J. Brous, Alpha Metals Inc. S.F. Caci, Raytheon Co. L.W. Canarr, Rockwell International T.A. Carroll, Hughes Aircraft Co. A. Cash, Northrop Corp. K.C. Chao, Lockheed Missiles & Space Co. W.A. Clark, AT&T Bell Laboratories D. Cotosky, Kester Solder Division L.A. Crouch, D. Currie, Teledyne Systems Co. G. Cushman, Eptac Corporation G.J. Davy, Westinghouse Electric Corp. J.A. DeVore, General Electric Co. M.D. Dillie, Magnavox R.J. Edgington, National Standard Co. D.A. Elliott, Electrovert Ltd. G.P. Evans, Indium Corp. of America J.W. Evans, NASA HQ H.S. Feldmesser, Johns Hopkins University ii

J.R. Felty, Texas Instruments Inc. R. Fields, E I DuPont De Nemours & Co. A.D. Flaten, AT&T Information Systems J. Gamalski, Siemens AG J. Gechter, Delco Systems Operations P. Gildehaus, Allied Signal Aerospace C. Gonzalez, SCI Manufacturing Inc. B. Gulati, Parker/Gull Electronic Sys Div V. Gundotra, Motorola Inc. W.B. Hampshire, Tin Information Ctr of N Amer S. Herrberg, Magnavox Electronic Systems Co. D.D. Hillman, Rockwell International P.E. Hinton, Hinton ‘‘PWB’’ Engineering R.R. Holmes, AT&T Microelectronics J.B. Hoppke, Alliant Techsystems Inc. L. Hymes, Plexus Corp. R.C. Ihling, Lockheed Missiles & Space Co. B. Inpyn, Pitney Bowes Inc. M.W. Jawitz, Litton Guidance & Control Sys. L.G. Johnson, General Electric Co. S.A. Jones, Wilcox Electric Inc. M. Kasilag, Aerojet Electrosystems Co. C. Kemp, General Electric Co. G.W. Kenealey, Control Data Corp. W.G. Kenyon, E I DuPont De Nemours & Co. K.Kirby, CAE-Link Corp. L.P. Knowles, Librascope Corp. T. Kokocinski, Northrop Corp.

R. Kraszewski, Kester Solder Division V. Kumar, Martin-Marietta Electronics E.J. Kuntz, Alcatel Network Systems Inc. V. Kuo, EMPF M.A. Kwoka, Harris Corp. L.P. Lambert, Digital Equipment Corp. J. P. Langan, Enthone-Omi Inc. R.B. Lomerson, General Dynamics L. Lynch, AT&T Microelectronics S.C. Mackzum, Ericsson GE J.E. Madison, CTS Corp. J.F. Maguire, Boeing Aerospace & Electronics J.R. Maki, Harris Corp. S. Mansilla, Robisan Laboratory Inc. R. Martinez, Magnavox West Coast Operations R.E. Mc Lean, Storage Technology Corp. S. Meeks Jr., Lexmark International/ IBM Corp. J.H. Moffitt, U.S. Navy G.C. Munie, AT&T Bell Laboratories R.D. Nicholas, London Chemical Co Inc. R.L. Nielsen, Fastman Kodak Co Kad R.B. Officer, Lockheed Sanders Inc. R. Parker, Hewlett Packard Laboratories H.E. Parkinson, Digital Equipment Corp. R. Payne, Sundstrand Data Control Inc. R.J. Phillips, Lorain Products P.J. Plonski, Photocircuits Corp. R. Pond, Texas Instruments Inc.

April 1992

P.J. Quinn, General Electric Co. M. Qurashi, U.S. Navy R. Ramos, Trace Laboratories—East J.R. Reed, Texas Instruments Inc. P.M. Rehm, Intel Corp. M. Reithinger, Siemens AG D.E. Robertson, Pace Inc. J.G. Rosser, Hughes Aircraft Co. A.B. Rotman, DCMR Boston (Dept of Defense) Dr. W. Rubin, Multicore Solders D. Rudy, AT&T Bell Laboratories D.W. Rumps, AT&T Technology Systems N. Rusignuolo, Hexacon Electric Co. H.J. Russell, Defense General Supply Center W.R. Russell, Texas Instruments Inc.

J-STD-003

D. Scheiner, Kester Solder Division A. Schneider, Alpha Metals Inc. D. Schoenthaler, AT&T Bell Laboratories J.T. Slanina, Allied Signal Aerospace E. Small, Multicore Solders W.A. Smith, General Dynamics N. Socolowski, Alpha Metals Inc. J.R. Sovinsky, Indium Corp. of America A. Starosta, Eldec Corp. C.J. Sworin, Kester Solder Division G. Theroux, Honeywell Inc. P.A. Thibodeau, Digital Equipment Dr. L.J. Turbini, Georgia Institute/ Technology H. Underwood, U.S. Air Force

D. Varnell, Hercules Inc. D.A. Vaughan, E I DuPont De Nemours & Co. E. Vollmar, Methode Electronics Inc. B. Waller, Texas Instruments Inc. C.E.T. White, Indium Corp. of America R.N. Wild, IBM Corp. D. Wolf, Hadco Corp. M. Wolverton, Texas Instruments Inc. Dr. T. S. Won, Allied Signal Aerospace R. Woodgate, Woodcorp Inc. J.R. Wooldridge, Rockwell International R.O. Young, Rockwell International W. Younger, PC World—Orange County

iii

April 1992

IPC-STD-003

Table of Contents 1.0

SCOPE ...................................................................... 1

1.1 1.2 1.3 1.4 1.5 1.5.1

Scope ...................................................................... Purpose ................................................................... Objective................................................................. Performance Classes .............................................. Method Classification............................................. Tests with Established Accept/Reject Criterion.................................................................. 1.5.2 Test(s) without Established Accept/ Reject Criterion ...................................................... 1.6 Test Method Selection............................................ 1.7 Test Specimen Requirements ................................. 1.8 Coating Durability.................................................. 1.9 Limitation ............................................................... 2.0

2.1 2.1.1 2.2 2.2.1 3.0

3.1 3.2 3.2.1 3.2.2 3.2.3 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.4 3.4.1 3.4.2 3.4.3 3.5 3.5.1 3.5.2 4.0

4.1 4.1.1 4.2 4.2.1 4.2.2 4.2.3 iv

1 1 1 1 1 1 1 1 2 2 2

APPLICABLE DOCUMENTS .................................. 2

Industry................................................................... IPC .......................................................................... Government ............................................................ Federal ....................................................................

3 3 3 3

REQUIREMENTS ..................................................... 3

Terms and Definitions ............................................ Materials ................................................................. Solder...................................................................... Flux......................................................................... Flux Removal Material .......................................... Equipment............................................................... Steam Aging Apparatus.......................................... Solder Pot/Bath ...................................................... Optical Inspection Equipment................................ Dipping Equipment ................................................ Timing Equipment.................................................. Preparation for Testing........................................... Specimen Preparation and Conditioning For Test................................................................... Steam Aging ........................................................... Baking..................................................................... Solder Bath Requirements ..................................... Solder Temperatures............................................... Solder Contamination Control ...............................

3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4

TEST PROCEDURES .............................................. 4

Test Procedure Limitations .................................... Application of Flux ................................................ Tests with Established Accept/Reject Criterion .... Test A—Edge Dip Test .......................................... Test B—Rotary Dip Test ....................................... Test C—Solder Float Test......................................

4 5 5 5 5 8

4.2.4 4.3

Test D—Wave Solder Test................................... 10 Test(s) without Established Accept/ Reject Criterion .................................................... 11 Test E—Wetting Balance Test ............................. 11

4.3.1 5.0

EVALUATION AIDS .............................................. 12

5.1 5.2

Evaluation Aids—Surface .................................... 12 Evaluation Aids—For Class 3 Plated Through-holes....................................................... 12

6.0

NOTES .................................................................... 12

6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11

Test Equipment Sources....................................... Edge Dip Solderability Test Apparatus ............... Rotary Dip Test Apparatus................................... Wetting Balance Test Apparatus .......................... Steam Aging Equipment ...................................... Wetting Times ...................................................... Correction for Buoyancy...................................... Preheat .................................................................. Baking/Testing Time Delay ................................. Prebaking .............................................................. Safety Note........................................................... Use of Non-Activated Flux.................................. Other Fluxes ......................................................... Solder Contact ...................................................... Steam Aging .........................................................

14 14 14 14 14 15 15 15 15 15 16 16 16 16 16

Figures Figure 1

Contact angle ....................................................... 3

Figure 2

Edge dip solderability test .................................... 6

Figure 3a

Suggested test specimen—for plated through-holes........................................................ 7

Figure 3b

Suggested test specimen—for surface mount features................................................................. 8

Figure 4

Rotary dip test ...................................................... 8

Figure 5

Effectiveness of solder wetting of platedthrough holes–Class 3 ......................................... 9

Figure 6

Wetting balance apparatus ................................ 12

Figure 7a

Wetting time acceptance criteria........................ 13

Figure 7b

Wetting force acceptance criteria....................... 13

Figure 8

Wetting balance curve........................................ 14

Figure 9

Aid to evaluation................................................. 15

Tables Table 1

Test Method Selection.......................................... 2

Table 2

Accelerated Aging and Test Requirements .......... 2

Table 3

Maximum Limits of Solder Bath Contaminant ..... 3

Table 4

Steam Temperature Requirements ...................... 4

April 1992

J-STD-003

Solderability Tests for Printed Boards 1.0 SCOPE

This standard prescribes the recommended test methods, defect definitions and illustrations for assessing the solderability of printed board surface conductors, attachment lands, and plated through-holes. This standard is intended for use by both vendor and user.

1.1 Scope

1.2 Purpose The solderability determination is made to

verify that the printed board fabrication processes and subsequent storage have had no adverse effect on the solderability of those portions of the printed wiring board intended to be soldered. This is determined by evaluation of the solderability specimen portion of a board or representative coupon which has been processed as part of the panel of boards and subsequently removed for testing per the method selected. The objective of the solderability test methods described in this standard is to determine the ability of printed board surface conductors, attachment lands, and plated through-holes to wet easily with solder and to withstand the rigors of the printed board assembly processes.

1.3 Objective

1.4 Performance Classes Three general classes have been established to reflect progressive increases in sophistication, functional performance requirements and testing/ inspection frequency. It should be recognized that there may be an overlap of equipment categories in different classes. The user has the responsibility to specify in the contract or purchase order the performance class required for each product and shall indicate any exceptions to specific parameters, where appropriate.

Class 1 General Electronic Products Includes consumer products, some computer and computer peripherals, as well as general military hardware suitable for applications where cosmetic imperfections are not important and the major requirement is function of the completed printed board. Class 2 Dedicated Service Electronic Products Includes communications equipment, sophisticated business machines, instruments and military equipment where high performance and extended life is required and for which uninterrupted service is desired but not critical. Certain cosmetic imperfections are allowed. Class 3 High Reliability Electronic Products Includes the equipment for commercial and military products where continued performance or performance on

demand is critical. Equipment downtime cannot be tolerated and must function when required such as in life support items or missile systems. Printed boards in this class are suitable for applications where high levels of assurance are required and service is essential. 1.5 Method Classification This standard describes test

methods by which both the surface conductors (and attachment lands) and plated through-holes may be evaluated for solderability. Provisions are made for this determination to be performed at the time of manufacture, at the receipt of the boards by the user, or just prior to assembly and soldering. User and vendor shall agree to the appropriate method to be used and their correlation. Standard dwell times are defined in some of the methods called out in this standard. Variations in board heat capacity may necessitate the use of longer solder dwell times (see paragraph 6.2). Any change in solder dwell shall be agreed upon by user and vendor. 1.5.1 Tests with Established Accept/Reject Criterion

Test A — Edge Dip Test (For surface conductors and attachment lands only) Test B — Rotary Dip Test (For plated through-holes, surface conductors and attachment lands, solder source side) Test C — Solder Float Test (For plated through-holes, surface conductors and attachment lands, solder source side) Test D— Wave Solder Test (For plated through-holes, surface conductors and attachment lands, solder source side) 1.5.2 Test(s) without Established Accept/Reject Criterion

Test E — Wetting Balance Test (For surface conductors and attachment lands only) Please forward all test data generated using this test method, including type of board tested (such as Type 2 or 12 layer, Type 3), dimensions of coupon tested, and any pretreatment, to: IPC Wetting Balance Task Group (PWB) 2215 Sanders Road Northbrook, IL 60062-6135 1.6 Test Method Selection For appropriate test selection refer to paragraph 1.5 and Tables 1 & 2. The test selection 1

J-STD-003

April 1992 Table 1 Test Method

Test Method Selection

Applies to Surface Features

Plated Through-holes

X

NA

X (Solder Source Side Only)

X

Tests with Established Accept/Reject Criteria A—Edge Dip Test B—Rotary Dip Test C—Solder Float Test

X (Solder Source Side Only)

X

D—Wave Solder Test

X (Solder Source Side Only)

X

X

NA

Test without Established Accept/Reject Criteria E—Wetting Balance Test

Table 2

Accelerated Aging and Test Requirements Durability of Coating Rating* 1

Pretest Conditioning

Flux

*8 Hours Steam

R, see 3.2.2

No Aging

R, see 3.2.2

No Aging

Prod. Type

Applicable Tests

Surface

2** Holes

3

Surface

Holes

X

X

Surface

Holes

X X

X

X A

B

A

B

A

B

B

C

B

C

B

C

D

D

D

D

D

D

E

E

E

*See Paragraph 1.8 **Default Coating Rating

should consider the final soldering process so that the results of the test will best represent that process. 1.7 Test Specimen Requirements The test specimen shall be a representative coupon, a portion of the printed wiring board being tested, or a whole board if within size limits, such that an immersion depth defined in the individual method is possible. The test specimen shall be representative of the lot being tested. When this test specimen is to be used as a criterion for material acceptance, the number of test specimens shall be defined by agreement between the user and vendor. Test coupons that may be used for rigid board surface solderability and plated through-hole solderability are detailed in the paragraph sections under the individual test methods. Similar coupons may be used provided they reflect the board circuitry, hole, and construction, and have been processed in conjunction with the printed board being evaluated.

Unless otherwise specified, the land associated with a plated through-hole shall be considered part of the plated through-hole if it is used for through-hole attachment. In this case, only tests for hole solderability apply. If the land is used for surface attachment of parts, then such lands shall be tested for both hole and surface solderability. 1.8 Coating Durability The user shall specify to the vendor, as part of the purchase or ordering agreement, the 2

required coating durability. The following are guidelines for determining the needed level of coating durability; not product performance classes. Accelerated aging and solderability testing shall be performed per Table 2. Category 1—Minimum Coating Durability Intended for boards which will be soldered within 30 days from the time of manufacture and are likely to experience minimum thermal exposures. Category 2—Average Coating Durability Intended for boards likely to experience storage up to 6 months from the time of manufacture and moderate thermal or solder exposures. Category 3—Maximum Coating Durability Intended for boards likely to experience long storage (over 6 months) from the time of manufacture, severe thermal or solder processing steps, etc. It should be recognized that there may be a cost premium or delivery delay associated with boards ordered to this durability level. 1.9 Limitation This standard shall not be construed as a

production soldering or tinning procedure for preparing or soldering of printed wiring boards or assemblies. 2.0 APPLICABLE DOCUMENTS

The following documents of the issue currently in effect form a part of this standard to the extent specified herein.

April 1992

J-STD-003 Table 3

2.1 Industry

Maximum Limits of Solder Bath Contaminant

Contaminant1

2.1.1 IPC1 IPC-T-50 Terms and Definitions

Maximum Contaminant Weight Percentage Limit2

Copper

0.300

Gold

0.200

IPC-CS-70 Guidelines for Chemical Handling Safety in

Cadmium

0.005

Printed Board Manufacturing

Zinc

0 .005

IPC-SF-818

General Requirements for Electronic Solder-

ing Fluxes 2.2 Government2 2.2.1 Federal QQ-S-571

Solder, Tin Alloy, Lead Tin Alloy, and Lead

Alloy 3.0 REQUIREMENTS

The definition of terms shall be in accordance with IPC-T-50. Terms that have been repeated from IPC-T-50 for convenience are indicated by an asterisk (*).

3.1 Terms and Definitions

Contact Angle, Soldering* The angle of a solder fillet that is enclosed between a plane that is tangent to the solder/ basis-metal surface and a plane that is tangent to the solder/ air interface (see Figure 1).

Aluminum

0.006

Antimony

0.500

Iron

0.020

Arsenic

0. 030

Bismuth

0.250

Silver

0.100

Nickel

0.010

Notes: 1. The tin content of the solder shall be maintained within ±1% of the nominal alloy being used. Tin content shall be tested at the same frequency as testing for copper/gold contamination. The balance of the bath shall be lead and/or the items listed above. 2. The total of copper, gold, cadmium, zinc, and aluminum contaminants shall not exceed 0.4%.

derability testing only upon agreement between user and vendor on flux selection (see paragraphs 6.8 & 6.9). Caution should be taken in the storage of fluxes used for solderability testing in order to maintain the solids content per paragraph 3.2.2 and to avoid contamination.

3.2.2.1 Flux Storage

3.2.3 Flux Removal Material Material used for cleaning

printed boards prior to solderability evaluations shall be capable of removing visible flux residues.

IPC-003-1

Figure 1

3.3 Equipment The following equipment applies to all methods. Equipment that is specific to any of the five solderability test methods is described in the Section 4 paragraphs detailing the method.

Contact angle

Specimens to be steam aged shall be exposed to the saturated steam in a container constructed from borosilicate glass or stainless steel. The specimen holder shall be non-metallic and non-reactive with moisture to prevent galvanic corrosion or holder degradation. The container may be insulated but it should have a heat loss sufficient to allow continuous boiling of the water. The steam temperature at the aging level shall be maintained per the requirements of Table 4.

3.3.1 Steam Aging Apparatus 3.2 Materials 3.2.1 Solder The solder shall be composition Sn60 or Sn63 of QQ-S-571. Other alloys may be used upon agreement between user and vendor. The composition of the solder, including contamination levels during testing, shall be maintained per Table 3 (see section 3.5.2). 3.2.2 Flux A non-activated rosin flux having a nominal composition of 25% by weight water white gum rosin, type LR3CN per IPC-SF-818, in a solvent of 99% isopropyl alcohol shall be used. The specific gravity shall be 0.843 ±0.005 at 25°C [77°F]. Other fluxes may be used for sol-

A safe means to prevent excessive pressure and a means of maintaining adequate water level shall be provided. Neither shall cause the vapor to cool below the specified temperature. Condensate shall drip freely back to the water. Care

1. Institute for Interconnecting and Packaging Electronic Circuits, 2215 Sanders Road, Northbrook, IL 60062-6135 2. Standardization Documents Order Desk, Building 4D, 700 Robbins Avenue, Philadelphia, PA 19111-5094, (215) 697-2667 or 2179

3

J-STD-003 Table 4

April 1992 Steam Temperature Requirements Average Local BP °C [F]

Steam Temperature Limits °C [F]

0–305 m [0–1000 ft]

100 [212]

93 ±3 [200±5]

305–610 m [1000–2000 ft]

99 [210]

92 ±3 [198 ±5]

610–914 m [2000–3000 ft]

98 [208]

91 ±3 [196 ±5]

914–1219 m [3000–4000 ft]

97 [207]

90 ±3 [194 ±5]

1219–1524 m [4000–5000 ft]

96 [205]

89 ±3 [192 ±5]

1524–1829 m [5000–6000 ft]

95 [203]

88 ±3 [190 ±5]

Altitude

should be taken to minimize contact between the condensate and the specimens. A thermostatically controlled static solder bath shall be used of adequate dimensions to accommodate the specimens and containing enough solder to maintain the temperature during testing within the specified temperature limits (paragraph 3.5.1) and to prevent exceeding the contamination levels (paragraph 3.5.2). The exception to this is test method D which uses a wave solder system.

3.3.2 Solder Pot/Bath

3.3.3 Optical Inspection Equipment Inspection is generally by the unaided eye (corrected vision glasses permitted) but on occasion either a direct or projection lens system with a maximum of 10X magnification may be used. 3.3.4 Dipping Equipment Solder dipping devices shall

be mechanical/electromechanical and capable of controlling the immersion/emersion rates, dwell time and immersion depth as specified in Sections 4.2 to 4.3. Timing equipment shall be automated, where applicable, and accurate to the limits of the test method.

3.3.5 Timing Equipment

3.4 Preparation for Testing 3.4.1 Specimen Preparation and Conditioning For Test The printed boards in the ‘‘as-received’’ condition

shall be prepared for testing in accordance with the user specified conditioning of paragraph 3.4.2. Care shall be exercised to prevent contamination (by grease, perspiration, etc.) of the surface to be tested. When other pretreatment is agreed upon between user and vendor, the pretreatments in paragraph 3.4.1.1 may be used.

The prescribed pretreatments should reproduce actual processing of the printed wiring boards up to the time of assembly soldering. (See paragraph 6.6). If steam aging is performed, prebaking is not recommended. 3.4.2 Steam Aging The aging is intended for tin and tin/

lead coatings only. All specimens identified as requiring steam aging shall be subjected to accelerated aging prior to solderability testing, by exposure of the surfaces to be tested to steam in the equipment specified in paragraph 3.3.1, immediately followed by a bake per paragraph 3.4.3. The specimens shall be suspended so that no portion of the specimen is less than 38.0 mm [1.5 in] above the boiling distilled or deionized water. The specimens shall be exposed to steam per Table 4 for 8 hours ±15 minutes. The non-metallic holders shall support the specimens between vertical to 45° angle during exposure. If water must be added to maintain the level required, add hot water gradually, in small quantities, such that boiling does not cease and temperature remains essentially constant. Care shall be taken to not exceed the capacity of the aging equipment. Excessive or improper loading will cause condensation of vapor on the surface of the specimens. 3.4.3 Baking Immediately after steam aging and prior to

solderability testing, all boards shall be baked at 105 ±5°C [221 ±9°F] for 1 +1/–0 hours to remove surface moisture and other volatiles. Test specimens shall be cooled to room temperature prior to fluxing and testing. 3.5 Solder Bath Requirements 3.5.1 Solder Temperatures The bulk temperature of the solder bath shall be maintained at 245 ±5°C [473 ±9°F] unless another temperature is agreed to by vendor and user. 3.5.2 Solder Contamination Control The solder in solder baths used for solderability testing shall be chemically or spectrographically analyzed or replaced each 30 operating days as a minimum. An operating day consists of any 8 hour period, or any portion thereof, during which the solder is liquefied and used. The levels of contamination and Sn content must be within those shown in Table 3. The interval between analysis may be lengthened if the test results, documented to the user’s satisfaction, indicate that the contamination limits are not being approached.

If contamination exceeds the limits specified in Table 3, then the solder shall be changed and the intervals between analysis shall be shortened. 4.0 TEST PROCEDURES

When agreed upon between user and vendor, the specimen to be tested may undergo other types of pretreatments such as degreasing, aqueous cleaning, copper and solder brightening, or baking. 3.4.1.1 Pretreatments

4

The test procedures of this specification are applicable to most printed board constructions typical of the industry. It is recognized that thick

4.1 Test Procedure Limitations

April 1992

J-STD-003

printed wiring boards will not act the same as thin printed wiring boards due to their increased thermal mass, aspect ratio, number of ground planes and weight of the solder column within the hole. These factors greatly reduce the likelihood that all holes will display completely wetted knees with top side caps. The test procedures of this specification shall be followed. If it is demonstrated to the user’s satisfaction that changes are necessary due to the physical characteristics of a specimen and not the solderability of the specimen surface, a new procedure shall be documented and used only for the applicable specimen. Changes in test procedures and flux (see paragraph 3.2.2) shall take into account the wetting time and flux issues of paragraphs 6.2, 6.8, and 6.9. 4.1.1 Application of Flux The test specimens are to be dipped in the flux to the full depth to be soldered for 5–10 seconds. The flux shall be maintained at the prescribed composition defined in paragraph 3.2.2. After withdrawal from the flux, the specimen shall be allowed to drain vertically for a maximum of 60 seconds. For rotary dip and solder float tests excess flux may be removed by blotting the surface to be tested. The solderability test shall then be performed not less than one minute, and not more than five minutes, after blotting. 4.2 Tests with Established Accept/Reject Criterion 4.2.1 Test A—Edge Dip Test This test is for edge dip testing of surface conductors and attachment lands.

4.2.1.4 Procedure

Dross and burned/residual flux shall be completely removed from the surface of the molten solder immediately prior to dipping. 4.2.1.4.1

4.2.1.4.2 After fluxing and draining per paragraph 4.1, the specimen shall be immersed into the molten solder edgewise to a depth of 25.0 ±2.0 mm [1.0 ±0.08 in]. The dwell time in the molten solder shall be 3.0 ±0.3 seconds, minimum. Immersion and emersion rates shall be 25.0 ±2.0 mm [1.0 ±0.08 in] per second. 4.2.1.4.3 After withdrawal, the solder shall be allowed to solidify by air cooling while the board is maintained in a vertical position. 4.2.1.4.4 Prior to examination, all specimens shall have the flux removed using a cleaning agent in accordance with paragraph 3.2.3. 4.2.1.5 Evaluation 4.2.1.5.1 Magnification Visual inspection shall be with the unaided eye, corrected to 20/20. Lighting shall be suitable for proper inspection. To aid the evaluation of borderline cases, or when vendor and user agree that more critical viewing conditions are appropriate, the set up described in paragraph 3.3.3 is recommended. 4.2.1.5.2 Surface Evaluation

4.2.1.1 Apparatus

A minimum of 95% of each of the surfaces being tested shall exhibit good wetting. The balance of the surface may contain only small pin holes, dewetted areas, and rough spots provided such defects are not concentrated in one area. For less critical applications, a smaller percent coverage may be determined between vendor and user. There shall be no nonwetting or exposed base metal within the evaluated area (see paragraph 6.10). An area of 3.2 mm [0.125 in] width from the bottom edge of each test specimen shall not be evaluated. Areas contacted by fixtures shall not be evaluated.

4.2.1.5.2.1 Accept/Reject Criterion 4.2.1.1.1 Solder Pot/Bath A solder vessel that meets the

requirements of 3.3.2 shall be used. The solder shall meet the requirements of 3.2.1. Solder bath temperatures and solder contamination control shall be in accordance with 3.5.1 and 3.5.2. 4.2.1.1.2 Dipping Device A dipping device as shown in

Figure 2 shall be used. A similar device may be used providing: the rate of immersion, dwell time, and rate of withdrawal are within the test limits; perpendicularity of board and solder surface are maintained; wobble, vibration, and other extraneous movements are eliminated.

This test is for rotary dip testing of plated through-holes, surface conductors and attachment lands.

4.2.2 Test B—Rotary Dip Test

The test specimen shall be a representative portion of the board, or a full board, whichever is smaller, not to exceed 50.8 x 50.8 mm [2.0 x 2.0 in] or a coupon that is representative of the common board features. Figures 3a and 3b are suggested coupon styles.

4.2.1.2 Test Specimen

4.2.1.3 Preparation

accordance with 3.4.

Specimen preparation shall be in

A device shall be used to move the test specimen in a circular path so that the flat surface of the specimen will contact the solder at a constant speed without stopping. The distance between the center of rotation and the center of the test specimen shall be 100.0 ±5.0

4.2.2.1 Apparatus

5

April 1992

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J-STD-003

Stop Start

▼

▼

▼

Component Carrier

▼

▼

▼

Solder Station 245°C [473°F] ± 5°

Flux Station

IPC-003-2

Figure 2

Edge dip solderability test

mm [4.0 ±0.2 in]. An example of a specimen holder is shown in Figure 4. 4.2.2.1.1 Those parts of the holder including the retaining spring (if fitted) which come into contact with the specimen and/or the solder should have low thermal capacity and conductivity.

The time of contact between any point of the test face of the specimen and the molten solder shall be determined by a timer activated by the electrical contact of the sensor with the molten solder. The tip of the sensor shall be located adjacent to the specimen and it shall be on the same axis and radius of rotation as the center of the test face of the specimen. The sensor shall be kept clean. It shall be electrically insulated from the specimen holder which carries it. 4.2.2.1.2

4.2.2.1.3 A strip of 50.0 mm [2.0 in] wide polytetrafluoroethylene (PTFE) or equivalent shall precede the test specimen in the test cycle in order to remove oxide or flux residue from the solder surface immediately before the specimen is introduced. 4.2.2.2 Test Specimen The specimen shall be in accor-

dance with paragraph 1.7. The test specimen shall either be a full board, a section of a board, or a suggested coupon 6

(see Figures 3a and 3b). The specimen shall be of such a width as to allow 13.0 mm [0.5 in] clearance from the solder pot sides. If plated through-holes are to be tested, then the minimum number of holes to be tested is 30 per test lot. The minimum number of terminations (plated throughholes or attachment lands) per test specimen shall be six. The test specimen shall be representative of the product. The exposed length of specimen test face in the direction of travel shall be 25.0 ±5.0 mm [1.0 ±0.2 in]. 4.2.2.3 Preparation

Specimen preparation shall be in

accordance with 3.4. 4.2.2.4 Procedure 4.2.2.4.1 Dross and burned/residual flux shall be completely removed from the surface of the molten solder immediately prior to dipping. 4.2.2.4.2 After fluxing and draining, per paragraph 4.1, mount the specimen to be tested in the test equipment specimen holder. 4.2.2.4.3 Adjust the test equipment to immerse the specimen 0.75–1.0 mm [0.03–0.04 in] into the solder unless otherwise specified. Activate the test equipment to expose the specimen to solder. After the specimen has cleared the

April 1992

J-STD-003

9 Spaces @

▼ 2.5 [0.10]

▼

▼

▼

3.13 [0.125]

22.5 {0.90]

▼

▼

27.5 [1.10]

▼ 7.5 [0.30]

▼ ▼

2.5 [0.10]

▼ 40 Plated-through Holes 0.8 ±0.013 [0.032 ± 0.005] Land Size 1.5 [0.060] IPC-003-3a

Figure 3a

Suggested test specimen—for plated through-holes

solder bath, allow all the solder to solidify in the position in which the machine stops before removing from the specimen holder. Care must be taken so that solder does not flow over the upper face of the specimen. This may be impacted by the width of the specimen. Dwell time at the maximum depth shall be 3.0 ±0.5 seconds, minimum. 4.2.2.4.4

4.2.2.4.5 Prior to examination, all specimens shall have the flux removed using a cleaning agent in accordance with paragraph 3.2.3.

defects are not concentrated in one area. For less critical applications, a smaller percent coverage may be determined between vendor and user. There shall be no nonwetting or exposed base metal within the evaluated area (see paragraph 6.10). 4.2.2.5.3 Plated Through-hole Evaluation 4.2.2.5.3.1 Incoming Acceptance Only plated holes that are at least 5.0 mm [0.2 in] from any surface or fixturing structure supporting the specimen during the test will be evaluated. An area of 3.2 mm [0.125 in] width from the trailing edge of each test specimen shall not be evaluated. Areas contacted by fixtures shall not be evaluated.

4.2.2.5 Evaluation 4.2.2.5.1 Magnification Visual inspection shall be with the unaided eye, corrected to 20/20. Lighting shall be suitable for proper inspection. To aid the evaluation of borderline cases, or when vendor and user agree that more critical viewing conditions are appropriate, the set up described in paragraph 3.3.3 is recommended. 4.2.2.5.2 Surface Evaluation

4.2.2.5.3.2 Accept/Reject Criterion—Class 1 and 2 Product Solder shall fully wet the wall area of the plated

through-holes, and plug holes less than 1.5 mm [0.06 in] diameter (complete filling is not necessary). 4.2.2.5.3.3 Accept/Reject Criterion—Class 3 Product

The specimen has soldered successfully if solder has risen in all plated holes. The solder shall have fully wetted the walls of the hole. There shall be no non-wetting or exposed base metal on any plated through-hole.

An area of 3.2 mm [0.125 in] width from the trailing edge of each test specimen shall not be evaluated. Areas contacted by fixtures shall not be evaluated.

Accept/reject criterion for boards