Datasheet IT8987E [PDF]

Zitiervorschau

5

4

3

2

1

+3VPCU L16

EC(KBC)

+A3VPCU

BLM15AG121SN1D(120,500MA)_4

+3VPCU_ECPLL

C411 0.1u/16V_4

L11

BLM15AG121SN1D(120,500MA)_4

C653

+3VPCU_EC

S5_ON

R602

10K_4

SIO_EXT_SMI# SIO_EXT_SCI#

R610 R607

*10K_4 *10K_4

SIO_A20GATE KBRST# SERIRQ

R592 R603 R605

*10K_4 10K_4 *10K_4

SUSON MAINON VRON PLTRST# PCH_RSMRST# CPU_ID

R593 R253 R249 R608 R584 R615

100K_4 100K_4 100K_4 100K_4 *10K_4 *SP@0_4

(For PLL Power)

0.1u/16V_4

+3V_S5

ECAGND [30]

D/C#

SB_ACDC

TP59

+3VPCU_EC

BT_EN

C652

C654

C371

C396

C660

C424

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

[21]

TP64 TP65

+3V

Layout put in device side USBON#

80 119 33 88 81 87 109 108

TP60 [5] SUSB# [5] PWROK_EC APU_DISP_BLEN

Layout put in device side C

R322

TOUCHPANEL_ON

[4,17]

33_4

[20]

IOAC_LAN_WAKE#

C678 180P/50V_4

[22]

R612

0_4 TP48

AMP_MUTE#

[24]

R625

EC_ODD_EJ

33_4

C676

180P/50V_4

R598 R601 R213 R214 EC_SPI_SCK R587 EC_SPI_CS0# R590 EC_SPI_SDI R589 EC_SPI_SDO R588

[6] SPI_SCK [6] SPI_CS [6] SPI_SDI [6] SPI_SDO

[21]

ODD_POWER [30] ACIN [30] TEMP_MBAT IOAC_WLANPWR# [22] PCBEEP_EC

71 72 73 35 34 122 95 94

[24]

Layout put in device side

[30]

CZL@0_4 CZL@0_4 CZL@0_4 CZL@0_4 CZ@0_4 CZ@0_4 CZ@0_4 CZ@0_4

TP53

AC_PROTECT SPI_SCK_UR_R SPI_CS0#_UR SPI_SDI_UR SPI_SDO_UR [28] [28]

MY16 MY17

56 57 32

CPU_ID

100 125

[31,32,36] S5_ON [27] PTP_PWR_EN#

B

*10K_4 *10K_4

SPI_SDI_UR SPI_SDO_UR

Please do not place any pull-up resistor on GPG0, GPG2, and GPG6 (Reserved hardware strapping).

SM BUS ARRANGEMENT TABLE SM Bus 1

36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15

SM Bus 2

PCH/VGA

SM Bus 3

N/A

SM Bus 4

N/A

Power sequence

SM BUS

WUI42/GPH6/ID6(Dn) WUI41/GPH5/ID5(Dn) WUI40/GPH4/ID4(Dn) WUI19/GPH3/ID3(Dn) CLKRUN#/WUI16/GPH0/ID0(Dn)

L80HLAT/BAO/WUI24/GPE0(Dn) L80LLAT/WUI7/GPE7(Up)

84 83 82

VSTBY

EGCLK/WUI27/GPE3(Dn) EGCS#/WUI26/GPE2(Dn) EGAD/WUI25/GPE1(Dn)

GPH7 AVCC

99 98 97 96 93

PWM0/GPA0(Up) PWM1/GPA1(Up) PWM2/GPA2(Up) PWM3/GPA3(Up) PWM4/GPA4(Up) PWM5/GPA5(Up)

TACH0A/GPD6(Dn) TACH1A/TMA1/GPD7(Dn) TMRI0/WUI2/GPC4(Dn) TMRI1/WUI3/GPC6(Dn)

VSTBY ADC5/DCD1#/WUI29/GPI5(X) UART port ADC6/DSR1#/WUI30/GPI6(X) ADC7/CTS1#/WUI31/GPI7(X) RTS1#/WUI5/GPE5(Dn) PWM7/RIG1#/GPA7(Up) DTR1#/SBUSY/GPG1/ID7(Dn) CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn) CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

PWRSW/GPE4(Up) RI1#/WUI0/GPD0(Up) RI2#/WUI1/GPD1(Up)

WAKE UP

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

FSCK/GPG7 FSCE#/GPG3 FMOSI/GPG4 FMISO/GPG5

EXTERNAL SERIAL FLASH ADC0/GPI0(X) ADC1/GPI1(X) ADC2/GPI2(X) ADC3/GPI3(X) ADC4/WUI28/GPI4(X)

KSO16/SMOSI/GPC3(Dn) KSO17/SMISO/GPC5(Dn) PWM6/SSCK/GPA6(Up) SSCE0#/GPG2(X) SSCE1#/GPG0(X) KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15

TACH2/GPJ0(X) GPJ1(X) DAC2/TACH0B/GPJ2(X) DAC3/TACH1B/GPJ3(X)

KBMX

GPJ7 GPJ6

HWPG

TP18 TP58

PCH_RSMRST#

TP50

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7

2ND_MBCLK 2ND_MBDATA

R595 R594

4.7K_4 4.7K_4

FANSIG

[28]

Change EC SMBus PU voltage from +3V_GFX to +3V_S5 due to it also connect to CPU(SIC/SID) and GPU. EC need read CPU temperature even in UMA mode or GPU off mode

CORE_PWM_PROCHOT#

TP68 120 124

SUSON

C

R609

NBSWON# [28] SUSC# [5]

HWPG

112

PCH_RSMRST#

Layout put in device side 33_4

RF_EN

C428

[5]

[21]

[30]

+3VPCU

ECAGND DGPU_AC_DC# VRON [5,34] IOAC_LANPWR#

TP63 TP62 TP61

2 128

TP57 R300

+3VPCU

SPI NOR FLASH(128KB) (KBC)

10u/6.3V_6

76 77 78 79

2N7002K

100K_4

180P/50V_4 ICMNT

66 67 68 69 70

2

PROCHOT_EC

TP52 107 18 21

[4,30,34,35]

Q48

[31,33]

CPUFAN#

[28]

TPD_INT#

[27]

U33

25mA

[12]

8

+3VPCU

[20]

3

R565 CZ@10K_4

EC_SPI_WP#

R581 CZ@10K_4

EC_SPI_HOLD# 7

VCC WP#

SPI_SI SPI_SO CS# SPI_SCK

SPI_HOLD GND

5 2 1 6

R566 CZ@10K_4

EC_SPI_SDI EC_SPI_SDO EC_SPI_CS0# EC_SPI_SCK

4

C649 *CZ@10P/50V_4

CZ@W25X10CLSNIG

HWPG(KBC) 33_4

L15

+3V

[36]

HWPG_0.775VS5

[36]

HWPG_1.8VS5 [34]

0.1u/16V_4

VRM_PWRGD

[33] [32]

BLM15AG121SN1D(120,500MA)_4

HWPG_VDDR HWPG_0.95VS5

[31]

+3VRTC

[35]

+3VPCU

SYS_HWPG

1

GFX_PWRGD

+3V

R642 *0_4

R256

D14

*1N4148WS

D16

*1N4148WS

D17

1N4148WS

D13

*1N4148WS

D15

*1N4148WS

D18

*1N4148WS

3D20

*CZ@1N4148WS

10K_4 HWPG

HWPG

Q27 CZ@2N7002K

CZ@100K/F_4

VDDGFX_PD

2 Q26 CZ@2N7002K

R643 *10K_4 WRST#

[30]

BI

R640 100K_4

C671 *0.1u/16V_4

A

Vgs = 1.5V 2 C672 *0.1u/25V_6

3 4

PJA138K Q55

TP56

BI_GATE SW1 BI_SW 6

Vgs = 1.5V

Quanta Computer Inc.

Q56 *PJ4N3KDW

PROJECT : ZRZ

1 2

4

5

Size

Document Number

Date:

Friday, March 06, 2015

Rev 1A

EC (ITE8987E/BX) 5

[5]

C437 [email protected]/10V_4 [5]

+3VRTC

B

R241

C401

2

S5_ON

47 48

Layout put in device side

1

MAINON

4.7K_4 4.7K_4

+3V_S5

PWRLED# [26] BATLED1# [26] SUSLED# [26] BATLED0# [26] MAINON [33,36] USB_CTL1 [25]

IT8987E/BX

2

TP66

24 25 28 29 30 31

R597 R596

1

TP67

PLTRST#

+3VPCU MBCLK MBDATA

C471 180P/50V_4

3

PWROK_EC

SM BUS PU(KBC)

VSTBY

5

TP54

ITE suggest PCH_RSMRST# PD CPU_ID:CZ Internal PU, CZL External PD

1

TP55

SUSB#

[17]

A/DAVCC D/A

SPI ENABLE

2

SUSON

LID591#

IOAC_RST# [20,21] EC_FPBACK# [17] TPCLK [27] TPDATA [27]

R635

3

TP47

33_4 180P/50V_4

85 86 89 90

C675

1

A

TP51

TP49 R660 C682

D

MBCLK [30] MBDATA [30] 2ND_MBCLK [4,12] 2ND_MBDATA [4,12]

Layout put in device side

R641 *0_4

DNBSWON#

[27]

PWM

Battery B/I SW (SYP)

NBSWON#

110 111 115 116 117 118

VSTBY

VSTBY

Battery [28] [28] [28] [28] [28] [28] [28] [28]

PS2CLK0/TMB0/CEC/GPF0(Up) PS2DAT0/TMB1/GPF1(Up) PS2CLK2/WUI20/GPF4(Up) PS2DAT2/WUI21/GPF5(Up)

IT8987E/BX

DAC4/DCD0#/GPJ4(X) DSR0#/GPG6(X) GINT/CTS0#/GPD5(Up) PS2DAT1/RTS0#/GPF3(Up) DAC5/RIG0#/GPJ5(X) PS2CLK1/DTR0#/GPF2(Up) TXD/SOUT0/GPB1(Up) RXD/SIN0/GPB0(Up)

58 59 60 61 62 63 64 65

R600 R599

[28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28]

105 101 102 103

CIR VSTBY

ECAGND

[17]

CRX0/GPC0(Dn) CTX0/TMA0/GPB2(Dn)

TPD_EN

3

113 123

KB_BL_LED DNBSWON#

33_4

C674 180P/50V_4

1

*short_4

SMCLK0/GPB3(X) SMDAT0/GPB4(X) SMCLK1/GPC1(X) VSTBY SMDAT1/GPC2(X) PECI/SMCLK2/WUI22/GPF6(Up) SMDAT2/WUI23/GPF7(Up)

VCORE

[28] [5]

R604

*8.2K

12

[5] KBRST# IOAC_WLAN_WAKE#

AVSS

[21]

C655 1u/6.3V_4

75

C656 *10p/50V_4

GA20/GPB5(X) VSTBY SERIRQ/GPM6(X) VCC ECSMI#/GPD4(Up) VSTBY VSTBY ECSCI#/GPD3(Up) LPC VSTBY GPIO WRST# VSTBY KBRST#/GPB6(X) VSTBY PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT VSTBY

VSS VSS VSS VSS

1

[5] SIO_A20GATE [6,23] SERIRQ [5] SIO_EXT_SMI# [5] SIO_EXT_SCI#

WRST#

VSS

R606 100K_4

126 5 15 23 14 4 16

27 49 91 104

D40 RB500V-40

LPCPD#/WUI6/GPE6(Dn)

1

2 R611 *22_4

17

PROCHOT_EC

LAD0/GPM0(X) LAD1/GPM1(X) LAD2/GPM2(X) LAD3/GPM3(X) VCC LPCRST#/WUI4/GPD2(Up) VSTBY LPCCLK/GPM4(X) VCC LFRAME#/GPM5(X) VSTBY

KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7

+3VPCU CLK_PCI_775

VCC VSTBY VSTBY VSTBY VSTBY VSTBY VSTBY_FSPI

U35 10 9 8 7 22 13 6

3 74

11 26 50 92 114 121 106

0.1u/16V_4

[6,21,23] LPC_LAD0 [6,21,23] LPC_LAD1 [6,21,23] LPC_LAD2 [6,21,23] LPC_LAD3 [5,21,23] PLTRST# [6] CLK_PCI_775 [6,21,23] LPC_LFRAME#

19 20

R613 127

C657

R658

USB_CHG_MODE [25] USB_CHG_EN [25] LPC_CLKRUN# [6,23] +3V

+3V_EC

6

2.2_6 2

[25]

PS/2

R239 1

+3V

D

[30]

3

12 mils

1

+3VPCU

2.2_6 2

2

R591 1

4

3

2

Sheet 1

29

of

41